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`IPR2020-01302
`U.S. Patent No. 7,539,474
`Patent Owner’s Sur-Reply
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________________
`
`Intel Corporation
`Petitioner
`
`v.
`
`ParkerVision, Inc.
`Patent Owner
`
`U.S. Patent No. 7,539,474
`
`Issue Date: May 26, 2009
`Title: DC OFFSET, RE-RADIATION, AND I/Q SOLUTIONS USING
`UNIVERSAL FREQUENCY TRANSLATION TECHNOLOGY
`__________________________________________________________________
`
`Inter Partes Review No. IPR2020-01302
`__________________________________________________________________
`
`PATENT OWNER’S SUR-REPLY TO PETITIONER’S REPLY
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`TABLE OF CONTENTS
`
`I.
`II.
`
`V.
`
`Page
`
`INTRODUCTION ........................................................................................... 1
`INTEL AVOIDS PROVIDING THE BOARD WITH A COMPLETE
`PICTURE OF THE TECHNOLOGY. ............................................................ 3
`III. THE TEXAS COURT’S UPDATED CONSTRUCTION. ............................. 5
`IV.
`INTEL’S CONSTRUCTION OF “STORAGE ELEMENT” IS WRONG. ... 6
`A. A “Storage Element” Is Only An Element Of An Energy Transfer
`System. .................................................................................................. 6
`B. A “Storage Element” Drives A Low Impedance Load. ........................ 9
`Larson does not disclose a “switch.” ............................................................. 10
`A. A FET Is Not Necessarily A Switch ................................................... 10
`B.
`The FETs In Figure 5.36 Of Larson Are Not Switches ...................... 13
`VI. Larson does not disclose a “Storage element.” ............................................. 15
`VII. Butler does not disclose a “Pulse” ................................................................. 17
`
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`i
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`I.
`
`
`INTRODUCTION
`In its Reply, Intel abandons its original invalidity theories and expressly
`
`concedes that the prior art references – Larson and Bulter – cited in the Petition do
`
`not invalidate the challenged claims of the ’474 patent. Indeed, the parties agree that
`
`the ’474 patent claims are directed to a down-conversion technique called sampling
`
`which is not taught or suggested by Intel’s cited prior art. See Paper 23 (“Reply”),
`
`13. (“Thus, assuming that the Board agrees with the parties that the remaining claims
`
`require down-conversion by sampling, Intel agrees that Larson and Butler do not
`
`invalidate those claims.”).1 For at least this reason, challenged claims 1, 3, 4, 7, and
`
`9-11 of the ’474 patent are not invalid.
`
` Recognizing the deficiencies in its Petition, Intel now proclaims that “the
`
`claims are invalid because down-conversion by sampling—though not disclosed in
`
`Larson or Butler—was well known prior to the filing date of the ’474 patent.” Id.,
`
`13. But Intel points only to “sample-and-hold (voltage sampling) solutions for down-
`
`conversion” as being well known. Id. As explained in Patent Owner’s Response, the
`
`patent discusses two fundamentally different and competing technologies that down-
`
`convert by sampling: (1) energy transfer (energy sampling) and (2) sample and hold
`
`(voltage sampling). See Paper 16 (“POR”), 38. And the challenged claims are
`
`
`1 Unless otherwise noted, all emphasis has been added.
`
`
`
`1
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`directed to only one of these technologies – energy transfer (i.e., energy sampling).
`
`Id. Intel purposefully omits this critical distinction from its Reply in an attempt to
`
`conceal the holes in Intel’s deficient obviousness challenge. For this additional
`
`reason, challenged claims 1, 3, 4, 7, and 9-11 are not invalid.
`
`Furthermore, Intel has not demonstrated that its primary references (Larson
`
`and Butler) render obvious – let alone anticipate – the challenged claims of the ’474
`
`patent. Intel persists in arguing that Larson and/or Bulter disclose the claimed
`
`“switch[es],” “storage element[s],” and “pulse[s].” See Reply, 14. But this assertion
`
`directly contradicts Intel’s own characterization of the prior art (as failing to disclose
`
`systems that down-convert by sampling). Indeed, Intel fails to appreciate that while
`
`both non-linear mixing and energy sampling use similar components (e.g.,
`
`transistors, capacitors), these components are used in different ways in a circuit to
`
`create a desired result.
`
`But the way in which the components are used is significant and make these
`
`systems fundamentally different and competing systems. Whereas a non-linear
`
`mixer using a continuous time-varying resistor forms a down-converted signal by
`
`mixing (multiplying) two signals (an RF signal and an LO signal) together, energy
`
`sampling uses a switch and forms a down-converted signal from the energy
`
`transferred from an RF signal. See Ex.-2027 ¶150 (citing Ex.-2015, 884), ¶184.
`
`
`
`2
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`Intel improperly seeks to ignore these differences. These differences,
`
`however, are why the challenged claims of the ’474 patent specifically recite
`
`“switch,” “storage element” (an element of an energy transfer (energy sampling)
`
`system), and “pulse.” These terms distinguish an energy sampling/transfer system
`
`from a non-linear mixing system. For at least this additional reason, challenged
`
`claims 1, 3, 4, 7, and 9-11 are not invalid.
`
`II.
`
`
`
`INTEL AVOIDS PROVIDING THE BOARD WITH A COMPLETE
`PICTURE OF THE TECHNOLOGY.
`This case involves complex wireless technology. Unlike ParkerVision, who
`
`focuses on how the technology actually works, Intel relies on naming conventions
`
`and tries to avoid providing the Board with a complete picture of the technology.
`
`Notably, Intel presents the technology in drips and drabs – only so much as it
`
`believes necessary to push its narrative. This is no accident. With a proper
`
`understanding of the technology, Intel’s invalidity arguments do not withstand
`
`scrutiny.
`
`
`
`Instead of focusing on important details, Intel makes broad generalizations
`
`about the technology. For example, Intel devotes pages in its Reply arguing that
`
`down-converting at an aliasing rate is “the” invention and, therefore, all claims must
`
`include the concept of an aliasing rate, which “necessarily involves sampling.” See
`
`Reply, 10-12, n.6. But Intel’s discussion of “aliasing rate” is inapplicable. Notably,
`
`Intel is seeking to add this “aliasing rate” into the broader module term (“frequency
`
`
`
`3
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`down-conversion module”) and pull the concept of “aliasing rate” away from where
`
`the patentees already included equivalent language in the claims – i.e., the
`
`component terms (switch, storage element) and wherein clauses (e.g., claim 6:
`
`“wherein: the first switch under-samples the input signal according to the first
`
`control signal…”).
`
`
`
`Tellingly, Intel avoids any technical discussion to assist the Board’s
`
`understanding of the scope of the prior art. Instead, Intel paints broad brush strokes.
`
`According to Intel, for example, the parties agree that “the two references cited in
`
`the Petition[]… are mixers2 and thus do not disclose down-conversion by sampling.”
`
`Reply, 2. But ParkerVision did not make that broad pronouncement, as Intel
`
`suggests. Instead, ParkerVision carefully articulated the fundamental differences
`
`
`2 It is important to note that the term “mixer” has changed meaning over time. As
`
`used today, the term “mixer” commonly refers to frequency translation, including
`
`down-conversion and up-conversion systems. Ex.-2027 ¶163. As ParkerVision’s
`
`expert, Dr. Michael Steer, explained in his declaration, “the term ‘mixer’ really says
`
`nothing about how a circuit operates or the specific configuration of the circuit. As
`
`such, when analyzing a component referred to as a ‘mixer’ one needs to look at the
`
`operation and configuration of the circuit to determine the technology that is being
`
`implemented. Id. Tellingly, Intel makes no such effort.
`
`
`
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`4
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`between non-linear mixing (Larson/Bulter) and energy sampling (ParkerVision’s
`
`claimed invention). See POR, 20-29. Indeed, the differences between these
`
`technologies are critical to understanding why Intel’s prior art fails to invalidate the
`
`challenged claims.
`
`III. THE TEXAS COURT’S UPDATED CONSTRUCTION.
`The parties dispute whether a “storage element” is an element of an “energy
`
`transfer system.” In its Response, ParkerVision explained why it is. See POR, 55-
`
`60. The Texas District Court (“Texas Court”) has now twice agreed with
`
`ParkerVision. Yet, before this Board, Intel persists in making the exact same flawed
`
`arguments that it made to the Texas Court – arguments that omit critical context and
`
`ignore how the technology is actually described in the patent.
`
`Since ParkerVision filed its POR, the Texas Court revisited its construction
`
`of “storage module” (which the parties agree is synonymous with “storage element”)
`
`in a related patent. See D.I. 61, ParkerVision, Inc. v. Intel Corp., Case No. 6:20-cv-
`
`00562-ADA (W.D. Tex. Jul. 22, 2021). The Texas Court construed “storage
`
`module” as “a module of an energy transfer system that stores non-negligible
`
`amounts of energy from an input electromagnetic signal for driving a low impedance
`
`load.” Id. The Texas Court’s addition of “for driving a low impedance load” to its
`
`original construction supports ParkerVision’s interpretation of (and provides
`
`clarification regarding) what it means for a system to be an “energy transfer system”
`
`
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`5
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`as set forth in ParkerVision’s proposed construction of “storage element.” See POR,
`
`52, 55-60.
`
`IV.
`
`INTEL’S CONSTRUCTION OF “STORAGE ELEMENT” IS
`WRONG.
`The Texas Court has now twice considered and rejected Intel’s construction
`
`and its arguments. While the Board is not bound to the Texas Court’s construction,
`
`it is informative.
`
`A “Storage Element” Is Only an Element of an Energy Transfer
`System.
`The ’474 patent specification (which incorporates the ’551 patent) states that
`
`the “energy transfer” system uses “a storage module” that “store[s] non-negligible
`
`amounts of energy,” whereas the “under-sampling” (i.e., sample-and-hold) system
`
`utilizes a “holding module” that “store[s] negligible amounts of energy.” Ex.-2020.
`
`66:55-67. As such, there should be no dispute that “energy transfer system” should
`
`be included in the construction as ParkerVision proposes.
`
`Tellingly, Intel provides no substantive technical arguments based on the
`
`intrinsic evidence as to why including “an element of an energy transfer system” is
`
`technically incorrect. Instead, Intel points to a single sentence from the specification
`
`6
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`(red below) and asserts that this passage is enough to define the “storage” element.3
`
`It is not.
`
`FIG. 82A illustrates an exemplary energy transfer system 8202 for
`down-converting an input EM signal 8204. The energy transfer system
`8202 includes a switching module 8206 and a storage module
`illustrated as a storage capacitance 8208. The terms storage module and
`storage capacitance, as used herein, are distinguishable from the terms
`holding module and holding capacitance, respectively. . . . Storage
`modules and storage capacitances, on the other hand, refer to systems
`that store non-negligible amounts of energy from an input EM signal.
`Ex.-2020, 66:55-67.
`
`The entire paragraph above is describing a “storage” module/element in the
`
`context of an energy transfer system (green above), which is the only type of system
`
`that has a “storage” module/element. Indeed, this passage is found in the section
`
`entitled “0.1.2 Introduction to Energy Transfer.” See Ex.-2020, 66:33. As such, there
`
`is no basis for Intel to argue against including “energy transfer system.”
`
`
`3 Intel cites to another portion of the specification for the proposition that the goal of
`
`the storage module is to store non-negligible amounts of energy. See Reply, 4.
`
`Though storage of non-negligible amounts of energy is certainly one goal, it is not
`
`the only goal nor is this feature the only thing that defines what it means to be a
`
`“storage” element.
`
`
`
`7
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`The inclusion of “energy transfer system” in “storage element” is appropriate.
`
`First, in its Reply, Intel admits that there are only two systems disclosed in the patent:
`
`(1) “transferring energy” and (2) “under-sampling.” See Reply, 11. Second, the ’474
`
`patent states that a “storage” element is used only in an energy transfer system. Ex.-
`
`2020, 66:55-59. Logically, if there are only two systems and a “storage” element is
`
`used only in an energy transfer system, then a “storage” module/element must
`
`necessarily be an element of an energy transfer system. Indeed, the specification
`
`makes it clear that “storage” modules/elements are inseparably intertwined with
`
`energy transfer systems. See POR, 33-36, 38-45, 55-60.
`
`Further, Intel argues that Intel’s construction of “storage element” is the same
`
`as ParkerVision’s proposed construction of “storage module” in a previous IPR
`
`(IPR2014-00948). Reply, 5. But this cuts against Intel’s argument. In 2014, claim
`
`terms were interpreted according to their broadest reasonable interpretation (BRI) –
`
`a different standard than the Board uses today. In 2018, the USPTO eliminated the
`
`BRI standard and harmonized its claim construction standard with the district courts.
`
`In IPR2014-00948, ParkerVision focused on the red passage above. The PTAB’s
`
`current claim construction standard, however, requires considering more than just
`
`the red passage, which ParkerVision has done here.
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`
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`8
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`A “Storage Element” Drives a Low Impedance Load.
`A “low impedance load” goes to the heart of what makes an element, a
`
`“storage” element (used in energy sampling) as opposed to a “holding” element
`
`(used in voltage sampling/sample-and-hold). Unlike a low impedance load, a high
`
`impedance load causes an element to “hold” energy, making it a “holding” element,
`
`not a “storage” element.4 This is the reason the specification specifically makes a
`
`point to say that “holding” modules/elements hold “negligible amounts of
`
`energy…with the intent of ‘holding’ a voltage value.’” Ex.-2020, 66:63-65. Intel
`
`does not address this language.
`
`Indeed, the way in which “holding” modules/elements “hold” a voltage value
`
`is by using a high impedance load. See, e.g., Ex.-2027 ¶¶169, 171. As such, a
`
`“storage” module/element is not using a high impedance load.
`
`So what type of load is a “storage” module/element using? The specification
`
`explains that with regard to loads in sampling systems, it is a binary choice – it is
`
`either high or low impedance: “Recall from the overview of under-sampling that
`
`loads can be classified as high impedance loads or low impedance loads.” Ex.-2020,
`
`67:32-33. As such, because a “storage” module/element is not using a high
`
`4 A high impedance load restricts the flow of current. A low impedance load provides
`
`little resistance to electrical current. Ex.-2027 ¶275.
`
`9
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`impedance load, it must necessarily be using a low impedance load. This portion of
`
`the specification should not be ignored and, therefore, is included in ParkerVision’s
`
`construction. Moreover, the specification states that in energy transfer systems
`
`driving a low impedance load is a benefit (it necessarily occurs). Id., 67:37-42.
`
`Intel asserts, however, that claim 68 of the ’551 patent (which depends from
`
`claim 1) relates to an energy transfer method that can drive both high impedance and
`
`low impedance loads. Reply, 7. Intel is wrong. Instead, claim 68 of the ’551 patent
`
`actually recites “the step of transferring sufficient energy from said carrier signal to
`
`drive loads without additional buffering or amplification, including high impedance
`
`loads and low impedance loads.” Ex.-2020, 119:1-5.
`
`The claim is not limited to a method that is performed only in an energy
`
`transfer system. This is why claim 68 recites “drives loads” and refers to high and
`
`low impedance loads. And the claim makes no mention of where the energy is going
`
`after being sampled from the carrier signal. Indeed, neither claim 1 nor 68 attempts
`
`to define a “storage element” or an “energy transfer system;” neither of those terms
`
`are included in the claims.
`
`V.
`
`LARSON DOES NOT DISCLOSE A “SWITCH.”
`A FET Is Not Necessarily A Switch
`For the first time in its Reply, Intel defines “switch.” While the parties’
`
`constructions of “switch” are different, the parties agree that a “switch” is an
`
`10
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`electronic device for opening and closing a circuit. The transistors cited in Intel’s
`
`prior art, however, operate as continuous time-varying resistors – not switches.
`
`Unlike a switch, a continuous time-varying resistor does not open and close a circuit.
`
`Notably, Intel attempts to conflate all FETs with switches, and interprets
`
`“switch” as including any FET used to interrupt the flow of current. See Reply, 15.
`
`In particular, Intel asserts that “‘an electronic device for opening and closing a
`
`circuit’—does not require two distinct states (conducting and non-conducting) but
`
`instead requires only ‘opening and closing a circuit.’” Id. But Intel’s interpretation
`
`ignores the plain meaning of the term, its use in the ’474 patent, and prior court’s
`
`constructions.5
`
`As used in the ’474 patent (by incorporating the ’551 patent) and understood
`
`by a POSITA, a switch is a binary-state device that toggles between open (OFF) and
`
`closed (ON). See, e.g., Ex.-2027 ¶¶184, 221-222. Indeed, the specification
`
`repeatedly describes the operation of a switch as “closed by the energy transfer
`
`
`5 Though Intel attempts to dismiss the Orlando court’s construction (see Ex.-2028,
`
`32), Intel provides no reasons demonstrating that the Orlando court got it wrong.
`
`Indeed, Intel has not raised any new arguments regarding these terms. For the
`
`foregoing reasons, ParkerVision’s construction or the Orlando court’s construction
`
`which include “as dictated by an independent control input” should be adopted.
`
`
`
`11
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`pulses” and “opened after energy transfer pulses.” See, e.g., Ex.-2020, 74:17-21;
`
`75:28-32; 77:5-9; 78:17-23. Intel’s own expert confirms this understanding to be
`
`correct.
`
`A transistor acts like a switch that either completes a circuit (which
`allows current to flow) or breaks a circuit (which stops the flow of
`current). If the transistor is turned ON, it will allow current to flow from
`source to drain (or from drain to source, depending on the type of
`transistor). If the transistor is turned OFF, it will not allow current to
`flow. The state of the transistor—ON or OFF—is controlled by a signal
`applied at the gate.
`Ex.-1002, ¶52.
`
`As previously explained in the POR, FETs behave in different ways
`
`depending on the needs of the circuit/system. POR, 27. In sampling systems, FETs
`
`are used as switches in order to take samples of the RF signal. Id. (citing Ex.-2027
`
`¶221). In non-linear mixers, on the other hand, FETs are commonly used as a
`
`continuous time-varying resistor (but not as a switch) to effectuate down-conversion
`
`of a signal to a lower frequency signal. POR, 27-28 (citing Ex.-2027 ¶223).
`
`Unlike a FET used as a switch, a FET used as a continuous time-varying
`
`resistor does not open and close; it does not have two states. Importantly, as a
`
`continuous time-varying resistor, a FET can increase/reduce the flow of current.
`
`
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`12
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`One can think of a FET used in this way as throttling the current.6 Ex. 2027 ¶226.
`
`Intel effectively concedes that Larson’s FETs operate in this same way (i.e., as
`
`continuous time-varying resistors): “It is undisputed that the resistance of Larson’s
`
`FETs varies over time, causing more or less current to flow … This variation in
`
`resistance gradually opens and closes the circuit….” Reply, 15. 7
`
`The FETs In Figure 5.36 Of Larson Are Not Switches
`In its Petition, Intel relies on the circuit of Figure 5.36 of Larson to invalidate
`
`the claims of the ’474 patent.
`
`6 Throttling of current cannot be achieved using a switch. Ex. 2027 ¶226.
`7 Intel’s reliance on the patent description of a switch as “need not being an ideal
`
`switch device” is beside the point.
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`13
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`As shown above, Intel identifies the FETs (green) of Figure 5.36 of Larson as
`
`
`
`“switches.” But Larson itself – despite configuring and referring to other FETs in
`
`other circuits (circuits which were not identified in the grounds of the Petition) as
`
`switches – does not identify the FETs in Figure 5.36 as switches. See, e.g., Ex.-1005,
`
`270-271 (referring to Figure 5.31: “This mixer operates as an alternating switch…the
`
`LO simply switches the two upper FETs on and off on alternate half cycles.”).
`
`Instead, Larson discloses that a “FET resistive mixer” (such as the mixer in Figure
`
`5.36 of Larson above) uses “time-varying channel resistance” and “operates entirely
`
`in its linear region, where the channel is effectively a gate-voltage-controlled
`
`resistor.” Ex.-1005, 273-274. Larson itself therefore provides an objective indication
`
`that a POSITA would not identify the FETs in Figure 5.36 as switches.
`
`To support its contention that “Larson discloses such switches,” Intel relies
`
`on the Reply Declaration of Vivek Subramanian, Ph.D. See Reply, 15-22. But Dr.
`
`Subramanian’s analysis is fundamentally flawed for several reasons. As an initial
`
`matter, Dr. Subramanian fails to differentiate junction-gate field-effect transistors
`
`(JFETs) and metal–oxide–semiconductor field-effect transistors (MOSFETs). But
`
`there are marked differences in the current-voltage characteristics of a JFET and
`
`MOSFET (as previously noted by ParkerVision’s expert, Dr. Michael Steer, see Ex.-
`
`2027 ¶207-216) that cannot be ignored.
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`14
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 18 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 19 of 29
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`Indeed, Dr. Subramanian repeatedly refers to the characteristics of a MOSFET
`
`when describing the operation of a JFET as disclosed in Larson. See, e.g., Ex.-1037
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`¶¶ 21-22 (conflating the “pinch-off voltage” of a JFET with the “threshold voltage”
`
`of a MOSFET”). In fact, the term “JFET” never appears in his declaration at all.8
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`In addition, Dr. Subramanian relies on Dr. Steer’s textbook description of a
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`“Class B” amplifier (and the characteristics of a MOSFET) to coin a new term, a
`
`“Class B FET.” Ex.-1037 ¶¶19-20. Dr. Subramanian then asserts that “Larson
`
`similarly discloses that its FETs are biased at or near the edge of the cutoff/pinch off
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`region, i.e., like class B FETs.” During his deposition, Dr. Subramanian
`
`acknowledges, however, that Larson does not refer to any part of Figure 5.36 as a
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`“Class B FET,” “Class B amplifier,” or a “Class B mixer.” See Ex. 2029, 112:20–
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`113:13. Because of the inconsistencies throughout Dr. Subramanian’s testimony, the
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`Board should give it no weight.
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`VI. LARSON DOES NOT DISCLOSE A “STORAGE ELEMENT.”
`Claims 1, 3, 4, 7 and 9-11 recite a “storage element.” As set forth in Section
`
`IV.a, the term “storage element” is reserved by the ’474 patent for an element of an
`
`energy transfer (energy sampling) systems. Larson discloses a non-linear mixing
`
`system – a fundamentally different and competing technology to ParkerVision’s
`
`
`8 The term “MESFET,” a type of JFET, only appears once.
`15
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 19 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 20 of 29
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`energy transfer (energy sampling) system. Although Intel concedes this point, it
`
`ignores this distinction.
`
`
`In an energy transfer system, the energy stored in a “storage element”
`
`becomes part of (is incorporated into) the down-converted signal (as a result of the
`
`energy being transferred to and driving a low impedance load). See, e.g., Ex.-2027
`
`¶¶184, 185 192. Because the flow of energy itself forms the down-converted signal,
`
`the storage element must store non-negligible amounts of energy. Id., ¶263.
`
`
`
`Larson is different – i.e., Larson is not including energy from a capacitor in
`
`the down-converted signal. The capacitors in Larson merely operate to allow or
`
`prevent/block signals from passing between the FETs and the RF connection. The
`
`capacitors, however, do not store energy which forms the down-converted signal as
`
`is done in an energy transfer system. As such, none of the capacitors in Larson is an
`
`“element of an energy transfer system.” Ex. 2027 ¶¶341-342.
`
`
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`16
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 20 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 21 of 29
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`
`
`Instead, Larson discloses a FET resistive mixer. The operation of an energy
`
`transfer/sampling system, however, is fundamentally different than the operation of
`
`a FET resistive mixer. Whereas a non-linear mixer forms a down-converted signal
`
`by mixing (multiplying) two signals (an RF signal and an LO signal) together, an
`
`energy transfer system uses sampled energy from the RF signal to form a down-
`
`converted signal. Ex. 2027 ¶343.
`
`
`
`Moreover, there is no teaching, suggestion, or motivation in Larson to use
`
`sampled energy from the RF signal to form a down-converted signal as is done in an
`
`energy transfer system. Indeed, all teaching, suggestion, and motivation in Larson
`
`demonstrates that Larson relates only to a non-linear mixing system, which mixes
`
`(multiplies) two signals together. As such, for this additional reason, none of the
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`capacitors in Larson is an “element of an energy transfer system.” Ex. 2027 ¶344.
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`For the foregoing reasons, Larson does not anticipate claims 1, 3, 4, and 9-11
`
`of the ’474 patent.
`
`VII. BUTLER DOES NOT DISCLOSE A “PULSE”
`
`Claim 7 of the ’474 patent recites down-converting an input signal according
`
`to a first and second control signal wherein “the first control signal comprises a first
`
`pulse; and the second control signal comprises a second pulse.” In its Petition, Intel
`
`points to LO signals in Larson and Butler as allegedly disclosing the claimed
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`“pulses.” Paper 3 (“Pet.”), 66-68. But as explained in the POR, Larson and Bulter
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`
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`17
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 21 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 22 of 29
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`explicitly show that the LO signal presented to the FETs are sinusoids, not pulses.
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`POR, 67,77.
`
`
`The difference between sinusoids and pulses is apparent from the diagram
`
`
`
`above illustrating different types of LO signals that can be generated by a local
`
`oscillator. The LO signal can be (1) a sine or sinusoidal wave, (2) a square wave, (3)
`
`a pulse or (4) an impulse. Ex. 2027 ¶103. As shown above, a sine or sinusoidal wave
`
`is a continuous signal with a value that changes smoothly over time. A square wave,
`
`train of pulses and train of impulses are each signals that have two values, and unlike
`
`a sine wave, have abrupt transitions between those values. Ex. 2027 ¶¶104-107.
`
`
`
`In Reply, Intel newly contends that “a POSITA would have understood
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`sinusoidal waveforms like those PO argues are used by Larson and Butler to have
`
`pulses.” To support this new position, Intel relies, for the first time, on U.S. Patent
`
`No. 6,084,363 (“Mizumoto”) as allegedly demonstrating the level of skill in the art.
`
`See Reply, 25. Not only is Mizumoto outside the field of technical endeavor relevant
`
`here, but this new reference fails to show a sinusoid wave having pulses. Instead,
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`
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`18
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 22 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 23 of 29
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`Mizumoto discloses “a piezoelectric element for driving a member constituting a
`
`camera or other precision devices … .” Ex.-1044, 3:31-37. “When the piezoelectric
`
`element is displaced gradually, the driven member is moved along with the drive
`
`shaft by being frictionally coupled to the drive shaft and when the piezoelectric
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`element is displaced abruptly, the drive shaft stays in a stationary state by inertia by
`
`surpassing the frictional coupling force in respect of the drive shaft.” In other words,
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`the “sine wave drive pulse,” referenced by Intel, is just a sinewave that drives a
`
`piezoelectric device. The piezoelectric device, in turn, responds to the sinewave as
`
`though it were a train of pulses.
`
`
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`Figure 1(a) of Mizumoto (above), which Intel also cites, illustrates the
`
`
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`conventional sinewave. Accordingly, a POSITA would not understand a sinusoidal
`
`waveform to have pulses in light of the teachings of Mizumoto.
`
`
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`Intel also improperly relies on expert testimony (and Ex.-1050) for the new
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`proposition that “it would have been obvious to modify the references to use
`
`rectangular pulses, such as those generated by digital circuitry, which is preferred to
`
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`19
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`Case 6:20-cv-00108-ADA Document 117-8 Filed 03/21/22 Page 23 of 28Case 6:21-cv-00520-ADA Document 37-9 Filed 03/30/22 Page 24 of 29
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`analog circuitry in certain implementations.” Reply, 25. Under the guise of
`
`presenting its new theory and evidence about the level of skill in the art, Intel is
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`combining the alleged teachings reflected by the new references with Butler. These
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`combinations were not bases for unpatentability set forth in Intel’s Petition, and Intel
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`cannot now raise them after the fact in its Reply.
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`Regardless, Intel’s Reply provides no evidence or explanation in support of
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`its new theory that it would have been obvious to “use rectangular pulses, such as
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`those generated by digital circuity,” instead of a sinusoid. See In re Kotzab, 217 F.3d
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`1365, 1370 (“Even when obviousness is base

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