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`Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 1 of 41
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`EXHIBIT 32-7
`EXHIBIT 32-7
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`EXHIBIT 32-7
`EXHIBIT 32-7
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 2 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 3 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________________________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________________________
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`Intel Corporation
`Petitioner
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`v.
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`ParkerVision, Inc.
`Patent Owner
`___________________________________________
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`Case No. IPR2020-01302
`U.S. Patent No. 7,539,474
`____________________________________________
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`PETITIONER’S REPLY TO PATENT OWNER’S RESPONSE
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`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`TABLE OF CONTENTS
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`I.
`II.
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`B.
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`V.
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`INTRODUCTION ........................................................................................... 1
`CLAIM CONSTRUCTION ............................................................................ 3
`A.
`PO’s Proposed “Storage Element” Construction Should Be
`Rejected ................................................................................................. 3
`PO’s Remaining Claim Construction Arguments are Irrelevant
`and Wrong ............................................................................................. 8
`III. THE INVALIDITY OF CLAIM 12 IS UNCONTESTED ............................. 9
`IV. ASSUMING THE REMAINING CLAIMS REQUIRE SAMPLING,
`LARSON AND BUTLER DO NOT INVALIDATE THEM ......................... 9
`IF THE CLAIMS DO NOT REQUIRE SAMPLING, THE CLAIMS
`ARE INVALID OVER LARSON AND BUTLER ...................................... 14
`A.
`Larson and Butler each disclose “switch[es]” ..................................... 14
`B.
`Larson discloses “storage element[s].” ............................................... 22
`C.
`Butler discloses “pulse[s]” .................................................................. 24
`D.
`Larson and Butler each disclose “low pass filter[s]” .......................... 26
`E.
`A POSITA would have been motivated to combine Larson and
`Butler ................................................................................................... 28
`VI. SECONDARY CONSIDERATIONS ........................................................... 30
`VII. CONCLUSION .............................................................................................. 31
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`i
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`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`I.
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`INTRODUCTION
`Patent Owner (“PO”) contends that the cited references do not invalidate
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`claims 1, 3, 4, 7, and 9-11 (the “remaining claims”) because they do not teach
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`sampling. 1 Specifically, to overcome the cited references, PO repeatedly and
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`unequivocally states that the remaining claims require a particular form of down-
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`conversion by sampling. (POR, 2 (“[T]he ’474 patent pertains to a technique called
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`sampling ….”); id. (“[A]ll of the challenged claims are directed to a sampling system
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`and, in particular, an energy sampling system ….”); id., 20 (“The challenged claims
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`only cover energy sampling ….”); id., 22 (“In seeking to develop a solution for
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`down-converting an RF signal, however, ParkerVision took a different approach and
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`focused on energy sampling instead of mixing. Energy sampling (also known as
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`energy transfer) was/is a fundamentally different and competing method to mixing.
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`Energy samplers, unlike mixers, do not mix (i.e., multiply) two signals together in
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`order to down-convert a signal.”); id., 38 (“The ’551 patent and, thus, the ’474 patent
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`discloses two systems for down-conversion: (1) energy transfer (i.e., energy
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`sampling) and (2) sample and hold (i.e., voltage sampling).”) (emphasis in original).)
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`1 PO provides no argument for why claim 12 is valid, instead stating that it will
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`disclaim claim 12. (POR, 1.) Petitioner requests that the Board find claim 12 invalid.
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`1
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`PO had not taken this position at the time that Intel filed this petition. But
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`based on Intel’s subsequent analysis of PO’s foundational ’551 patent—one of the
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`multiple patents which the ’474 patent incorporates by reference—Intel now agrees
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`with PO that the claims cover only systems that down-convert by sampling. The
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`’551 patent’s Summary of the Invention section, for example, states that “the present
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`invention2 is directed to methods, systems, and apparatuses for down-converting an
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`electromagnetic (EM) signal by aliasing the EM signal” (Ex. 2020-’551, 2:53-63),
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`and aliasing undisputedly requires sampling (id., 19:49-51 (“When a signal is
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`sampled at less than or equal to twice the frequency of the signal, the signal is said
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`to be … aliased.”). Intel further agrees with PO that the two references cited in the
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`Petition’s two grounds addressing the remaining claims (Larson and Butler) are
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`mixers and thus do not disclose down-conversion by sampling.
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`Assuming the Board agrees with the parties that the remaining claims require
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`sampling, the Larson and Butler references (cited in the Petition against the
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`remaining claims) would not invalidate those claims because they do not down-
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`convert by sampling. To be clear, Intel does not agree that the remaining claims are
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`2 All emphasis added unless otherwise noted.
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`2
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`valid. Down-conversion through sampling using the configuration of components
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`of the remaining claims was well known when the ’474 patent was filed; they just
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`are not disclosed by the Larson and Butler references.
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`To the extent, however, that the Board does not agree with the parties that the
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`remaining claims require sampling, the claims are invalid over Larson and Butler for
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`the reasons explained in Intel’s Petition. PO’s validity arguments in its POR are
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`incorrect, as explained in detail below.
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`II. CLAIM CONSTRUCTION
`If the Board agrees with the parties that the remaining claims require down-
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`conversion by sampling, then the Board need not address any other claim
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`construction issues because Intel recognizes that Larson and Butler do not disclose
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`down-conversion through sampling. But if the Board disagrees with the parties, the
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`Board should reject PO’s claim construction arguments.
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`A.
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`PO’s Proposed “Storage Element” Construction Should Be
`Rejected
`Intel’s Proposed Construction
`“an element that stores a nonnegligible
`amount of energy from an input
`electromagnetic (EM) signal”
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`PO’s Proposed Construction
`“an element of an energy transfer
`system that stores nonnegligible
`amounts of energy from an input
`electromagnetic signal”
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`3
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`1.
`Intel’s Proposed Construction
`Intel’s proposed construction expressly tracks the patent’s definition of
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`“storage element.” The specification states unequivocally that: “Storage modules
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`… refer to systems that store non-negligible amounts of energy from an input EM
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`signal.” (Ex. 2020-’551, 66:65-67.)3 The specification further states that the “goal
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`of the storage modules” is “to store non-negligible amounts of energy transferred
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`from the EM signal.” (Id., 100:4-6.) It specifically distinguishes storage elements
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`from holding elements on this basis:
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`Holding modules…identify systems that store negligible amounts of
`energy …. Storage modules…on the other hand, refer to systems that
`store non-negligible amounts of energy ….
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`(Ex. 2020-’551, 66:59-67.) The term “storage element” should be construed
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`accordingly. Martek Biosciences Corp. v. Nutrinova, Inc., 579 F.3d 1363, 1380
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`(Fed. Cir. 2009) (“When a patentee explicitly defines a claim term in the patent
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`specification, the patentee’s definition controls.”).
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`3 The ’551 patent uses the term “storage module,” whereas the remaining claims use
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`“storage element.” As PO admits (e.g., POR, 55), “storage module” and “storage
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`element” are synonymous in the context of the ’474 patent.
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`4
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`PO previously argued for, and the Board relied upon, a construction of
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`“storage module” nearly identical to the one Intel proposes here. In IPR2014-00948,
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`PO argued that “a storage module” in USP 6,370,371—a patent that also
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`incorporates the ’551 patent—should be construed to mean “an apparatus that stores
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`non-negligible amounts of energy from the carrier signal.” (Ex. 1038-POPR, 37.)
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`In fact, PO argued that the patent “explicitly defines a storage module” in this
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`manner (id., 21), and the Board expressly relied upon PO’s statements. (Ex. 1039-
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`ID, 10.)
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`2.
`PO’s Proposed Construction
`PO agrees that a “storage element” “stores nonnegligible amounts of energy
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`from an input electromagnetic signal,” but proposes to modify the patent’s definition
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`by also requiring the “storage element” to be part of “an energy transfer system,”
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`which PO states is synonymous with an “energy sampling” system. (POR, 52, 55-
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`60.)4 PO then interprets this proposed construction as implicitly requiring further
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`limitations, including, for example, a low-impedance load. (POR, 39, 59, 73.) PO’s
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`proposed construction should be rejected.
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`First, as explained above, PO previously admitted that the incorporated ’551
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`patent “explicitly defines” this term (Ex. 1038-POPR, 21), but PO’s proposed
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`addition—“of an energy transfer system”—appears nowhere in the patent’s
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`definition. (Supra §II.A.1.)
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`Second, PO mistakenly extrapolates from embodiments in which a storage
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`element is used in an energy transfer system to conclude that a storage element is
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`defined as an element of an energy transfer system. For example, PO incorrectly
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`relies on a statement from the ’551 patent describing a particular energy transfer
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`system that “includes … a storage module.” (POR, 56). This statement does not
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`4 The POR contains a long discussion of a supposed distinction between “energy
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`sampling” and “voltage sampling.” (POR, 38-49.) That discussion, largely lifted
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`from PO’s briefing in IPR2020-01265, is irrelevant to the issues raised here.
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`Moreover, as Intel explained in that IPR, neither the ’551 patent nor the ’474 patent
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`even uses the term “energy sampling” or “voltage sampling.” (See Ex. 1048, 4-9.)
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`6
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`define a storage module but merely describes an energy-transfer embodiment: “The
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`energy transfer system 8202 includes a switching module 8206 and a storage module
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`….” (Ex. 2020-’551, 66:56-59.) Moreover, the rest of the same passage directly
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`supports Intel’s construction: “Storage modules … refer to systems that store non-
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`negligible amounts of energy from an input EM signal.” (Ex. 2020-’551, 66:65-67.)
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`Similarly, the figures that PO cites—Figures 51A, 51B, 68G, and 82B (POR, 57-
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`58)—show a “storage module” or “storage capacitance” in an “energy transfer”
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`embodiment, but none of these figures limits a storage module to be an element of
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`an “energy transfer system”—any more than they suggest that the switches or
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`resistors also shown in those figures should be limited to elements “of an energy
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`transfer system.” (Id.)
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`Third, PO’s interpretation of its “storage element” construction to implicitly
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`require additional limitations is also incorrect. To take just one example, PO’s
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`argument that an energy transfer system requires a low-impedance load is directly
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`contradicted by claim 68 of the ’551 patent, which depends from claim 1 (via claims
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`66 and 64). (Ex. 2020-’551, claim 68.) Claim 68 expressly states that the energy
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`transfer method of claim 1 can drive both “high impedance loads and low impedance
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`loads.” (Id.) Dr. Steer admitted at his deposition in IPR2020-01265 that he had not
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`considered the ’551 patent claims when preparing his opinions. (Ex. 1040-’444-
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`Steer-Dep., 80:14-16; 86:12-21.)
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`B.
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`PO’s Remaining Claim Construction Arguments are Irrelevant
`and Wrong
`PO’s arguments regarding two additional terms (POR, 52, 60) are irrelevant
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`and without merit.
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`1.
`“Switch”
`The parties agree that a “switch” is “an electronic device for opening and
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`closing a circuit,” but dispute whether it requires an “independent control input.”
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`(POR, 2, 53.) PO does not dispute, however, that the cited references disclose an
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`independent control input. Thus, the Board need not construe this term to resolve
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`this IPR. See Vivid Techs., Inc. v. Am. Sci. & Eng'g, Inc., 200 F.3d 795, 803 (Fed.
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`Cir. 1999) (The Board is required to construe “only those terms...that are in
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`controversy, and only to the extent necessary to resolve the controversy.”).
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`2.
`“Combining Module”
`Intel proposed construing “combining module” in claim 1 under §112, ¶6
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`(Pet., 32), whereas PO argues that “combining module” should be given its plain and
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`ordinary meaning. (POR, 52.) But PO does not dispute that the prior art discloses
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`the “combining module” under either a means-plus-function or plain-and-ordinary
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`meaning construction. (Pet., 33; POR, 60.) As a result, the Board need not construe
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`this term. See Vivid Techs., 200 F.3d at 803.
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`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`3.
`PO’s accusations of “gamesmanship” are unfounded
`PO criticizes Intel for not proposing in its Petition a construction for “switch”
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`or “storage element”—terms that the parties have since disputed in district court.
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`(POR, 52.) But the construction of those terms became a matter of dispute only after
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`the Petition was filed. (Ex. 1041.) PO’s allegations of gamesmanship are
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`particularly unfounded given that PO itself previously proposed in other IPR
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`proceedings the same construction for “storage element” that Intel proposes here
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`but failed to notify the Board of this prior position. (Ex. 1038-POPR, 21.)
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`III. THE INVALIDITY OF CLAIM 12 IS UNCONTESTED
`PO provides no argument that claim 12 is valid and instead states that it will
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`disclaim claim 12. (POR, 1.) Petitioner requests that the Board find claim 12
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`invalid.
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`IV. ASSUMING THE REMAINING CLAIMS REQUIRE SAMPLING,
`LARSON AND BUTLER DO NOT INVALIDATE THEM
`PO contends that the Petition’s cited references (Larson and Butler) fail to
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`invalidate the remaining claims because the references disclose devices that down-
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`convert by mixing not by sampling. As explained above, PO repeatedly states in the
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`POR that the ’474 patent claims require a particular form of down-conversion by
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`sampling. (POR, 2, 20, 22, 39.) As also explained above in the Introduction, Intel
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`now agrees that the claims require down-conversion by sampling, based on the
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`disclosure of the incorporated ’551 patent.5 (See supra pp. 1-2.) By way of example:
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`• The Summary of the Invention in the ’551 patent explains that “the
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`present invention” is “directed to methods, systems, and apparatuses
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`for down-converting an electromagnetic (EM) signal by aliasing the
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`EM signal.” (Ex. 2020-’551, 2:53-56.) There is no dispute that the
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`term “aliasing” requires sampling. (Id., 19:49-51 (“When a signal is
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`sampled at less than or equal to twice the frequency of the signal, the
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`signal is said to be … aliased.”).)
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`• The ’551 patent expressly distinguishes the alleged invention from
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`existing “conventional systems” on the basis of performing down-
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`5 Intel reached this conclusion only after filing the Petition, based on further analysis
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`of the incorporated ’551 patent. When Intel reached this conclusion, it proposed in
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`the district court that “frequency down-conversion module” (from ’474 patent claim
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`1) requires down-conversion by sampling, and Intel promptly notified the Board of
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`this position on the same day the parties filed opening claim construction briefs.
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`(Paper 5 (Petitioner’s Supplemental Notice Regarding Claim Construction) at 1.)
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`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`conversion by “aliasing” the input signal. (Id., 19:55-57 (“Contrary to
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`conventional wisdom, the present invention is a method and system for
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`down-converting an electromagnetic (EM) signal by aliasing the EM
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`signal.”).)
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`• The patent also repeatedly describes both modes of the invention—
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`“under-sampling” and “transferring energy”—as down-converting at
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`an aliasing rate, as shown in Figure 45A below.
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`(See, e.g., id. 20:63-21:2; id. 21:3-7; id. 22:12-17; id. 26:64; id. 31:14-
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`15; id. 31:21-25; id. 62:59; id. 68:16-20; id. 72:52-55.)
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`• Consistent with these disclosures, every disclosed embodiment requires
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`down-converting by aliasing; there are no embodiments describing any
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`other type of down-conversion. (See generally ’474 patent, Abstract
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`(“Methods, systems, and apparatuses for down-converting an
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`electromagnetic (EM) signal by aliasing the EM signal, and
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`applications thereof are described herein.”).)6
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`6 The parties disagree about which claim term the “sampling” requirement arises
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`from. Intel’s position is that the claims require sampling because the ’551 patent
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`makes clear that the “frequency down-conversion module” (’474 patent claim 1)
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`requires down-converting a signal at an aliasing rate, which necessarily involves
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`sampling, as explained above. PO instead contends that the sampling requirement
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`arises from the term “storage element.” (POR, 55-60.) Since the parties agree that
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`sampling is required by the remaining claims, the Board need not decide precisely
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`which claim term requires sampling in order to construe the claims and resolve the
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`Petition.
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`It is also undisputed that Larson and Butler disclose mixers, not samplers.
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`Thus, assuming that the Board agrees with the parties that the remaining claims
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`require down-conversion by sampling, Intel agrees that Larson and Butler do not
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`invalidate those claims.
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`To be clear, Intel does not agree that the claims are valid. To the contrary,
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`Intel continues to believe the claims are invalid because down-conversion by
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`sampling—though not disclosed in Larson or Butler—was well known prior to the
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`filing date of the ’474 patent. For example, PO concedes that down-conversion by
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`sampling was known at least by 1997. (POR, 61 (“Larson … has a copyright date
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`of 1997. … At this time, the radio industry was focused on … sample-and-hold
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`(voltage sampling) solutions for the down-conversion (including direct down-
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`conversion) of RF signals.”)); Ex. 1036-Steer-Dep., 69:7-8 (“So prior to 1998, there
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`were many sample-and-hold circuits they commonly sub-sampled.”); id., 82:19-83:5
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`(“Q. And so sampling to down-convert[] was known before 1999. Correct? ...
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`A. Sampling was used in part of a down-conversion system. [] Q. Before 1999.
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`Correct? ... A. That is my understanding.”).)
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`V.
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`IF THE CLAIMS DO NOT REQUIRE SAMPLING, THE CLAIMS
`ARE INVALID OVER LARSON AND BUTLER
`In the event the Board does not agree with the parties that the ’474 claims are
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`limited to systems that down-convert by sampling, then the claims are invalid over
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`Larson and Butler, as explained in Intel’s Petition. The only terms that PV alleges
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`are not disclosed by the cited references are “switch” (claim 1), “storage element”
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`(claim 1), “pulse” (claim 7), and “low pass filter” (claim 11). The cited prior art
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`discloses each element.
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`A. Larson and Butler each disclose “switch[es]”
`PO argues that Larson and Butler’s FETs (field-effect transistors) are not
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`switches because they allegedly “are operating as continuous time-varying resistors”
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`and therefore do not alternate between two states: on (conducting) and off (non-
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`conducting). (POR, 71-72; Ex. 2027-Steer-Decl., ¶222; id., ¶226 (“Unlike a FET
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`used as a switch, a FET used as a continuous time-varying resistor does not open
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`and close; it does not have two states.”); POR, 65.)
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`PO’s argument is wrong on two counts: (1) PO is improperly reading an
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`additional limitation into the claims—a requirement that the claimed “switch”
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`alternate between two ideal states (conducting and non-conducting); and (2) PO
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 18 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 19 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`misinterprets the prior art (POR, 63-66), which in fact discloses that the FETs will
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`regularly alternate between conducting and non-conducting states.
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`First, the language that the parties have agreed upon for the construction of
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`“switch”—i.e., “an electronic device for opening and closing a circuit”—does not
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`require two distinct states (conducting and non-conducting) but instead requires only
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`“opening and closing a circuit.” (POR, 52-53.) It is undisputed that the resistance of
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`Larson’s FETs varies over time, causing more or less current to flow. (POR, 72; Ex.
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`2027-Steer-Decl., ¶226.) This variation in resistance gradually opens and closes the
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`circuit and is consistent with the intrinsic record, which does not require a switch to
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`reach ideal conducting and non-conducting states. The ’551 patent expressly states
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`that switches need not be ideal and reach levels that achieve absolute conducting or
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`non-conducting states but rather can open and close circuits by varying their
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`resistance (i.e., impedance) over time to reach “relatively” high and low levels. (Ex.
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`2020-’551, 56:25-32 (“The switch module…preferably has a relatively low
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`impedance [(i.e., resistance)] when closed and a relatively high impedance [(i.e.,
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`resistance)] when open…. The switch device need not be an ideal switch device.”).)
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`(Ex. 1037-Reply-Decl. ¶6.)
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`Second, even if the claims required a switch that reached ideal on
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`(conducting) and off (non-conducting) states, Larson discloses such switches. PO
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 19 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 20 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`relies almost entirely on one sentence from Larson that states its mixer “operates
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`entirely in its linear region” to conclude that Larson’s FETs never turn off. But a
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`complete reading of Larson shows that its FETs operate in their linear region when
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`they are conducting, but that they also enter a non-conducting state. Larson’s FETs,
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`in other words, alternate between an on state and an off state. (Ex. 1037-Reply-
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`Decl. ¶7.)
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`Larson’s FET may be understood by analogy to a valve controlling the flow
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`of water through a pipe, illustrated below.
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 20 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 21 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`The amount of current (water flow) that goes through the FET from left to right
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`depends on both (1) the voltage (water pressure) across the transistor from left to
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`right (referred to as VD or VDS for drain-to-source voltage), and (2) the control voltage
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`(control pressure) applied to the transistor’s gate (referred to as VG or VGS for gate-
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`to-source voltage), which opens and closes the pipe.
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`When the gate voltage is below a certain level (called the threshold voltage),
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`the transistor is completely closed, and no current can pass, as shown in the top
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`graphic above. The transistor is then referred to as being in the “cutoff” or “pinch-
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`off” region because all current is cut off. (Ex. 2027-Steer-Decl., ¶211 (“The cutoff
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`region … is the operating region in which VGS is less than a critical voltage, which
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`is the threshold voltage of the transistor. In this region, the conductive channel is
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`closed and there is no flow of current between the drain and source.”); id., ¶216; Ex.
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`1036-Steer-Dep., 98:4-5 (“You either call it the cutoff region or pinch-off region.”).)
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`But as the control voltage (control pressure) applied to the gate increases, the
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`transistor starts to open and allows current to pass. The gate voltage VGS in effect
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`determines how much “room” there is for current to pass. (Ex. 1037-Reply-Decl.,
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`¶¶11-16.).)
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`Larson’s statements about biasing its FETs make clear that the FETs turn off
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`and on. Biasing refers to establishing a transistor’s quiescent point—the transistor’s
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 21 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 22 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`baseline state from which it operates in the absence of an applied signal. (Ex. 1042-
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`Bentley, 180; Ex. 1043-IEEE-Dict., 852; Ex. 1036-Steer-Dep., 90:12-20.) Larson
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`states that its FETs should be biased “at” or “near pinchoff.” (Ex. 1005-Larson,
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`273 (“[T]he gate may be dc biased, usually near pinchoff ….”); id., 275 (“The
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`optimum dc gate bias is usually at or below pinchoff.”).)7 By biasing “at” pinchoff,
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`the FET’s baseline voltage is established at the border between conducting and not
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`conducting current. (Ex. 1037-Reply-Decl., ¶¶17, 21-22.) In Dr. Steer’s figure
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`below, Larson’s FET’s bias point (red) is near the edge of the non-conducting purple
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`region.8
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`7 That Larson’s FET may be biased below pinchoff (i.e., operating from a baseline
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`state of not conducting) further confirms that it operates in both a conducting state
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`(as PO admits) and in a non-conducting state.
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`8 Larson states that VDS (drain-to-source voltage) is kept near zero, so the FET
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`operates at the far left of Dr. Steer’s figure. (Ex. 1005-Larson, 273 (describing
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`“keeping the drain voltage [of the FET] at zero (except, of course, for the small-
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`signal RF and IF voltages) where it is most linear.”).)
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 22 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 23 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`(Ex. 2027-Steer-Decl., ¶209 (annotated).)
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`Larson also states that the local oscillator (LO) signal is applied to the gate
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`(Ex. 1005-Larson, 273 (“[T]he LO is applied to the gate.”)), and it is well-known
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`that such an oscillating signal will cycle between positive and negative voltages. So
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`when the oscillating LO voltage is added to the gate’s baseline voltage, the gate
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`voltage will fluctuate around its bias point. Because the FET’s bias point is at the
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`border between conducting and non-conducting regions, this fluctuation causes the
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 23 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 24 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`FET to enter a conducting region when LO is positive, and a non-conducting region
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`when LO is negative. In Dr. Steer’s figure, the fluctuating gate voltage will cause
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`the FET to move between the purple pinchoff region and the green linear region.
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`(Ex. 2027-Steer-Decl., ¶209 (annotated).)
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`Thus, Larson’s disclosure of biasing a gate at or near pinchoff, and then applying an
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`oscillating signal, means the FET fluctuates between conducting and non-
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`conducting states. (Ex. 1037-Reply-Decl., ¶23.)
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` PO points to Larson’s statement that “[t]he FET then operates entirely in its
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`linear region,” (i.e., a conducting region) (POR, 66) but ignores Larson’s preceding
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`sentence about biasing the gate “near pinchoff” (Ex. 1005-Larson, 273). As
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`explained above, such biasing means that the FET will sometimes be in the cutoff
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`region and therefore off. Thus, the subsequent statement that Larson’s FET
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`Case 6:20-cv-00108-ADA Document 117-7 Filed 03/21/22 Page 24 of 40Case 6:21-cv-00520-ADA Document 37-8 Filed 03/30/22 Page 25 of 41
`Petitioner’s Reply to Patent Owner’s Response
`IPR2020-01302 (U.S. Patent No. 7,539,474)
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`“operates entirely in its linear region,” when read in context, refers to when the FET
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`is on and conducting current. Larson is simply stating that the FET, when
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`conducting, will operate in a particular conducting region (linear region) rather than
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`another conducting region (saturation region). This understanding is confirmed by
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`Larson’s description of other FETs that are biased using the same strategy, i.e., at or
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`near the edge of the pinchoff region. Larson says these FETs are “switch[ed]” “on
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`and off on alternate half cycles,” and “when on,” these FETs “remain in their linear
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`region.” (See, e.g., Ex. 1005-Larson, 271 (“[T]he LO simply switches the two upper
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`FETs on and off on alternate ha
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