Case 6:21-cv-00520-ADA Document 36-5 Filed 03/16/22 Page 1 of 44
`Case 6:21-cv-00520-ADA Document 36-5 Filed 03/16/22 Page 1 of 44
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`EXHIBIT 2
`EXHIBIT 2
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`Case 6:20-cv-00108-ADA Document 57 Filed 11/20/20 Page 1 of 43Case 6:21-cv-00520-ADA Document 36-5 Filed 03/16/22 Page 2 of 44
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`UNITED STATES DISTRICT COURT
`WESTERN DISTRICT OF TEXAS
`WACO DIVISION
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` Plaintiff,
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`PARKERVISION, INC.,
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`
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` v.
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`INTEL CORPORATION,
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` Defendant.
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`Case No. 6:20-cv-00108
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`JURY TRIAL DEMANDED
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`PLAINTIFF PARKERVISION’S
`RESPONSIVE CLAIM CONSTRUCTION BRIEF
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`I.
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`II.
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`TABLE OF CONTENTS
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`Introduction. ....................................................................................................................1
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`Intel is pushing false narratives regarding under-sampling and aliasing rate. ....................2
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`A.
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`B.
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`C.
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`Under-sampling. ..................................................................................................2
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`Intel’s end-game regarding its “under-sampling” false narrative. ..........................3
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`Aliasing rate. ........................................................................................................4
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`III.
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`Disputed terms for construction. ......................................................................................5
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`A.
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`Energy “storage” module/element/device terms. ..................................................5
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` The constructions should include “of an energy transfer system” ...................6
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` The constructions should include “low impedance load” ................................9
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`B.
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`“modulated carrier signal” (’528 patent, claims 1, 5, 14) .................................... 10
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`“switch” (’528 patent, claims 1, 5, 17; ’444 patent, claim 3; ’474 patent; claim 1;
`C.
`’513 patent, claim 19; ’518 patent, claim 50; ’736 patent, claims 1, 11; ’673 patent,
`claims 1, 13); “switching device” (’725 patent, claim 1; ’528 patent, claim 8); “switching
`module” (’902 patent, claim 1) ...................................................................................... 12
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`D.
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`“sampling aperture” (’528 patent, claim 1) ......................................................... 15
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`“a down-converted signal being generated from said sampled energy” (’902
`E.
`patent, claim 1) .............................................................................................................. 15
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`“the [] switch is coupled to the [] storage element at a [] node and coupled to a []
`F.
`reference potential” (’474 patent, claim 1) ..................................................................... 19
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`G.
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`H.
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`“under-samples” (’444 patent, claim 2; ’474 patent, claim 6) ............................. 20
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`The six terms (11 claims) into which Intel seeks to inject “aliasing rate” ............ 23
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` “aliasing module” (’725 patent, claim 1) ...................................................... 24
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` Preamble terms ............................................................................................ 25
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` Frequency down-conversion terms ............................................................... 27
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` “universal frequency down-converter” (’518 patent, claim 50) ..................... 28
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` “energy transfer module” (’902 patent, claim 1) ........................................... 29
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`i
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`“a capacitor that reduces a DC offset voltage in said first down-converted signal
`I.
`and said second down-converted signal” (’444 patent, claim 4)...................................... 30
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`J.
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`“DC offset voltage” (’444 patent, claim 4) ......................................................... 31
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`K.
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`Terms alleged to be indefinite. ........................................................................... 32
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` “the energy discharged during any given discharge cycle is not completely
`discharged” (’528 patent, claim 9; ’736 patent, claims 1, 11) .............................. 32
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` “separate integration module” (’528 patent, claim 17) .................................. 35
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` “substantially the same size” (’902 patent, claim 5) ..................................... 36
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` Percentage terms .......................................................................................... 37
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`ii
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`TABLE OF AUTHORITIES
`
`
`
`Page(s)
`
`
`
`Cases
`
`Andrew Corp. v. Gabriel Elecs. Inc.,
`
`847 F.2d 819 (Fed. Cir. 1988) ............................................................................................. 36
`
`CBT Flint Partners, LLC v. Return Path, Inc.,
`654 F.3d 1353 (Fed. Cir. 2011) ............................................................................................ 34
`
`Deere & Co. v. Bush Hog, LLC,
`703 F.3d 1349 (Fed. Cir. 2012) ............................................................................................ 36
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) .............................................................................................. 8
`
`Presidio Components, Inc. v. Am. Tech. Ceramics Corp.,
`875 F.3d 1369 (Fed. Cir. 2017) ............................................................................................ 37
`
`Sonix Tech. Co. v. Publications Int’l, Ltd.,
`844 F.3d 1370 (Fed. Cir. 2017) ............................................................................................ 37
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`Warsaw Orthopedic, Inc. v. NuVasive, Inc.,
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`824 F. 3d 1344 (Fed. Cir. 2016) .......................................................................................... 19
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`iii
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`
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`I.
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`Introduction.
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`Intel’s brief reeks of gamesmanship. Intel creates a false narrative around the technology,
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`attempts to improperly add a specific “aliasing rate” limitation into carefully chosen locations in
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`all asserted claims (when the term/concept is already in the claims elsewhere), ignores portions
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`of the patentee’s lexicography, seeks to limit claims to preferred embodiments, and avoids
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`reading the claims in view of the specification.
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`Intel’s attempt to add “aliasing rate” into the claims is particularly egregious. Intel spends
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`a significant portion of its brief making it appear as if the concept of aliasing rate is essential to
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`the patented technology, but omitted from the claims. Not so. To the contrary, “aliasing rate” or
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`equivalent language is already recited in the claims. Intel is simply not happy with where
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`“aliasing rate” is recited in the claims because Intel infringes the claims as written.
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`Tellingly, Intel’s brief also fails to mention that the U.S. District Court for the Middle
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`District of Florida (Jacksonville and Orlando Divisions)1 issued claim constructions for certain
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`disputed terms, which ParkerVision adopts as its constructions.2 Though such decisions are not
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`binding on this Court, they are informative and Intel cannot ignore them by just keeping silent.
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`Indeed, the Jacksonville and Orlando courts considered and rejected the same arguments that
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`Intel now raises before this Court. For the foregoing reasons, ParkerVision’s constructions
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`should be adopted and Intel’s constructions and indefiniteness arguments should be rejected.
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`1 ParkerVision brought several lawsuits against Qualcomm in the Jacksonville and Orlando
`Divisions for infringement of patents related to the patents-in-suit.
`2 Instead of discussing relevant United States district court decisions, Intel opens its brief by
`mentioning a case between ParkerVision and Apple in Germany involving a German patent with
`different claims and a different specification, which was resolved under German law. See Intel
`Br. at 1.
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`1
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`II.
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`Intel is pushing false narratives regarding under-sampling and aliasing rate.
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`ParkerVision addresses Intel’s false narratives up front in this brief because correcting
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`these narratives demonstrates why Intel’s constructions are wrong.
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`A.
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`Under-sampling.
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`Rather than focusing on how the technology actually works, Intel relies on a naming
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`convention used in the patents-in-suit related to “under-sampling” to push forward with a false
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`narrative regarding the construction of the term “under-samples.”
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`Under-sampling is a process of taking samples of an electromagnetic signal (radio
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`frequency (RF) signal). Intel asserts that only sample and hold systems (voltage sampling) of the
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`patents-in-suit perform under-sampling. See Intel Br. at 19-22. Intel is wrong. As set forth in the
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`patents, under-sampling is performed in both (1) energy transfer systems (energy sampling) and
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`(2) sample and hold systems (voltage sampling).
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`Indeed, the patents-in-suit3 expressly disclose that energy transfer systems perform
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`under-sampling. For example, the specification states:
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`FIGS. 83A-F illustrate example timing diagrams for the energy transfer system
`8202 in FIG. 82. . . . FIG. 83C illustrates an example under-sampling signal 8304,
`including energy transfer pulses 8306 having non-negligible apertures …
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`’518 patent, 67:5-10.4 Figures 84A-D also disclose an energy transfer system. “The operation of
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`the energy transfer system 6302 shall now be described with reference to the flowchart 4619 and
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`the timing diagrams of FIGS. 84A-84D.” Id. at 92:63-65. The specification states that the FSK
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`signal 816 having frequency 8412 in Figure 84B is “under-sampled.” Id. at 92:25-26 (“When the
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`3 The patents-in-suit are U.S. patent Nos. 6,266,518; 6,580,902; 7,110,444; 7,539,474;
`8,588,725; 8,660,513; 9,118,528; 9,246,736; and 9,444,673.
`4 Since the ’518, ’902, ’513, ’528, ’736 and ’673 patents have the same disclosure regarding
`down-conversion and the ’444, ’474 and ’725 patents specifically incorporate those disclosures
`by reference, all citations in this brief will reference the ’518 patent unless otherwise noted.
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`2
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`second frequency 8412 is under-sampled, the PSK signal 8404 has a frequency of approximately
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`1 MHZ . . .”). So, contrary to Intel’s assertion, energy transfer systems perform “under-
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`sampling.”5
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`Though the patents-in-suit use “under-sampling system” to refer to systems that perform
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`sample and hold (voltage sampling), and use “energy transfer system” to refer to systems that
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`perform energy sampling, this is merely a naming convention to delineate the discussions
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`regarding these systems. The Jacksonville court recognized this. See D.I. 51-2 (Case No. 3:11-
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`cv-00719, Order dated Feb. 20, 2013) at 8 (“While the specifications sometimes use the term
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`‘under-sampling’ to distinguish certain systems from those systems that implement the disclosed
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`transferred energy methods, the specifications use the term more broadly in other places.”). As
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`such, the fact that an energy transfer system is not referred to as an “under-sampling system”
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`does not change the fact that energy transfer systems perform the process of under-sampling.
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`Accordingly, Intel’s false narrative is just wrong, and ignores explicit disclosures in the
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`specifications.
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`B.
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`Intel’s end-game regarding its “under-sampling” false narrative.
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`One of Intel’s non-infringement theories is that Intel chips do not sample using
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`“negligible apertures.”6 So, Intel attempts to inject “negligible apertures” into the construction of
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`5 The claims of the patents-in-suit also demonstrate that energy transfer systems perform under-
`sampling. For example, claim 97 of the ’518 patent recites “under-sampling . . . to transfer
`energy.” Transfer of energy is performed by an “energy transfer system.” Independent claim 1 of
`the ’474 patent recites a “storage element(s),” which Intel admits connotes an energy transfer
`system. D.I. 53 (“Intel Br”) at 36. Claim 6, which depends from claim 1, then recites “under-
`sampl[ing] an input signal.”
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`6 An aperture is a period of time (duration) during which a switch is ON (closed). A negligible
`aperture has almost a zero time duration (tend towards zero), whereas non-negligible apertures
`tend away from zero. ’518 patent, 31:17-19 (“The under-sampling signal 1906 includes a train of
`pulses 1907 having negligible apertures that tend towards zero time in duration.”); 66:26-28
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`3
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`“under-samples.” The reason why Intel creates the false narrative (see Section II.A above) that
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`“under-sampling” is performed only by sample and hold systems is because sample and hold
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`systems perform under-sampling using negligible apertures.
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`But as discussed in Section II.A above, energy sampling systems, which use non-
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`negligible apertures, also perform under-sampling. Indeed, in the Jacksonville court, Qualcomm
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`made the same argument that Intel makes here regarding “under-sampling.” The Jacksonville
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`court saw right through the argument and rejected Qualcomm’s attempt to limit “under-
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`sampling” to using only “negligible apertures.” D.I. 51-2 at 7-8.
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`
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`Notably, the lexicography for “under-samples” makes no mention of negligible or non-
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`negligible apertures.’518 patent, 18:19-21 (“When a signal is sampled at less than or equal to
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`twice the frequency of the signal, the signal is said to be under-sampled, or aliased.”). The reason
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`for this silence is because “under-sampling” can be performed using either non-negligible or
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`negligible apertures. As discussed in Section III.G below, “under-samples” should not be limited
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`to “negligible apertures.”
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`C.
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`Aliasing rate.
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`In an attempt to add a specific “aliasing rate” into carefully chosen locations in all
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`asserted claims (when the term/concept is already in the claims elsewhere), Intel spends a
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`significant portion of its brief pushing the false narrative that the concept of aliasing rate is
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`essential to the patented technology, but omitted from the claims.
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`An aliasing rate is the rate at which sampling occurs i.e., the rate at which a switch is
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`turned ON (closed). Intel infringes the claims as written. So, Intel is seeking to re-write all of the
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`asserted claims by injecting the language “aliasing rate (i.e., by sampling at less than or equal to
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`(“The energy transfer signal 8210 includes a train of energy transfer pulses having non-
`negligible pulse widths that tend away from zero time in duration.”); 67:8-11.
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`4
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`twice the frequency of the modulated carrier signal)” into carefully chosen locations/terms found
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`in all eleven asserted independent claims. Tellingly, Intel is seeking to add this “aliasing rate”
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`into the broader system, apparatus, module and converter terms and pull the concept of “aliasing
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`rate” away from where the patentees already included “aliasing rate” or equivalent language in
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`the claims – i.e., the component terms (switch, pulse generator) and wherein clauses. D.I. 51
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`(“ParkerVision Op. Br.”) at 28-34.
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`Intel takes this approach because it wants to be able to draw a box around multiple
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`components of an Intel chip and argue that these components, when taken together (as part of a
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`system, apparatus, module, converter), do not sample at the specific aliasing rate Intel proposes.
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`But neither the claims nor the specification support Intel’s re-write.
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`Recognizing that a proper legal analysis prohibits the addition of “aliasing rate” into the
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`claims (see ParkerVision Op. Br. at 28-34 and Section III.H below), Intel resorts to theatrics and
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`hand-waving – asserting that down-converting by aliasing is critical to the invention. But instead
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`of asking the Court to analyze the disputed claim terms individually (which is the proper
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`analysis), Intel asks the Court to take a global approach to claim construction and include
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`“aliasing rate” in all of Intel’s carefully selected terms. Again, Intel takes this global selective
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`approach because, as discussed in Section III.H below, it has no legal basis to stand on for the
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`Court to read “aliasing rate” into the claims.
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`III. Disputed terms for construction.
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`A.
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`Energy “storage” module/element/device terms.
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`Claim Terms
`“energy storage element”
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`’528 patent, claim 1
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`ParkerVision’s Construction
`“an element of an energy
`transfer system that stores non-
`negligible amounts of energy
`from an input electromagnetic
`signal for driving a low
`impedance load”
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`5
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`Intel’s Construction
`“an element that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
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`“energy storage module”
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`’902 patent, claim 1
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`“energy storage element”
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`’513 patent, claim 19
`’736 patent, claims 1, 11
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`“energy storage device”
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`’673 patent, claim 13
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`“storage element”
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`’444 patent, claim 3
`’474 patent, claim 1
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`“storage module”
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`’725 patent, claim 1
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`
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`“a module of an energy transfer
`system that stores non-negligible
`amounts of energy from an input
`electromagnetic signal for
`driving a low impedance load”
`“an element of an energy
`transfer system that stores non-
`negligible amounts of energy
`from an input electromagnetic
`signal for driving a low
`impedance load”
`“a device of an energy transfer
`system that stores non-negligible
`amounts of energy from an input
`electromagnetic signal for
`driving a low impedance load”
`“an element of an energy
`transfer system that stores non-
`negligible amounts of energy
`from an input electromagnetic
`signal for driving a low
`impedance load”
`“a module of an energy transfer
`system that stores non-negligible
`amounts of energy from an input
`electromagnetic signal for
`driving a low impedance load”
`
`“a module that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
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`“an element that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
`
`“a device that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
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`“an element that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
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`“a module that stores a non-
`negligible amount of energy from
`an input electromagnetic (EM)
`signal”
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`
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`The constructions should include “of an energy transfer system”
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`By their constructions, the parties agree that a storage module/element/device7 “stores
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`non-negligible amounts of energy from an input electromagnetic (EM) signal.” Intel Br. at 34.
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`And in its brief, Intel admits that a “storage” module is a term reserved for energy transfer
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`systems: “[T]he specifications state that the ‘energy transfer’ mode uses ‘a storage module’ . . .
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`whereas the ‘under-sampling’ [i.e., sample and hold] mode utilizes a ‘holding module’ . . . .”
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`Intel Br. at 36; see also id. (“The patents distinguish storage modules from holding modules . . .
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`.”). As such, there should be no dispute that “energy transfer system” should be included in the
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`7 “Storage module” will be used as shorthand for a “storage” module, element or device.
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`6
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`construction as ParkerVision proposes – “an [element/ module/device] of an energy transfer
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`system that stores non-negligible amounts of energy from an input electromagnetic signal.”
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`Intel has no reason to argue against this language in ParkerVision’s construction because,
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`by its own admission, Intel acknowledges this is correct. Intel Br. at 35-36. Yet, Intel seeks to
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`omit any mention of “an [element/ module/device] of an energy transfer system.” It only does so
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`to protect its invalidity case.
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`Tellingly, Intel provides no substantive arguments based on the intrinsic evidence as to
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`why including “an [element/ module/device] of an energy transfer system” is wrong. Instead,
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`Intel seeks to avoid the issue altogether by hand-waving. In doing so, Intel points to a single
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`sentence from the specification (shown in red below) and asserts that this passage is enough to
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`define the “storage” terms.8 But Intel knows this is false.
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`FIG. 82A illustrates an exemplary energy transfer system 8202 for down-
`converting an input EM signal 8204. The energy transfer system 8202 includes a
`switching module 8206 and a storage module illustrated as a storage capacitance
`8208. The terms storage module and storage capacitance, as used herein, are
`distinguishable from the terms holding module and holding capacitance,
`respectively. Holding modules and holding capacitances, as used above, identify
`systems that store negligible amounts of energy from an under-sampled input EM
`signal with the intent of ‘holding’ a voltage value. Storage modules and storage
`capacitances, on the other hand, refer to systems that store non-negligible
`amounts of energy from an input EM signal.
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`’518 patent, 66:11-23. The entire paragraph above is describing a “storage” module in the
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`context of an energy transfer system (shown in green above) which, as Intel admits, is the only
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`8 Intel cites to another portion of the specification for the proposition that the goal of storage
`modules is to store non-negligible amounts of energy. Intel Br. at 35. “The goal of the storage
`modules 6506 and 6716 is to store non-negligible amounts of energy transferred from the EM
`signal 1304. ’528 patent, 106:8-10. While storage of non-negligible amounts of energy is
`certainly one goal of storage modules, it is not the only goal nor is this feature the only thing that
`defines what it means to be a “storage” module.
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`7
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`system that has a “storage” module. Intel Br. at 35-36. Indeed, this passage is found in the
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`section entitled “0.1.2 Introduction to Energy Transfer.” As such, there is no basis for Intel to
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`argue against including the language “an [element/ module/device] of an energy transfer
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`system.”
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`To further bolster its position, Intel argues that Intel’s construction of the “storage” terms
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`is the same as ParkerVision’s proposed construction of “storage module” in IPRs from 2014. But
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`this actually cuts against Intel’s argument. As the Court is aware, in 2014, the standard used by
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`the USPTO for construing terms was the broadest reasonable interpretation (BRI) – a different
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`standard than the one federal courts use – Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005)
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`and its progeny. Indeed, in 2018, the USPTO eliminated the BRI standard and harmonized the
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`USPTO standard with the standard federal courts use. In the IPR, ParkerVision cited the same
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`passage quoted above (’518 patent, 66:11-23) and, under the broadest reasonable interpretation,
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`focused on the last sentence (shown in red above). D.I. 54-27 at -6975-6976. The standard that
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`federal courts use, however, requires a review of the passage as a whole, which is what
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`ParkerVision has done in proposing its construction in this case.
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`At bottom, Intel is simply attempting to avoid any mention of energy storage and use an
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`overly broad construction of the “storage” terms to achieve a bait-and-switch. In its brief, Intel
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`admits that the “storage” modules are components of an energy transfer system, and “holding”
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`modules are components of a sample and hold (“holding”) system. Intel Br. at 35-36. Yet, based
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`on Intel’s positions in its invalidity contentions, Intel will later assert that “holding” modules in
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`its prior art references are actually “storage” modules of an energy transfer system. Intel’s
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`gamesmanship should be rejected. Because Intel admits that a “storage” module is a term
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`8
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`reserved for energy transfer systems, and has no basis to dispute this based on the specifications’
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`disclosures, ParkerVision’s construction is proper and should be adopted.
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`The constructions should include “low impedance load”
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`In view of the foregoing, the only language truly in dispute between the parties is
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`ParkerVision’s language “for driving a low impedance load.” A “low impedance load,” however,
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`goes to the heart of what makes a module, a “storage” module (used in energy sampling) as
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`opposed to a “holding” module (used in sample and hold). Using a high impedance load instead
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`of a low impedance load, the module would “hold” energy, making it a “holding” module, not a
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`“storage” module.9 This is the reason the specification specifically makes a point to say that
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`“holding” modules “hold[] a voltage value.” Intel wants to ignore this portion of the
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`lexicography because it is not helpful to Intel’s case.
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`The terms storage module and storage capacitance, as used herein, are
`distinguishable from the terms holding module and holding capacitance,
`respectively. Holding modules and holding capacitances, as used above, identify
`systems that store negligible amounts of energy from an under-sampled input EM
`signal with the intent of ‘holding’ a voltage value.
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`’518 patent, 66:15-21. The way in which “holding” modules “hold” a voltage value is by using a
`
`high impedance load. ParkerVision Op. Br. at 16. As such, a “storage” module is not using a
`
`high impedance load.
`
`So what type of load is a “storage” module using? The specification explains that. With
`
`regard to loads, it is a binary choice – it is either high or low impedance.
`
`Recall from the overview of under-sampling that loads can be classified as high
`impedance loads or low impedance loads. A high impedance load is one that is
`relatively insignificant to an output drive impedance of the system for a given
`output frequency. A low impedance load is one that is relatively significant.
`
`
`9 A high impedance load restricts the flow of current, while a low impedance load permits
`current to flow.
`
`9
`
`

`

`
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`Case 6:20-cv-00108-ADA Document 57 Filed 11/20/20 Page 14 of 43Case 6:21-cv-00520-ADA Document 36-5 Filed 03/16/22 Page 15 of 44
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`
`
`’518 patent, 66:56-61. As such, because a “storage” module is not using a high impedance load,
`
`it must necessarily be using a low impedance load. This portion of the lexicography should not
`
`be ignored and, therefore, is included in ParkerVision’s construction.
`
`In order to down-play the importance of low impedance loads, Intel asserts that driving
`
`low impedance loads is a “potential” benefit that is not a required limitation. Intel Br. at 37. But
`
`that is not what the specification says. The specification states that in energy transfer systems (in
`
`particular, “storage” modules) effectively driving a low impedance load is a benefit (it
`
`necessarily occurs), not a “potential” benefit (may occur) as Intel suggests.
`
`Another benefit of the energy transfer system 8202 is that the non-negligible
`amounts of transferred energy permit the energy transfer system 8202 to
`effectively drive loads that would otherwise be classified as low impedance loads
`in under-sampling systems and conventional sampling systems.
`
`’518 patent, 66:61-66. But more importantly, as discussed above, low impedance load is part of
`
`the lexicography and should not be ignored.
`
`For the foregoing reasons, Intel’s gamesmanship should be rejected and ParkerVision’s
`
`construction should be adopted.
`
`B.
`
` “modulated carrier signal” (’528 patent, claims 1, 5, 14)
`
`ParkerVision’s Construction
`“electromagnetic signal at transmission
`frequency having at least one characteristic
`that has been modulated by a baseband
`signal”
`
`
`
`Intel’s Construction
`“a carrier signal that is modulated by a
`baseband signal”
`
`Intel’s construction is incomplete. In particular, the specification provides lexicography
`
`for the term “carrier signal,” from which ParkerVision derives its construction. Intel, however,
`
`improperly seeks to ignore this additional lexicography: “The term carrier signal, when used
`
`herein, refers to an EM wave [i.e., electromagnetic signal] having at least one characteristic that
`
`may be varied by modulation, that is capable of carrying information via modulation.” ’528
`
`10
`
`

`

`
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`
`
`patent, 21:36-39. The EM wave being referred to is the wave that is transmitted over the air, i.e.,
`
`at a transmission frequency. ParkerVision Op. Br. at 18. ParkerVision’s construction captures
`
`this. Tellingly, though Intel argues against ParkerVision’s construction, Intel never says that
`
`ParkerVision’s construction is incorrect. Intel is merely seeking to provide itself leeway to argue
`
`its invalidity case later on.
`
`In order to bolster its position, Intel erroneously points to a construction ParkerVision and
`
`Qualcomm agreed to in 2012 for the term “modulated carrier signal” in the ’551 patent, which is
`
`a different patent, but not the ’528 patent, which is the patent-in-suit in this case where the
`
`disputed term is found. Intel Br. at 38-39. What Intel neglects to mention is that, more recently,
`
`in 2019, with regard to the ’528 patent (the patent-in-suit here), ParkerVision and Qualcomm
`
`agreed to a construction of “modulated carrier signal,” which is the same construction
`
`ParkerVision proposes here – “electromagnetic signal at transmission frequency having at least
`
`one characteristic that has been modulated by a baseband signal.” D.I. 51-1 (Case No. 3-15-cv-
`
`1477, Order dated July 15, 2019) at 28.
`
`For the foregoing reasons, Intel’s gamesmanship should be rejected and ParkerVision’s
`
`construction should be adopted. Intel does not argue that ParkerVision’s construction is wrong,
`
`but instead proposes a construction that is incomplete and ignores the patentee’s full
`
`lexicography. Moreover, ParkerVision’s construction is the one Qualcomm and ParkerVision
`
`agreed to just last year in the Jacksonville case.
`
`
`
`
`
`11
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`

`

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`Case 6:20-cv-00108-ADA Document 57 Filed 11/20/20 Page 16 of 43Case 6:21-cv-00520-ADA Document 36-5 Filed 03/16/22 Page 17 of 44
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`C.
`
`“switch” (’528 patent, claims 1, 5, 17; ’444 patent, claim 3; ’474 patent;
`claim 1; ’513 patent, claim 19; ’518 patent, claim 50; ’736 patent, claims 1,
`11; ’673 patent, claims 1, 13); “switching device” (’725 patent, claim 1; ’528
`patent, claim 8); “switching module” (’902 patent, claim 1)
`
`ParkerVision’s Construction
`“an electronic device for opening and closing
`a circuit as dictated by an independent control
`input”
`
`Intel’s Construction
`“an electronic device for opening and closing
`a circuit”
`
`
`
`
`
`
`
`The dispute between the parties is ParkerVision’s language “as dictated by an
`
`independent control signal” which comes directly from the Orlando court’s claim construction
`
`order. D.I. 51-3 (Case No. 6:14-cv-687, Order dated April 29, 2020) at 32. Intel’s only argument
`
`regarding “an independent control input” is that a diode is a type of switch and, according to
`
`Intel’s expert declaration (