Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 1 of 19
`Case 6:20-cv-00636—ADA Document 76-2 Filed 03/10/21 Page 1 of 19
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`EXHIBIT 7
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`EXHIBIT 7
`
`

`

`(
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 2 of 19
`
`THIN FILM TECHNOLOGY
`HANDBOOK
`
`Aicha A. R. Elshabini-Riad
`Fred D. Barlow Ill
`
`McGraw-Hill
`New York San Francisco Washington, D.C. Auckland Bogota
`Caracas Lisbon London Madrid Mexico City Milan
`Montreal New Delhi San Juan Singapore
`Sydney Tokyo Toronto
`
`DEFTS-PA 0002806
`
`

`

`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 3 of 19
`
`Library of Congress Cataloging-in-Publication Data
`
`Elshabini, Aicha.
`Thin film technology handbook / Aicha Elshabini, Fred D.
`Barlow.
`
`p. cm.—(Electronic packaging and interconnect series)
`
`Includes index.
`ISBN 0-07-019025-9 (hardcover)
`1. Thin film devices—Design and construction. 2. Thin films.
`3. Electronic packaging. I. Barlow, Fred D. II. Title.
`III. Series.
`TK7872.T55E47 1997
`621.3815'2—dc21
`
`96-36938
`ClP
`
`McGraw-Hill
`A Division of The McGraw Hill Companies
`
`Copyright @ 1998 by the McGraw-Hill Companies, Inc. All rights reserved.
`Printed in the United States of America. Except as permitted under the
`United States Copyright Act of 1976, no part of this publication may be
`reproduced or distributed in any form or by any means, or stored in a data base
`or retrieval system, without the prior written permission of the publisher.
`
`1 2 3 4 5 67 8 9 0 DOC/DOC 9 0 2 1 0 9 8 70
`
`ISBN 0-07-019025-9
`
`The sponsoring editor for this book was Steve Chapman, the editing supervisor
`was Bernard Onken, and the production supervisor was Clare Stanley. It was set
`in Times Roman by Graphic World, Inc.
`
`Printed and bound by R. R. Donnelley & Sons Company.
`
`McGraw-Hill Books are available at special quantity discounts to use as premiums
`and sales promotions, or for use in corporate training programs. For more
`information, please write to the directorformation, please write to the Director of
`Special Sales, McGraw-Hill, 11 West 19th Street, New York, NY 10011. Or
`contact your local bookstore.
`
`Information contained in this work has been obtained by The
`McGraw-Hill Companies, Inc. ("McGraw-Hill") from sources be-
`lieved to be reliable. However, neither McGraw-Hill or its authors
`guarantees the accuracy or completeness of any information pub-
`lished herein and neither McGraw-Hill nor its authors shall be re-
`sponsible for any errors, omissions, or damages arising out of use
`of this information. This work is published with the understanding
`that McGraw-Hill and its authors are supplying information but are
`not attempting to render engineering or other professional services.
`If such services are required, the assistance of an appropriate pro-
`fessional should be sought.
`
`This book is printed on recycled, acid-free paper containing a
`minimum of 50% recycled de-inked fiber.
`
`DEFTS-PA_0002807
`
`

`

`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 4 of 19
`
`CONTENTS
`
`Contributors xv
`xvii
`Preface
`
`1-2
`
`1-12
`
`Chapter 1. Film Deposition Techniques and Processes
`1-1
`1.1. Introduction
`1-2
`1.2. Vacuum Systems
`1.2.1. Basic Vacuum Concepts
`1.2.2. Vacuum Chambers 1-3
`1-8
`1.2.3. Pumping Systems
`1.2.4. In Situ Analysis and Monitoring Equipment
`1-12
`1.3. Evaporation
`1-12
`1.3.1. Introduction
`1-13
`1.3.2. Deposition Mechanism
`1-14
`1.3.3. Evaporation Sources
`1-15
`1.3.4. Process Implementation
`1-16
`1.3.5. Deposition Conditions
`1-18
`1.3.6. Applications
`1.4. Molecular Beam Epitaxy
`1.4.1. Process Overview
`1.4.2. Deposition Systems
`1-20
`1.4.3. Applications
`1-21
`1.5. Sputter Deposition
`1-21
`1.5.1. Introduction
`1-22
`1.5.2. Sputter Sources
`1-24
`1.5.3. Applications
`1.6. Chemical Vapor Deposition (CVD) 1-24
`1-27
`1.7. Laser Ablation
`1-27
`1.8. Plating
`1-27
`1.8.1. Introduction
`1-29
`1.8.2. Electroplating
`1-34
`1.8.3. Electroless Plating
`1-37
`1.8.4. Applications
`1-37
`1.9. Sol-Gel Coatings
`
`1-18
`1-18
`1-18
`
`1-1
`
`2-1
`
`2-1
`
`Chapter 2. Pattern Generation Techniques
`2-1
`2.1. Introduction
`2.2. Pattern Generation
`2.2.1. CAD 2-1
`2-1
`2.2.2. Layout Editor
`2-2
`2.2.3. Data Preparation
`2.2.4. Maskmaking 2-3
`2-4
`2.3. Microlithography
`2-5
`2.3.1. Photoresists
`2.3.2. Positive Photoresists
`
`2-6
`
`vii
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`2-8
`
`viii
`
`CONTENTS
`
`2.3.3. Chemically Amplified Negative and Positive Photoresists
`2.3.4. Photosensitive Polyimides 2-8
`2.3.5. Resist Resolution and Contrast 2-14
`2.3.6. Sensitivity 2-16
`2.3.7. Photoresist Processing 2-18
`2.4. Optical Tools for Microlithography 2-25
`2.4.1. Contact 2-25
`2.4.2. Proximity 2-27
`2.4.3. Projection 2-27
`2.5. Etching 2-32
`2.5.1. Wet Etching 2-32
`2.5.2. Dry Etching 2-34
`2.6. Advanced Processes 2-35
`2.6.1. Trilayer 2-35
`2.6.2. Lift-Off 2-35
`2.6.3. Image Reversal 2-36
`/6.4. Deep Ultraviolet (DUV) 2-38
`
`3-1
`
`3-14
`
`3-20
`
`Chapter 3. Properties of Thin Film Materials
`3.1. Introduction 3-1
`3.2. Substrates for Thin Film Applications
`3.2.1. Introduction
`3-1
`3.2.2. Substrate Materials 3-2
`3.2.3. Requirements of Substrates 3-2
`3.2.4. Substrate Fabrication 3-5
`3.3 Thin Film Conductor Materials 3-10
`3.3.1. Introduction and Definition of Various Quantities 3-10
`3.3.2. Buffer and Adhesion Layers 3-11
`3.3.3. Copper Metallization
`3-11
`3.3.4. Gold Metallization 3-12
`3.3.5. Aluminum Metallization 3-12
`3 3 6 Palladium Metallization 3-13
`. 3.3.7. Nickel Metallization 3-13
`3.3.8. Silver Metallization 3-13
`3.3.9. Conductor Properties 3-14
`3.4 Resistors for Thin Film Applications 3-14
`3.4.1. Background and Resistor Materials properties
`3.4.2. Tantalum Films 3-17
`3.4.3. Tantalum Nitride Films (Ta2N or TaN depending on nitrogen concentration)
`3.4.4. Nickel Chromium Films (Ni-Cr) 3-18
`3.4.5. Chromium Films 3-19
`3.4.6. Rhenium Films 3-19
`3.4.7. Cermets 3-19
`3.5 Thin Film Dielectrics 3-20
`3.5.1. Background and Capacitor Materials Properties
`3.5.2. Silicon Monoxide Capacitors 3-20
`3.5.3. Tantalum Oxide Capacitors 3-20
`3.5.4. Manganese Oxide Tantalum Oxide Capacitors 3-21
`3.5.5. Silicon Monoxide Tantalum Oxide Duplex Capacitors 3-21
`3.5.6. Barium Titanate Capacitors and Other Thin Film Capacitor Materials
`3.5.7. Silicon Dioxide Dielectric 3-23
`3.6. Thin Film Magnetics 3-23
`3.7. Polymer Dielectrics 3-23
`3.7.1. Photosensitive Polyimides 3-25
`3.8. Advanced Thin Film Materials 3-26
`3.8.1. Superconductor Thin Film Materials 3-26
`
`3-1
`
`3-8
`
`3-21
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`ix
`
`CONTENTS
`
`3.9. Protective Coatings 3-27
`3.9.1. Resistor Passivation
`3.9.2. Surface Preparation
`
`3-27
`3-27
`
`4-1
`
`5-1
`
`4-1
`
`Chapter 4. Principles and Properties of Semiconductor Thin Films
`4-1
`4.1. Introduction
`4.2. Transport Mechanisms in Polycrystalline Semiconductors
`4.2.1. Discontinuous Thin Films 4-2
`4.2.2. Crystalline Films 4-6
`4.2.3. Polycrystalline Films 4-17
`4.2.4. Elemental Semiconductors 4-23
`4.2.5. Grain Boundary Model 4-34
`4.3. Properties of Amorphous Thin Films 4-39
`4.3.1. Comparison of Crystalline and Amorphous Semiconductors 4-39
`4.3.2. Conductivity and Band Gap 4-42
`4-45
`4.3.3. Light-Induced Instabilities
`4.4. Optical Properties of Semiconductor Films 4-50
`4.4.1. Definitions of Optical Parameters 4-50
`4.4.2. Experimental Routes for Determining Optical Constants
`4-61
`4.4.3. Models of the Optical Properties
`4-69
`4.4.4. Photoconductivity
`4.5. Summary 4-69
`
`4-51
`
`5-8
`
`Chapter 5. Design Guidelines for Thin Film Components and
`Construction of Thin Film Modules
`5-1
`5.1. Introduction
`5-2
`5.2. Thin Film Design Guidelines
`5-2
`5.2.1. Resistor Design Rules
`5-5
`5.2.2. Capacitor Design Rules
`5-7
`5.2.3. Inductor Design Rules
`5-8
`5.2.4. Transmission Lines
`5.2.5. Fabrication Sequence for Thin Film Resistor-Conductor Circuits
`5-9
`5.2.6. Chip Mounting to Thin Film Substrates
`5-10
`5.2.7. Substrates for Thin Film Deposition
`5.3. Multichip Modules Deposited (MCM-D) 5-10
`5.3.1. Concept 5-10
`5-11
`5.3.2. Process Sequence
`5-11
`5.3.3. Materials Properties
`5.3.4. Processing Considerations and Design Guidelines
`5-15
`5.3.5. New Trends in the Technology
`5.3.6. Limitations of the Technology 5-15
`5-16
`5.4. Thermal Considerations
`5.4.1. Thermal Management 5-16
`5-16
`5.4.2. Thermal Resistances
`5.4.3. Thermal Model and Thermal Analysis 5-17
`5.4.4. Thermal Paths 5-17
`5-18
`5.4.5. Temperature Cycling and Power Cycling
`5-18
`5.4.6. Various Effects
`5.5. Component Attachment 5-19
`5-19
`5.5.1. Wire-Bonding Technology
`5.5.2. Tape-Automated Bonding (TAB) Technology 5-23
`5.5.3. Flip-Chip Bonding Attachment Technology 5-26
`5-29
`5.5.4. Die Attach
`
`5-14
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`X
`
`CONTENTS
`
`5.6. Trimming Techniques 5-32
`5.6.1. Introduction
`5-32
`5.6.2. Resistor Trimming 5-32
`5.6.3. Capacitor Trimming 5-33
`5.6.4. Background for Laser Trimming 5-33
`5.6.5. Laser Trimming Thin Film Resistors 5-34
`5.6.6. Trimming Techniques (Shapes of Cuts) 5-34
`5.6.7. Trimming Tab for Resistors 5-35
`5.6.8. Control of Oxide Thickness for Capacitors as Well as Adjustment of Capacitance
`Value in Discrete Steps 5-35
`5.6.9. Technology Trends 5-35
`5-36
`5.6.10. Thermal Stabilization
`5.6.11. Protection of Thin Film Resistors 5-36
`5.7. Modifications of Surfaces and Films 5-36
`5.8. Surface Preparation 5-37
`5.9. Conclusion 5-37
`
`Chapter 6. Characterization of Semiconductor Thin Films:
`A Compendium of Techniques
`
`6-1
`
`6-1
`6.1. Introduction
`6.2. Electro-Optical Measurements: Film Properties 6-2
`6.2.1. Hall Effect 6-2
`6.2.2. Van der Pauw Technique 6-6
`6.2.3. Hall Effect: Polycrystalline Semiconductors 6-7
`6.2.4. Minority-Carrier Techniques 6-10
`6.3. Electro-Optical Measurements: Grain Boundaries 6-25
`6.3.1. Conductivity-Doping Method 6-25
`6.3.2. Current-Voltage Spectroscopy 6-26
`6.3.3. Optical Method 6-30
`6.3.4. Thermal Method 6-31
`6-32
`6.3.5. Admittance Spectroscopy
`6.4. Chemical, Compositional, and Structural Determinations 6-36
`6.4.1. Micro-Composition Determinations 6-36
`6.4.2. Surface Spectroscopies and Spectrometries 6-47
`6.4.3. Thickness and Roughness Measurements 6-56
`6.5. Nano-Scale and Atomic-Scale Measurements 6-58
`6.5.1. Scanning Tunneling Microscopy (STM) 6-58
`6.5.2. Atomic Force Microscopy (AFM) 6-58
`6.5.3. Ballistic Electron-Emission Microscopy (BEEM) 6-60
`6.5.4. Nanoscale Electrical and Optical Characterization
`6-60
`6.6. Future Characterization Directions and Needs 6-66
`
`I Chapter 7. Diamond Films
`7.1. Introduction
`7-1
`7.2. Nucleation and Growth• 7-3
`7.2.1. Thermodynamics and Kinetics
`7.2.2. Nucleation
`7-4
`7.2.3. Chemistry
`7-5
`7.2.4. Reactors 7-7
`7.2.5. Diamond Film Morphology 7-11
`7.2.6. Structural Defects
`7-17
`7.2.7. Impurities
`7-18
`7.2.8. Additional Growth Techniques
`
`7-3
`
`7-19
`
`7-1
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`xi
`
`CONTENTS
`
`7.3. Properties of Diamond 7-21
`7-22
`7.3.1. Electrical Properties
`7-33
`7.3.2. Optical Properties
`7-43
`7.3.3. Thermal Properties
`7-47
`7.4. Applications
`7-47
`7.4.1. Electronic Applications
`7-56
`7.4.2. Optical Applications
`7-60
`7.4.3. Thermal Applications
`7.5. Summary 7-62
`
`Chapter 8. Thin Film Optical Materials
`8-1
`8.1. Introduction
`8.2. Propagation of Light Through Media 8-2
`8-6
`8.3. Behavior of Light at Interfaces
`8.4. Interference in Thin Films 8-10
`8-14
`8.5. Multilayer Optical Coatings
`8.6. Preparation and Formation of Optical Thin Films 8-24
`8.7. Application of Optical Thin Films 8-35
`•
`
`9-2
`
`9-7
`
`Chapter 9. Thin Film Packaging and Interconnect
`9-1
`9.1. Introduction
`9.1.1. High-Density Packaging
`9.2. IC and System Drivers 9-3
`9.2.1. IC Advances 9-3
`9-4
`9.2.2. System Drivers
`9-4
`9.2.3. Size and Weight Reduction
`9-5
`9.2.4. Comparison of Wiring Capability
`9.3. Electrical Characteristics of Thin Film Connections
`9-7
`9.3.1. Conductor Resistivity
`9.3.2. Skin Effect 9-7
`9.3.3. Propagation Velocity and Signal Loss 9-8
`9.3.4. Crosstalk and Impedance 9-8
`9-10
`9.4. Materials of Construction
`9-10
`9.4.1. Carrier Substrates
`9-14
`9.4.2. Metallization
`9-19
`9.4.3. Thin Film Dielectric
`9.4.4. Dielectric Coating 9-22
`9-24
`9.4.5. Dielectric Curing
`9.4.6. Dielectric Via Formation 9-24
`9-26
`9.4.7. Photosensitive Dielectric
`9-30
`9.4.8. Polymer Physical Properties
`9-37
`9.4.9. The Metal-Polymer Interface
`9-39
`9.4.10. Reliability
`9.5 Thin Film Processes and Applications 9-39
`9.5.1. AT&T 9-39
`9.5.2. IBM 9-40
`9.5.3. Hughes 9-41
`9.5.4. Micro Module Systems (MMS) 9-41
`9.5.5. nChip SiCBTM 9-43
`9.5.6. GE/Ti HDI 9-43
`9.5.7. IMC 9-43
`9.5.8. Thomson 9-43
`9-43
`9.5.9. IBM Japan
`
`8-1
`
`9-1
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`xii
`
`CONTENTS
`
`9.5.10. Kyocera 9-46
`9.5.11. NTK 9-46
`9.6. Selected Thin Film Application Areas 9-46
`9.6.1. Mainframe Computers 9-47
`9.6.2. Workstations 9-47
`9.6.3. Military and Space 9-48
`9.6.4. Telecommunication 9-49
`9.6.5. Consumer 9-50
`9.7. Thin Film Polymer IC Applications 9-51
`9.7.1. Stress Buffer for Si Devices 9-52
`9.7.2. Silicon Inner Layer Dielectric 9-53
`9.8. Optical Interconnect 9-55
`9.9. Flat Panel Displays 9-56
`9.10. Sensors and Micromachining 9-57
`9.11. Recent Advances in Thin Film Processing 9-57
`9.11.1. Deposition Techniques for LAP. 9-59
`
`Chapter 10. Thin Film for Microwave Hybrids
`10.1. Introduction
`10-1
`10.2. Planar Transmission Structures 10-3
`10.3. Transmission Line Parameters 10-6
`10.3.1. Dielectric Properties 10-6
`10.3.2. Wavelength 10-7
`10.3.3. Field Concepts 10-9
`10.3.4. Impedance 10-10
`10.4. Microstrip Line 10-12
`10.5. Coplanar Transmission Line 10-15
`10.6. Stripline Transmission Line 10-16
`10.7. Propagation Velocity 10-19
`10.8. Anisotropy 10-20
`10.9. Losses 10-22
`10.9.1. Dielectric Losses 10-22
`10.9.2. Conductor Losses 10-23
`10.10. Microstrip Transmission Line 10-25
`10.11. Q Measurements 10-28
`10.12. Surface Roughness 10-28
`10.13. High-Resistance Adhesion Layers 10-29
`10.14. Ground Plane Effects 10-31
`10.15. Substrates 10-31
`10.15.1. Glass 10-33
`10.15.2. Single-Crystal Substrates 10-34
`10.15.3. Polycrystalline 10-34
`10.15.4. High-s Materials 10-35
`10.15.5. Clad Materials 10-37
`10.16. Cleaning 10-45
`10.17. Thin Films 10-46
`10.18. Microwave Components 10-46
`10.18.1. Resistors 10-46
`10.18.2. Capacitors 10-50
`10.18.3. Coupled-Parallel Microstrip 10-56
`10.19. Superconductivity
`10-61
`10.19.1. Properties of High-Tc Films 10-62
`10.20. Materials Considerations 10-65
`10.20.1. Substrate Materials
`10-66
`10.20.2. Thermal Expansion Coefficient 10-66
`10.20.3. Buffer (Barrier) Layers 10-67
`
`10-1
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`Xiii
`CONTENTS
`
`10-70
`
`10.21. Film Formation 10-68
`10-68
`10.21.1. Off-Axis Sputtering
`10-69
`10.21.2. Pulsed-Laser Deposition
`10-69
`10.21.3. Evaporation
`10.22. Metalorganic 10-70
`10.22.1. MOCVD 10-70
`10.22.2. Spray Pyrolysis
`10-71
`10.23. Patterning
`10-71
`10.23.1. Wet Etching
`10-72
`10.23.2. Dry Etching
`10-72
`10.24. Microwave Measurements
`10-72
`10.24.1. Frequency Domain Techniques
`10-75
`10.24.2. Time Domain Techniques
`10-77
`10.25. Electronic Packaging
`10-77
`10.26. Levels of Integration
`10.27. Interconnects 10-78
`10.27.1. Wire 10-78
`10-85
`10.28. Enclosure/Carrier Metal Selection
`10.28.1. Thermal Expansion Coefficient
`10.29. Substrate Attachment 10-87
`10.30. Mechanical Design 10-87
`10-94
`10.31. Platability
`10-94
`10.32. Conclusion
`
`10-85
`
`11-1
`
`11-1
`
`11-19
`
`Chapter 11. Yield, Testing, and Reliability
`11.1. Introduction to Testing of Microelectronic Components and Subassemblies
`11-2
`11.1.1. Introduction—Motivation and Types of Tests
`11.1.2. Yield, Fault Coverage, and Quality Level 11-7
`11-10
`11.1.3. Yield in Multichip Subassemblies
`11-11
`11.1.4. Screening for Reliability
`11.1.5. Test Economics 11-13
`11-14
`11.2. Preparing for Testing
`11.2.1. Scan-Design Methods 11-15
`11.2.2. Built-in Self-Test (BIST) 11-17
`11.3. Automated Test Equipment (ATE) 11-18
`11.3.1. ATE Architecture and Capabilities
`11-23
`11.3.2. Example ATE Systems
`11-24
`11.4. Electrical Test Interface
`11-24
`11.4.1. Packaged Device Interfaces
`11-24
`11.4.2. Wafer-Probe Electrical Interfaces
`11.5. Test and Evaluation Methods 11-26
`11-26
`11.5.1. Introduction
`11.5.2. Known Good Die 11-28
`11.5.3. High-Speed Wafer/Die Test
`11-32
`11.5.4. Bare Die Burn-in
`11.5.5. In-Circuit Probe and BIST 11-32
`11.6. Electrical Fault Isolation and Failure Analysis
`11-34
`11.6.1. Electromechanical Probing
`11-36
`11.6.2. Electron-Beam Probing
`11-44
`11.6.3. Optical-Beam Probing
`
`11-31
`
`11-34
`
`Index 1-1
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 11 of 19
`
`CHAPTER 3
`PROPERTIES OF THIN
`FILM MATERIALS
`
`Aicha Elshabini
`Fred Barlow
`The Bradley Department of Electrical Engineering
`Virginia Polytechnic Institute and State University
`
`3.1 INTRODUCTION
`
`This chapter focuses on the materials used to fabricate thin film circuitry and multilayer
`modules: substrates, metallizations, resistor materials, dielectric materials, protective coat-
`ings, and advanced thin film materials. There are many materials used in the fabrication of
`resistor and capacitor elements. Thin film technology and passive components integration
`is inherent to the technology. Materials selection is closely related to the fabrication
`process or deposition technique being used [1,4-7,11-19]. In addition, resistors and ca-
`pacitors with low-voltage ratings can be fabricated in a reliable and consistent way using
`thin film technology. The reader is referred to Chapter 6 for thin film materials character-
`ization and references [27-37].
`
`3.2 SUBSTRATES FOR THIN
`FILMS APPLICATIONS
`
`3.2.1 Introduction
`
`The function of the substrate is to provide the base onto which thin film circuits are fabri-
`cated and various thin film multilayers are deposited. In addition, the substrate provides
`the necessary mechanical support and rigidity needed for a reliable circuit, and it has ade-
`quate thermal management ability to ensure proper temperature operation and proper elec-
`trical insulation to withstand high voltages without breakdown. Dielectric strength, di-
`electric constant value, dissipation factor, electrical conductivity, thermal conductivity,
`
`3-1
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 12 of 19
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`3-2
`
`THIN FILM TECHNOLOGY HANDBOOK
`
`and flexural or mechanical strength are important substrate properties that are affected by
`their microstructure, composition, and processing.
`
`3.2.2 Substrate Materials
`
`Commonly used substrate materials for thin film circuits include alumina, glass, beryllia
`or beryllium oxide-based ceramic, aluminum nitride, silicon (Si), and metals. When using
`Si, the substrate surface is covered with a silicon dioxide dielectric layer. The use of Si as
`the substrate material for thin film interconnections offers numerous advantages, including
`high thermal conductivity, matched thermal expansion coefficient for Si ICs, excellent sur-
`face finish, and good dimensional stability. Silicon wafers are necessary for the fabrication
`of integral Si02/Si3N4 decoupling capacitors. On the other hand, limited mechanical rigid-
`ity dictates the necessity of mounting Si substrates onto a base to provide mechanical sup-
`port. In addition, Si substrates have a relatively high dielectric constant value that affects
`their high-frequency operation. Also, warping may result from the deposition of thick
`(greater than a few microns) polymer dielectrics on Si.
`Ceramic materials are often used for thin film applications because ceramics have high
`thermal conductivity, good chemical stability, and are also resistant to thermal and me-
`chanical shocks. Glazed substrate surfaces provide good surface finish, low porosity, have
`a low dielectric constant value, and are effective for most thin film deposition techniques
`with relatively low deposition temperatures. Glazing the substrate surface typically yields
`a surface roughness of <1 Am/in (about 250 A). The common choice for substrate mate-
`rial for thin film deposition is 99.6% alumina. Substrate dimensions vary from 1" x 1" to
`3" x 3"; thicknesses range from 0.010" to 0.025" in increments of 15 mils. The surface fin-
`ish is 4 microinches (pin) maximum on the front surface and 5 yin maximum on the back
`surface. The flatness is measured in terms of camber and it is 0.0029in for 0.010" substrate
`thickness, 0.003"/in for 0.025" substrate thickness, and 0.004"/in for 0.040" substrate thick-
`ness, respectively. The coefficient of thermal expansion (CTE) is 6.3 ppm/°C at room
`temperature. The density of the ceramic is 3.9 g/cm3, the dielectric constant is about
`9.9 (measured at 1 MHz), and the loss tangent is 0.0001 (measured at the same frequency).
`For 99.5% beryllium (Be), the surface finish is 5 gin maximum on the front surface and
`10 gin maximum on the back surface, and the flatness is 0.003"/in maximum. For alu-
`minum borosilicate glass, the surface finish is 0.25 pin maximum on both the front sur-
`face and the back surface, and the flatness is 0.0047in maximum.
`The CTE mismatch between alumina (6.3 ppm/°C) and GaAs (5.7 ppm/°C) and
`Si (2.6 ppm/°C) can result in serious stresses. Thus, the use of aluminum nitride
`(3.5 ppm/°C), thick diamond films (0.9 ppm/°C), or a metal or ceramic matrix composites
`(2.6 to 5 ppm/°C) are more suitable thin film substrates, especially in that they are more
`capable of dissipating large amounts of heat.
`
`3.2.3 Requirements of Substrates
`
`The properties of the substrates used to grow defect-free films for thin film circuits
`include:
`
`• Good surface smoothness (surface finish can vary from about 50 Am/in for 96% alu-
`minum oxide content to 20 Am/in for 99.5% aluminum oxide content)
`• Coefficient of thermal expansion (CTE) matched
`• Good mechanical strength (>350 MPa)
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 13 of 19
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`PROPERTIES OF THIN FILM MATERIALS
`
`3-3
`
`• High thermal conductivity
`• Inertness, or chemical stability
`• Porosity
`• Low cost
`• High electrical resistance (>1014 (i.cm)
`• Good uniformity
`
`The CTE is represented in terms of the change in the length of a material pr °C to
`the original length at 0°C. The CTE of most substrate materials is linear over the tem-
`perature range of interest. The differential magnitude of the CTE between one material
`and another (for instance the substrate and the film) is significant, because tensile stresses
`can result from the mismatch, causing delamination or cracking of the film and/or
`bowing of the substrate. In addition, the CTE of the substrate should match the CTE
`of Si (2.6 ppm/°C) to avoid excessive stresses in the die-attach material (especially for
`large-size die). The CTE of 99.6% alumina is 6.3 ppm/°C, the thermal expansion of
`99.5% Be0 is 6.9 ppm/°C, and the thermal expansion of aluminum borosilicate glass is
`0.46 ppm/°C.
`Substrate flatness directly influences the minimum achievable line width and spacing.
`In general, films are tolerant of surface roughness less than the order of magnitude of the
`film thickness. To maintain uniform characteristics of the thin film elements, it is impor-
`tant to minimize surface roughness. The flatness, or camber of 99.6% alumina substrate is
`0.002"/in for 0.010" substrate thickness; 0.003"/in for 0.025" substrate thickness; 0.004"/in
`for 0.025" substrate thickness. The camber of 99.5% Be0 is 0.003"/in, and the camber of
`aluminum borosilicate glass is 0.004"/in. The CTE of the substrate should be similar to the
`deposited film to minimize mechanical and residual stresses in the film. High mechanical
`strength and thermal shock resistance are required to enable the substrate to withstand the
`rigors of processing and normal use. Ceramic materials are ideal for this function. High
`thermal conductivity is required to remove heat, enabling the realization of circuits with
`high-component densities.
`Inertness to chemicals used in circuit processing is a necessary requirement. Ceramic
`materials possess better chemical stability than glasses, especially at higher temperatures.
`These materials are not attacked by the etchants used in processing thin film circuits. Low
`porosity is required to prevent the entrapment of gases, which causes film contamination.
`These substrate materials must be good insulators at room temperature. Finally, because
`uniformity of substrate properties must be maintained, control of electrical properties is
`very important. Similarly, control of substrate purity, density, and surface properties is also
`necessary.
`Substrates for thin films have high resistivity, high dielectric strength, and are chem-
`ically resistant or inert. For example, tantalum-film processing requires hydrofluoric
`acid as the etchant. Therefore, glass or glazed substrates must be covered with a thin
`layer of tantalum oxide to resist the acid. The volume resistivities of alumina, Be0 and
`aluminum nitride are 10" (or higher), 10'4, and 10" &cm, respectively. The dielectric
`constants (measured at 1 MHz) for alumina, Be0 and aluminum nitride are 9.9, 6.8, and
`8.9, respectively. The loss tangents are 0.0001, 0.0002, and 0.0001, for alumina, Be0,
`and aluminum nitride (A1N), respectively. High thermal conductivity is needed for heat
`dissipation from the active and resistive components deposited on the surface. The ther-
`mal conductivity of ceramics is superior to that of glass (about 30 to 33 W/m.°K). A
`glazed ceramic will have slightly lower thermal conductivity than raw ceramics because
`of the glass-like glaze layer on its surface. The thermal conductivity of aluminum ni-
`tride is 130 to 170 W/m.°K, and that of Be0 is 180 to 260 W/m•°K.
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`3-4
`
`THIN FILM TECHNOLOGY HANDBOOK
`
`TABLE 3-1 Properties of substrates for thin film multilayer interconnections
`
`Material
`
`Polyimide
`Si
`A1203 (99.6%)
`Be0 (99.5%)
`MN
`SiC
`Mo
`Cu
`Al
`Au
`Steel (AISI 1010)
`Kovar (Fe/Ni/Co)
`Cu/Invar/Cu
`(20/60/20)
`Cu/Mo/Cu
`(20/60/20)
`Cu/Mo/Cu
`(13/74/13)
`CuW (20/80)
`Natural diamond
`CVD diamond
`
`Density
`(g/cm3)
`
`CTE
`(ppm/°K)
`
`Young's
`modulus
`(GPa)
`
`Thermal
`conductivity
`(W/m.°K)
`
`1.4
`2.3
`3.9
`2.9-3
`3.3
`3.1
`10.2
`8.9
`2.7
`18.9
`7.9
`8.4
`8.4
`
`9.7
`
`9.9
`
`17
`3.5
`3.5
`
`40
`2.6
`6.3-6.7
`6.9
`4
`3.7
`4.9
`16.8
`2.5
`14.3
`11.3
`6.1
`6.4
`
`7
`
`5.7
`
`8
`1.1
`1.5-2.0
`
`2.5
`113
`360
`350
`340
`400
`324
`110
`62
`—
`192
`138
`134
`
`248
`
`269
`
`283
`—
`890-970
`
`0.15
`148
`20-35
`251
`160-190
`270
`138
`398
`237
`318
`64
`16
`170
`
`208
`
`242
`
`186
`2,000
`400-1600
`
`The fluctuations in the substrate surface can be described in terms of roughness and
`waviness. Roughness is a short-range fluctuation (the average deviation of the surface
`from some arbitrary mean value). The surface roughness can result in an uneven film
`thickness. Resistive films on rough substrates exhibit a high sheet resistance from an ap-
`parent increase in the length between points, and also because of thin spots in the film.
`These films are also less stable during thermal aging. Additionally, the performance of ca-
`pacitors is affected by surface roughness, because a premature breakdown of the dielectric
`film may occur. Raw ceramic materials are not smooth enough for very-fine line widths or
`for applications requiring very high stability. For this reason, capacitors, high-density in-
`terconnects, and high-stability resistors are deposited on polished or glazed ceramic sub-
`strates. Waviness is a periodic variation characterized by a peak-to-peak amplitude and a
`repetition interval. Flatness, or the lack of waviness, is an important requirement if thin
`(<50 p,m) and well-defined line widths are to be achieved. The line width of a resistor is
`widened by the waviness of the substrate surface (even when controlled by the surface
`mask).
`Metal substrates such as aluminum (Al) and copper (Cu) have high thermal conductiv-
`ity, reasonable cost, ease of machining, proper surface flatness upon lapping and polish-
`ing, and may be used as substrates for thin film interconnections. An insulator layer may
`be deposited first on the surface of the substrate to provide the proper electrical insulation
`needed to construct the thin film circuitry. The substrates are usually reactive to metal
`etchants used in thin film processing and may require a protective coating. These metal
`substrates also possess a high CTE, which makes them poorly matched to Si devices. Alu-
`minum and Cu substrates possess excellent thermal conductivity, they are inexpensive, and
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 15 of 19
`3-5
`
`PROPERTIES OF THIN FILM MATERIALS
`
`can be easily machined; however, these metals have a high CTE that is poorly matched to
`Si chips. On the other hand, molybdenum (Mo) and tungsten (W) are attactive metal sub-
`strates with a low CTE and high elasticity. But these metals are relatively heavy and are
`difficult to machine.
`Alloying metals can provide metal substrates with desirable characteristics. Copper-
`clad and nickel-clad Mo substrates produced by hot roll pressing, and Cu-W alloys (about
`20% Cu) produced by powder metallurgy have a low CTE, high elasticity, high thermal
`conductivity, and good solderability as potential substrate materials.
`Table 3-1 illustrates some important properties of substrates for thin film multilayer in-
`terconnections. In addition, the CTE of several materials as well as the thermal conduc-
`tivity are plotted in Figs. 3-1 and 3-2, as a function of temperature.
`
`3.2.4 Substrate Fabrication
`
`The raw materials for ceramic substrates usually are available as purified oxide powders.
`The oxides are mixed, reground, and then mixed with organic compounds functioning as
`plasticizers, binders, or lubricants. A flow chart indicating a number of established meth-
`ods to form ceramic substrates is shown in Fig. 3-3. These techniques, their advantages
`and limitations, are briefly reviewed in the following paragraphs.
`
`Powder Pressing. In powder pressing, dry or slightly dampened powder is packed into
`an abrasion resistant die under sufficiently high pressure (8,000 to 20,000 psi), to form a
`dense body. This process allows rapid or automatic production of parts with reasonably
`controlled tolerances because the shrinkage during the sintering process is lower than other
`ceramic substrate-forming techniques. Substrate features such as holes may be simultane-
`ously formed. However, various limitations exist. Pressure variations from uneven filling
`of long or complex die configurations to inhomogeneities in bulk properties. As a conse-
`quence, these materials are limited to those applications in which lack of uniform proper-
`ties does not adversely affect circuit performance. Holes cannot be located too close to an
`outside edge, and the process limits the substrate size. Generally, these substrates are less
`dense and more porous, with higher surface roughness and lower mechanical strength than
`other ceramic forming methods. When used for thin films, such substrates must be me-
`chanically polished, and in doing so, they lose their cost advantage over other forming
`techniques while still suffering from inhomogeneity problems. Powder pressed parts, how-
`ever, remain the major source of beryllium oxide (Be0) substrate material, particularly for
`stock thicker than 0.40". Problems arise in pressing thin substrates of this material because
`the larger grain size of Be0 (as compared to other substrate powders) significantly reduces
`the amount of powder, or filling fraction, in the die, resulting in increased porosity. Ferrite
`substrates and plugs are also powder-pressed.
`
`Isostatic Pressing. In contrast to dry pressing, this method applies uniform pressure to
`the powders. Dry powders are enclosed in an elastic container which is inserted into a cav-
`ity, which is first evacuated and then filled with a liquid that surrounds the elastic con-
`tainer. The pressure applied to the cavity is uniformly distributed over the surface of the
`container, yielding a relatively uniform compact piece. An important advantage of isostatic
`pressing is that it permits fabrication of pieces with relatively large length-to-width ratios.
`For example, cylinders one foot in diameter and two feet in length can be made using this
`method. These cylinders are then sliced into wafers, which are shaped by machinery,
`ground, and polished to attain desired surface quality for thin film applications. Thus, this
`finishing method is analogous to that used to make semiconductor single crystal and fused
`silica substrates. Although capable of making large-sized substrates (such as 4" X 4"), the
`
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`Case 6:20-cv-00636-ADA Document 76-2 Filed 03/10/21 Page 16 of 19
`
`—I-- 99% Alumina
`— AIN
`—ID— Si
`Ni
`—X— Mo
`—A— Au
`—M— Cu
`Al
`
`FIGURE 3-1 CTE versus temperature for a variety of substrate and metallization materials.
`
`500
`
`450