Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 1 of 29
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`SOLAS OLED LTD.,
`
`Plaintiff,
`
`v.
`
`GOOGLE LLC,
`
`Defendant.
`
`SOLAS OLED LTD.,
`
`Plaintiff,
`
`v.
`
`APPLE INC.,
`
`Defendant.
`
`SOLAS OLED LTD.,
`
`Plaintiff,
`
`v.
`
`HP INC.,
`
`Defendant.
`
`Case No. 6:19-cv-00515-ADA
`
`Case No. 6:19-cv-00537-ADA
`
`Case No. 6:19-cv-00631-ADA
`
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`DEFENDANTS’ AND INTERVENOR’S REPLY CLAIM CONSTRUCTION BRIEF
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 2 of 29
`TABLE OF CONTENTS
`
`Page
`
`I.
`
`II.
`
`U.S. PATENT NO. 7,446,338 (“’338 PATENT”) ............................................................ 1
`A.
`“TRANSISTOR ARRAY SUBSTRATE” (CLAIM 1) ......................................... 1
`B.
`“PROJECT FROM A SURFACE OF THE TRANSISTOR ARRAY
`SUBSTRATE” (CLAIM 1) ................................................................................... 3
`U.S. PATENT NO. 7,499,042 (“’042 PATENT”) ............................................................ 3
`A.
`“SELECTION PERIOD” (CLAIM 1) ................................................................... 3
`B.
`“SEQUENTIALLY SELECTS SAID PLURALITY OF SELECTION
`SCAN LINES IN EACH SELECTION PERIOD” (CLAIM 1) ............................ 6
`“DESIGNATING CURRENT” (CLAIM 1) .......................................................... 7
`C.
`“CURRENT LINES” (CLAIM 1) ......................................................................... 8
`D.
`U.S. PATENT NO. 7,663,615 (“’615 PATENT”) ............................................................ 9
`A.
`“THE OPERATION” (CLAIM 11) ....................................................................... 9
`B.
`“PRECHARGE VOLTAGE” (CLAIM 11) ......................................................... 11
`C.
`“WRITING CONTROL SECTION” (CLAIM 11) ............................................. 12
`D.
`“DATA LINES” (CLAIM 11) ............................................................................. 13
`IV. U.S. PATENT NO. 7,573,068 (“’068 PATENT”) .......................................................... 15
`A.
`“FORMED ON SAID PLURALITY OF SUPPLY LINES ALONG SAID
`PLURALITY OF SUPPLY LINES” (CLAIM 1) / “CONNECTED TO
`SAID PLURALITY OF SUPPLY LINES ALONG SAID PLURALITY
`OF SUPPLY LINES” (CLAIM 13) ..................................................................... 15
`“SIGNAL LINES” / “SUPPLY LINES” (CLAIMS 1, 13) ................................. 17
`“SOURCE” / “DRAIN” (CLAIMS 1, 13) ........................................................... 19
`
`III.
`
`B.
`C.
`
`i
`
`

`

`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 3 of 29
`TABLE OF AUTHORITIES
`
`Page(s)
`
`Cases
`
`Edwards Lifesciences LLC v. Cook Inc.,
`582 F.3d 1322 (Fed. Cir. 2009) .................................................................................................. 2
`
`Energizer Holdings, Inc. v. Int’l Trade Comm’n,
`435 F.3d 1366 (Fed. Cir. 2006) ............................................................................................ 9, 10
`
`Enzo Biochem Inc. v. Applera Corp.,
`780 F.3d 1149 (Fed. Cir. 2015) ................................................................................................ 16
`
`GPNE Corp. v. Apple Inc.,
`830 F.3d 1365 (Fed. Cir. 2016) ............................................................................................ 9, 14
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) ........................................................................................ 3, 9, 14
`
`Sinorgchem Co., Shandong v. Int'l Trade Comm’n,
`511 F.3d 1132 (Fed. Cir. 2007) .................................................................................................. 2
`
`ii
`
`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 4 of 29
`
`Table of Defendants’ Exhibits1
`
`AA02
`
`AA03
`
`AA04
`AA05
`AA06
`
`BB01
`BB02
`BB03
`
`BB04
`
`DD01
`
`Ex. No. Exhibit / Publication Name
`AA01
`Excerpt from Prosecution History of U.S. Patent No. 7,446,338 – February 25, 2008
`Amendment
`Claim Construction Memorandum and Order, Solas OLED Ltd. v. Samsung Display
`Co. Ltd., et al., 2:19-cv-00152-JRG, Dkt. 99 (Apr. 17, 2020, E.D. Tex.)
`Excerpts from Deposition of Richard A. Flasck, Solas OLED Ltd. v. Samsung
`Display Co. Ltd. et al., 2:19-cv-00152-JRG (Feb. 6, 2020, W.D. Tex.)
`Solas’s Proposed terms for Construction
`Patent Owner’s Preliminary Response, IPR2020-00320 (April 25, 2020, PTAB)
`Solas Notice Of Agreement On Previously Disputed Claim Construction Terms,
`Solas OLED Ltd. v. Samsung Display Co., 2:19-cv-00152-JRG, Dkt. 98 (E.D. Tex.,
`April 15, 2020)
`Prosecution History of European Patent Application No. 1,372,136
`Prosecution History of U.S. Patent No. 7.499,042
`Jiun-Haw Lee et al., Introduction to Flat Panel Displays 50-52 (John Wiley & Sons
`2008)
`Johnathan Halls, Short Course S-4: Fundamentals of OLEDs/PLEDs, S-4/101
`(Society for Information Display, May 18, 2008)
`Declaration of Richard A. Flasck in Support Of Solas’s Responsive Claim
`Construction Brief, Solas OLED Ltd. v. LG, Ltd., et al, 6:19-cv-00236-ADA (Apr.
`3, 2020, W.D. Tex.)
`Solas’s Reply Claim Construction Brief, Solas OLED Ltd. v. LG, Ltd., et al, 6:19-
`cv-00236-ADA (Apr. 24, 2020, W.D. Tex.)
`Videoconference Deposition of Richard A. Flasck, Solas OLED Ltd. v. LG, Ltd., et
`al, 6:19-cv-00236-ADA, Dkt._82 (Apr. 14, 2020, W.D. Tex.)
`Phillip A. Laplante, Comprehensive Dictionary of Electrical Engineering 213, 643
`(Taylor & Francis Group, 2nd ed. 2005)
`Stan Gibilisco, The Illustrated Dictionary of Electronics 179 (McGraw-Hill, 8th ed.
`2001)
`A Dictionary of Science 738-39 (Oxford University Press, 2006)
`Steven M. Kaplan, Wiley Electrical and Electronics Engineering Dictionary 237
`(John Wiley & Sons, Inc., 2004)
`Collins Dictionary Electronics 139 (HarperCollins, 2007)
`Erin McKean, The New Oxford American Dictionary 545 (Oxford University Press,
`2nd ed. 2005)
`
`DD02
`
`DD03
`
`DD04
`
`DD05
`
`DD06
`DD07
`
`DD08
`DD09
`
`1 All exhibits were filed with Defendants’ opening and responsive claim construction briefs. No
`additional exhibits are being filed with this reply brief.
`
`

`

`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 5 of 29
`
`Table Of Abbreviations For Citations To Parties’ Briefs And Expert Declarations
`
`Acronym
`Solas Open.
`
`Solas Resp.
`
`Defs. Open.
`
`Defs. Resp.
`
`Flasck Open.
`Decl.
`Flasck Resp.
`Decl.
`Kanicki Open.
`Decl.
`Kanicki Resp.
`Decl.
`
`Document Description
`Solas’s Opening Claim Construction Brief
`Filed as Dkt. 74 in the Solas OLED Ltd. v. Google LLC, Case No. 6:19-cv-
`00515-ADA (“Google Case”)
`Solas’s Responsive Claim Construction Brief
`Filed as Dkt. 76 in the Google Case
`Defendants’ Opening Claim Construction Brief
`Filed as Dkt. 73 in the Google Case
`Defendants’ Responsive Claim Construction Brief
`Filed as Dkt. 75 in the Google Case
`Declaration of Mr. Richard Flasck Supporting Solas’s Opening Brief
`Filed as Dkt. 74-2 in the Google Case
`Declaration of Mr. Richard Flasck Supporting Solas’s Responsive Brief
`Filed as Dkt. 76-1 in the Google Case
`Declaration of Dr. Jerzy Kanicki Supporting Defendants’ Opening Brief
`Filed as Dkt. 73-1 in the Google Case
`Declaration of Dr. Jerzy Kanicki Supporting Defendants’ Responsive Brief
`Filed as Dkt. 75-1 in the Google Case
`
`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 6 of 29
`
`I.
`
`U.S. Patent No. 7,446,338 (“’338 Patent”)
`
`A.
`
`“transistor array substrate” (claim 1)
`
`Solas agreed to Defendants’ proposed construction in both the Eastern District of Texas
`
`and the PTAB, see Ex. AA06; AA05 at 27–28, and Solas’s statements to the PTAB constitute new
`
`intrinsic evidence supporting Defendants’ construction. Solas’s attempt to explain away its
`
`complete reversal is devoid of merit. Solas Resp. at 3. Solas now asserts that its statements to the
`
`PTAB were merely “pointing out the arguments that Samsung was presenting to the Board were
`
`inconsistent with the positions Samsung was taking in district court,” but that is plainly incorrect:
`
`Samsung Display took the same position in both the Eastern District and the PTAB. Indeed,
`
`pointing out a supposed “inconsisten[cy]” would not have required Solas to represent to the PTAB
`
`that it agreed to Defendants’ proposed construction, yet the fact is that Solas agreed to it and did
`
`so without qualification. Solas also has no explanation for how its representation to the Eastern
`
`District that it accepted Defendants’ proposed construction could be squared with its assertion that
`
`it was merely pointing out a purported “inconsisten[cy].” Simply put, if Solas had a substantive
`
`reason for disavowing the construction that it recognized to be appropriate just months ago, it
`
`would have offered one.
`
`Defendants agree that the term “substrate” has a well-established meaning in the art, but
`
`Claim 1 does not recite a “substrate,” it recites a “transistor array substrate.” The difference is
`
`crucial, as the ’338 Patent discloses that a “substrate” is just one layer of the “transistor array
`
`substrate.” ’338 at 10:45–47 (“The layered structure from the insulating substrate 2 to the
`
`planarization film 33 is called a transistor array substrate 50.”). The claim specifies that the
`
`“transistor array substrate” also “comprises a plurality of transistors,” meaning that the “transistor
`
`array substrate” must contain transistors. Solas’s construction, which allows the transistors to be
`
`formed “upon” the transistor array substrate instead of within it, conflicts with the claim language.
`
`1
`
`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 7 of 29
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`Further, when a structure is formed on the transistor array substrate rather than within it, Claim 1
`
`uses different language: e.g., the “plurality of pixel electrodes” is arrayed “on the surface of the
`
`transistor array substrate.” And Solas’s proposed “clarification” of repeating the claim language
`
`“comprises a plurality of transistors” within the construction, Solas Resp. at 1–2, does not resolve
`
`the parties’ dispute, and results in a construction that is needlessly unclear.
`
`The specification reinforces Defendants’ interpretation of the claim language and proposed
`
`construction. Solas cannot point to a single instance in which the “transistor array substrate” does
`
`not contain the array of transistors. Solas’s efforts to distinguish Sinorgchem Co., Shandong v.
`
`Int'l Trade Comm’n, 511 F.3d 1132 (Fed. Cir. 2007) also fail. Not only do Solas’s arguments
`
`about Sinorgchem fail to address the claim language here, see Solas Resp. at 2–3, they further
`
`disregard that the Federal Circuit in Sinorgchem found express definition and did not categorize
`
`use of the term “is” as “weaker evidence.” 511 F.3d at 1136. Solas’s attempt to distinguish
`
`Edwards is similarly unavailing. Solas Resp. at 3. The statement in Edwards was no more
`
`“categorical” than the statements of the ’338 Patent. Id. In fact, in Edwards, the Court explicitly
`
`found that “[c]ontrary to Edwards’s argument, the location within the specification in which the
`
`definition appears is irrelevant.” Edwards Lifesciences LLC v. Cook Inc., 582 F.3d 1322, 1334
`
`(Fed. Cir. 2009) (finding that “the definition was not limited to the embodiment being discussed.”).
`
`Finally, Solas constructs a strawman to argue that “[i]t is simply not true that one must be
`
`able to look at a single claim term such as ‘transistor array substrate’ in isolation and be able to
`
`find one and only one structure in an accused products that satisfies that claim term.” Solas Resp.
`
`at 2. This is not Defendants’ argument. Defendants showed Solas’s construction is fundamentally
`
`defective because it would provide no way to identify in a product what structures are a “transistor
`
`array substrate” and what structures are not part of the transistor array substrate. Solas fails to
`
`2
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 8 of 29
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`address the fact that its construction would, if applied to the preferred embodiment of the ’338
`
`Patent, fail to include layers explicitly identified in the specification as part of the “transistor array
`
`substrate.” See Defs. Open. at 5. Solas further fails to address, much less rebut, that its
`
`construction would leave indeterminate which layers would constitute a transistor array substrate.
`
`B.
`
`“project from a surface of the transistor array substrate” (claim 1)
`
`“The construction that stays true to the claim language and most naturally aligns with the
`
`patent’s description of the invention will be, in the end, the correct construction.” Phillips v. AWH
`
`Corp., 415 F.3d 1303, 1316 (Fed. Cir. 2005) (en banc). Solas argues that “[n]othing in the claims
`
`refers to the interconnections serving as partition walls or preventing leakage.” Solas Resp. at 4.
`
`But preventing leakage is a stated purpose of the invention, and Solas disregards that the language
`
`of the claim parallels the specification’s description of the structure required to achieve that
`
`purpose. See ’338 at 6:24-30, 6:38-42, 12:62-13:3. Solas’s construction is inconsistent with this
`
`stated purpose. It is not surprising that Solas provides no support for its assertion that
`
`“[i]nterconnections that project from the local surface of the transistor array substrate can serve as
`
`partitions on that surface, even if there may be some other ‘upper’ surface elsewhere on the
`
`substrate,” Solas’s Resp. at 4, because there is no support for such an assertion in the ’338 Patent.
`
`II.
`
`U.S. Patent No. 7,499,042 (“’042 Patent”)
`
`A.
`
`“selection period” (Claim 1)
`
`Solas agrees with the key aspect of HP’s construction: in each “selection period,” a
`
`selection scan line must be kept active (or selected) during that entire period. Indeed, Solas rejects
`
`any suggestion that “the ‘selection period’ could encompass periods ‘when a line or circuit is
`
`inactive and not selected.’” Solas Resp. at 14. Thus, the parties agree that the selection scan line
`
`cannot be inactive (or not selected) during any part of the “selection period.”
`
`3
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 9 of 29
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`Solas’s disagreement with HP’s construction is based on trivial objections about word
`
`choice. Solas objects that the ’042 Patent does not use the words “active” or “on” to describe the
`
`state of a “selection scan line,” but instead uses the word “selected” or describes applying an “(ON-
`
`level) ON Voltage VON” to that line. Id. (citing ’042 at 9:13-19). But there is no material difference
`
`between “active,” “on,” “selected,” or applying an “ON Voltage VON” in the ’042 Patent’s
`
`context―these words all express the same concept. The specification, in fact, interchangeably
`
`refers to transistors being “ON” or “selected.” Compare ’042 at 9:5-12 (“selecting the first and
`
`second transistors”), with 10:23-27 (“transistor 23 is ON and the transistor 21 is OFF”). Solas
`
`itself acknowledges the equivalence of these words, given its objection to HP’s construction as
`
`being redundant for using both “selected” and “active.” Solas Open. at 18.2
`
`What’s more, Solas’s objections regarding the proper usage of “selected” versus “active”
`
`are more applicable to its own proposal, which states “a plurality of pixel circuits is selected.” But
`
`the specification never describes “pixel circuits” as being “selected.” Instead, in the ’042 Patent,
`
`each pixel circuit includes three transistors, and each transistor is individually selected or turned
`
`on. ’042 at 9:5-12, 10:23-27. There is no notion of “select[ing]” a “pixel circuit(s).”
`
`Solas also fails to justify its proposal of defining “selection period” with respect to “a
`
`plurality of pixel circuits,” rather than with respect to a “selection scan line.” Solas’s briefs admit
`
`that the ’042 Patent expressly defines a “selection period” with respect to a “selection scan line,”
`
`stating: “a period in which the selection scan driver 5 . . . selects the selection scan line Xi in the
`
`ith row is called a selection period.” Id. at 9:22–27; Solas Resp. at 15; Solas Open. at 17.
`
`2 To address Solas’s semantic objections, HP is amenable to an alternative construction of “time
`duration in which a selection scan line is kept selected.”
`4
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 10 of 29
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`Solas nevertheless proposes deviating from this definition based on its assertion that a
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`“‘selection scan line’ comprises ‘a plurality of
`
`pixel circuits.’” Solas Resp. at 15. Solas’s
`
`assertion is plainly incorrect. As depicted in
`
`annotated Figure 1, each “selection scan line”
`
`(yellow) is a horizontal line that connects to a
`
`row of pixel circuits (blue). ’042 at 2:46-48 (“a
`
`plurality of pixel circuits which are connected to
`
`the plurality of selection scan lines.”). Thus, a
`
`“selection scan line” is a separate structure from the “pixel circuits” to which the line connects.
`
`The “selection scan line” does not itself “comprise” any “pixel circuits.”
`
`Further, by defining “selection period” to refer to when any “plurality of pixel circuits” are
`
`selected―not just “pixel circuits” connected to one “selection scan line”―Solas’s proposal places
`
`no limit at all on the duration of the “selection period.” See Defs. Resp. at 9. In fact, under Solas’s
`
`proposal the “selection period” refers to any time duration. This is because at any given time
`
`during the operation of an OLED display panel, the pixel circuits connected to one selection scan
`
`line are selected. Thus, a “plurality of pixel circuits is selected” at all times during operation. Id.
`
`Solas also favors using “plurality of pixel circuits” over “selection scan line” in the
`
`construction because the latter phrase is used elsewhere in Claim 1 and therefore allegedly
`
`redundant. Solas Resp. at 15. But Solas’s concern over redundancy applies equally to its own
`
`proposal―the phrase “plurality of pixel circuits” appears three times in Claim 1. Thus, following
`
`the specification, “selection period” should be defined with respect to a “selection scan line.”
`
`5
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 11 of 29
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`B.
`
`“sequentially selects said plurality of selection scan lines in each selection
`period” (Claim 1)
`
`Solas’s briefs argue that (1) no construction is required for this disputed 12-word term
`
`because it “includes only words and phrases that have a plain and ordinary meaning” and (2) HP’s
`
`construction limits the claim to an “exemplary embodiment” based on a “singular statement in the
`
`specification.” Solas Open. at 19; Solas Resp. at 17. Solas is wrong on both counts.
`
`First, the disputed term lacks any ordinary meaning outside the context of the ’042 Patent.
`
`Not only does the term include technical phrases coined by the ’042 Patent (e.g., “selection
`
`period”), but its meaning is unclear on its face without context. In particular, it is ambiguous
`
`whether one or a plurality of “selection scan lines” is selected in each “selection period.”
`
`Second, the claim’s ambiguity is resolved by context from the specification, which makes
`
`clear that (a) each “selection scan line” is active during its own “selection period,” and (b) only
`
`one “selection scan line” can be active at a time―as a result, the “selection periods” of multiple
`
`selection scan lines must be non-overlapping in time. See Defs. Open. at 11-12. The
`
`specification’s context goes well beyond the “singular” and unequivocal statement that Solas
`
`identifies: “the selection periods TSE of the selection scan lines X1 to Xm do not overlap each other.”
`
`’042 at 9:29-31. The specification’s context further includes every embodiment. Indeed, the
`
`specification explains that “selection scan lines” are “individually” selected so that “while
`
`applying the ON voltage VON to the selection scan line Xi, the selection scan driver 5 applies the
`
`OFF voltage VOFF to the other selection scan lines X1 to Xm (except for the selection scan line Xi).”
`
`Id. at 9:13-19, 9:26-29, Fig. 4. Thus, at any given time, only one “selection scan line” can be
`
`selected or “ON” while all other lines are de-selected or “OFF.” There is no contrary suggestion
`
`in the ’042 Patent that two or more “selection scan lines” could be on at the same time and have
`
`overlapping “selection periods,” and Solas identifies none.
`
`6
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 12 of 29
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`C.
`
`“designating current” (Claim 1)
`
`Solas’s arguments opposing construing “designating current” to require a “constant”
`
`current value demonstrate a fundamental misunderstanding of the ’042 Patent. As shown in
`
`annotated Figure 4 below, the ’042 Patent programs and displays a unique brightness level to each
`
`pixel through a cyclical, three-step process. First, in a period known as the “reset period TR” or
`
`the “first part of the selection period” (green), a “reset voltage” is applied, clearing the brightness
`
`level stored on the pixel
`
`from
`
`the prior cycle.
`
`’042
`
`at 11:50-12:15,
`
`Claim 1 (“appl[ying] a
`
`reset voltage . . . in a first
`
`part of
`
`the selection
`
`period”). Next, in the
`
`“second part of
`
`the
`
`selection period” (yellow), a “designating current” IDATA is applied, which programs the brightness
`
`level of the pixel. Id. at 11:41-57, Claim 1 (“suppl[ying] a designating current . . . in a second part
`
`of the selection period”). Finally, in the “non-selection period” TNSE (red), the programmed
`
`brightness level is displayed. See id. at 10:44-47. Each of these three steps occur in one cycle
`
`called a “frame period TSC,” where one brightness level is programmed and displayed. See id. at
`
`9:53-57. Over many cycles or frame periods, a pixel can be programmed to display many different
`
`brightness levels, with one level programmed and displayed in each cycle. See id.
`
`The critical point is that across the time periods shown in Figure 4, the “designating
`
`current” IDATA only exists in the second part of the “selection period” TSE. During this time “the
`
`current value of the tone designating current IDATA [is held] constant” “in accordance with the
`7
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 13 of 29
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`image signal for each selection period TSE of each row.” Id. at 11:41-57. The “designating current”
`
`does not exist―and therefore does not have any value (constant or otherwise)―during the first
`
`“reset” subperiod or in the later “non-selection period.” Id. at 12:16-21; see Defs. Resp. at 13-14.
`
`With the foregoing context in mind, Solas’s arguments are irrelevant misdirection. First,
`
`while Solas acknowledges that the “designating current IDATA [is] constant in a period from the
`
`end of each reset period TR to the end of the corresponding selection period TSE,” it argues that the
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`“specification never describes the designating current as being held constant during the first reset
`
`portion of the selection period.” Solas Resp. at 19 (citing ’042 at 11:47-59). As explained above,
`
`however, the “designating current” does not even exist in the “first reset portion of the selection
`
`period.” Instead, as the specification states, the “designating current” only exists in the selection
`
`period’s second portion, which starts from the “end of each reset period TR” and continues to “the
`
`end of the corresponding selection period TSE.” ’042 at 11:50-57.
`
`Second, Solas states that the “designating current” has a value “corresponding to an image
`
`signal.” Solas Resp. at 19-20. This is true, but it has no relevance to whether the “designating
`
`current” is held constant. To the extent Solas is implying that an “image signal” has a brightness
`
`level that varies over time, any such variations occur between multiple cycles, not within one cycle.
`
`But Claim 1 and HP’s construction concern what happens in one cycle. And in each cycle, a new
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`“designating current” with constant value is generated to represent the image signal.
`
`Third, Solas completely misreads its other cited evidence, column 16:31-32 and Figure 9,
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`for reasons already explained in detail in Defendants’ response brief. Defs. Resp. at 14-15.
`
`D.
`
`“current lines” (Claim 1)
`
`Solas’s proposal and arguments for “current lines” present an example of its flawed
`
`understanding of plain and ordinary meaning. Plain meaning is not the meaning based on an
`
`8
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`

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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 14 of 29
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`attorney’s say-so or a lay juror’s understanding. Rather, it is the meaning to a person of ordinary
`
`skill after considering the “context of the written description.” Phillips, 415 F.3d at 1313, 1321.
`
`In the context of the ’042 Patent and all its embodiments, as detailed in Defendants’ briefs,
`
`the “current lines” are conductive lines, where each individual “current line” connects to a line of
`
`pixel circuits. Defs. Resp. at 15-16. Indeed, the specification consistently refers to the “current
`
`lines” as “current lines Y1 to Yn” or “current line Yj” over 100 times across embodiments, where
`
`“Y” denotes the vertical lines in the patent’s figures, each connecting to a column of pixel circuits.
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`E.g., ’042 at 5:12-20, Figs. 1, 3, 10-12. In GPNE Corp. v. Apple Inc., the Federal Circuit construed
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`“node” as “pager” because the specification “repeatedly and exclusively” used “pager” “over 200
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`times . . . to refer to the devices in the patented system.” 830 F.3d 1365, 1370-71 (Fed. Cir. 2016)
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`. Similarly, “current lines” should be construed consistently with the specification’s repeated use
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`of that term to refer to the specific “current lines Y,” each of which connects to a column of pixels.
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`Construing “current lines” to refer to any “conductive lines for carrying current,” as Solas
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`proposes, places no bounds on the term because every “conductive line” is “for carrying current.”
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`As a result, Solas’s proposal for “current lines” encompasses other types of lines that the
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`specification never calls “current lines,” including lines internal to only a single pixel circuit.
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`III.
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`U.S. Patent No. 7,663,615 (“’615 Patent”)
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`A.
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`“the operation” (Claim 11)
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`In both of its briefs, Solas admits that “the operation” lacks antecedent basis. Solas Resp.
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`at 22; Solas Open. at 24. Solas, however, insists that “lack of antecedent basis does not render a
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`claim indefinite so long as here the term has a ‘reasonably ascertainable meaning,’ which ‘must
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`be decided in context,’” citing Energizer Holdings, Inc. v. Int’l Trade Comm’n, 435 F.3d 1366,
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`1370 (Fed. Cir. 2006). Solas Resp. at 22. But in Energizer, the term lacking express antecedent
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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 15 of 29
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`basis, “said zinc anode,” closely resembled another limitation in the claim, “anode gel comprised
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`of zinc,” which provided implicit antecedent basis. 435 F.3d at 1369-71.
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`By contrast, “the operation” bears no resemblance to the 36-word phrase that Solas
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`identifies. Solas argues that “the operation” and the 36-word phrase are interchangeable, though,
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`because “the operation” is performed by the “light emission control section,” and “the operation”
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`must “refer to the earlier—and only—recitation of what the light emission control section does,”
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`which is the 36-word phrase in Solas’s proposal. Solas Resp. at 22-23 (emphasis original). As
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`discussed in Defendants’ response brief, Solas’s argument hinges on an incorrect premise: that
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`there is only one, definitive “operation” that the “light emission control section” performs and that
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`“operation” is captured by Solas’s 36-word proposal. Defs. Resp. at 19-20.
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`The specification refutes Solas’s premise, showing instead that the “light emission control
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`section” performs many different “operations.” As detailed in Defendants’ briefs and its expert
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`Dr. Kanicki’s declarations, the specification describes at least seven different “operations,”
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`including: “precharge operation,” “threshold correction operation,” “writing operation,” “light
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`emission operation,” “drive control operation,” “display operation,” and “gradation sequence
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`display operation.” E.g., Defs. Resp. at 17-20; Kanicki Resp. Decl. at ¶¶9-16. Critically, the “light
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`emission control section”3 performs every one of the many different “operations.” Id. Thus, no
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`one “operation” can be characterized as “the operation” of the “light emission control section.”
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`Further, the many functions that the light emission control section performs across its many
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`“operations” in the specification far exceed the two operations described in Solas’s 36-word
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`3 The parties agreed to construe “light emission control section” as “drive transistor.” Solas Op.,
`Ex. 7 (joint chart). In the specification, the “drive transistor” (element Tr13) actively performs
`many different “operations.” E.g., ’615 at 20:12-30 (Tr13 performing “precharge operation”),
`21:35-52 (Tr13 performing “threshold correction operation”), 24:5-28 (Tr13 performing “writing
`operation”), 25:41-53 (Tr13 performing “light emission operation.”).
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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 16 of 29
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`proposal. Id. Solas is therefore incorrect in suggesting that a “POSITA would clearly understand
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`‘the operation’” to refer to the 36-word phrase. Solas Resp. at 22. In truth, a POSITA would find
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`Solas’s choice of the 36-word phrase as “the operation” arbitrary given the many other
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`“operations” that the “light emission control section” performs.
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`Solas distinguishes the cases cited in HP’s brief by claiming that unlike the plaintiffs in
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`those cases, Solas is not trying to correct the claims to fix an antecedent basis issue, but it is instead
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`proposing “plain and ordinary meaning” and asking the Court for “clarification in its ruling or a
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`footnote” about what “the operation” means. Solas Resp. at 23-24. But Solas’s request for
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`“clarification” is simply a backdoor way of correcting Claim 11’s indefiniteness problem by
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`construing “the operation” as 36 different words. If the meaning of “the operation” were so clear,
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`no clarification would be necessary. Further, Solas’s supposed “plain and ordinary meaning”
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`proposal is anything but. The plain meaning of “the operation” is not Solas’s 36-word proposal.
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`B.
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`“precharge voltage” (Claim 11)
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`Solas concedes that while Claim 11 recites only one “precharge voltage,” the specification
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`discloses two different types of “precharge voltages”: (1) “Vpre” and (2) “Vpre13.” Solas Resp.
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`at 25. Solas nonetheless contends that there is no ambiguity over what “precharge voltage” means
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`because it “corresponds to the ‘precharge voltage Vpre,’ and not Vpre13.” Id. at 25-26.
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`Solas’s choice of Vpre―rather than Vpre13―as the claimed “precharge voltage,”
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`however, is arbitrary and premised on two flawed arguments. First, Solas argues that Vpre13 is
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`not a “precharge voltage” because “Vpre13 is consistently referred to as the ‘drive transistor
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`precharge voltage Vpre13’ . . . Vpre13 is never referred to as the ‘precharge voltage.’” Solas
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`Resp. at 25 (emphasis original). Solas’s own quote defeats its assertion: “Vpre13” is preceded by
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`the label “precharge voltage.” The additional prefix of “drive transistor” does not somehow
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`remove or alter the “precharge voltage” label. Thus, Vpre13 is referred to as “precharge voltage.”
`11
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`Case 6:19-cv-00537-ADA Document 51 Filed 07/30/20 Page 17 of 29
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`Second, according to Claim 11, the “precharge voltage” must have two characteristics: (1)
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`it is applied by the “data driver” to the “data line” and (2) it has a value that “exceed[s] a threshold
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`value of the drive transistor.” See ’615 at Claim 11 (“the data driver applies a precharge voltage
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`exceeding a threshold value of the drive transistor to the data line”); Defs. Open. at 19-21; Defs.
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`Resp. at 20-22. But Solas and its expert Mr. Flasck only describe how Vpre satisfies the first
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`characteristic: that it is applied to the data line. Solas Resp. at 26; Flasck Resp. Decl. ¶¶22–24.
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`They make no attempt to show that Vpre satisfies the second characteristic “exceeding a threshold
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`value of the drive transistor.”
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`Solas’s and Mr. Flasck’s omission is not surprising: the specification provides no
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`suggestion that Vpre exceeds the threshold value of the drive transistor. By contrast, the
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`specification repeatedly explains that the other precharge voltage―Vpre13―exceeds the
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`threshold value, also called “Vth