Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 1 of 134 PageID #: 5413
`Case 5:19-cv-00036—RWS Document 130-4 Filed 11/14/19 Page 1 of 134 PageID #: 5413
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`EXHIBIT B
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`EXHIBIT B
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 2 of 134 PageID #: 5414
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Invalidity of U.S. Patent No. 8,339,493
`by
`Casio QV-8000SX (“QV8000SX”)
`
`
`The excerpts cited herein are exemplary. For any claim limitation, Defendant may rely on excerpts cited for any other limitation
`and/or additional excerpts not set forth fully herein to the extent necessary to provide a more comprehensive explanation for a
`reference’s disclosure of a limitation. Where an excerpt refers to or discusses a figure or figure items, that figure and any additional
`descriptions of that figure should be understood to be incorporated by reference as if set forth fully therein.
`
`Except where specifically noted otherwise, this chart applies the apparent constructions of claim terms as used by Plaintiff in its
`infringement contentions; such use, however, does not imply that Defendant adopts or agrees with Plaintiff’s constructions in any
`way.
`
`Defendant is investigating this prior art and have not yet completed discovery from third parties who may have information
`concerning it. Defendants reserve the right to modify, amend and/or supplement these contentions as information becomes available,
`and as discovery proceeds.
`
`U.S. Patent No. 8,339,493 (“the ’493 Patent”) claims priority to Japanese Application No. 2000-006064, filed January 11, 2000. For
`purposes of these invalidity contentions, Defendant applies the Jan. 11, 2000, priority date for the ’493 Patent. However, Defendant
`reserves the right to contest Plaintiff’s reliance on the Jan. 11, 2000 priority date, should the priority date become an issue in this
`proceeding.
`
`On information and belief, the Casio QV-8000SX was publicly available and/or offered for sale in the US at least as early as
`September 10, 1999. Casio QV-8000SX qualifies as prior art to the ’493 Patent under at least 35 U.S.C. § 102(a) (Pre-AIA). On
`Information and belief, the operations and features of the Casio QV-8000SX are disclosed, at least, in part, in the following printed
`publications, which, on information and belief, qualify as prior art under 35 U.S.C. § 102(a):
`• Casio QV-8000SX Manual (“QV8000SX Manual”)
`• PC Magazine dated November 16, 1999
`• Shutterbug dated December 1, 1999
`
`
`U.S. Patent No. 6,335,760 to Sato (“Sato”) was filed on March 24, 1998, and issued on January 1, 2002. Sato qualifies as prior art
`with regard to the ’493 Patent at least under 35 U.S.C. § 102(e) (pre-AIA).
`
`
`
`
`1
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 3 of 134 PageID #: 5415
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`U.S. Patent No. 7,903,162 to Juen (“Juen”) claims priority to a provisional application filed March 27, 1997, and issued on March 8,
`2011. Juen qualifies as prior art with regard to the ’493 Patent at least under 35 U.S.C. § 102(e) (pre-AIA).
`
`U.S. Patent No. 6,018,363 to Horii (“Horii”) was filed on April 24, 1995, and issued on January 25, 2000. Horii qualifies as prior art
`with regard to the ’493 Patent at least under 35 U.S.C. § 102(e) (pre-AIA).
`
`U.S. Patent No. 5,444,482 to Misawa et al. (“Misawa”) issued on August. 22, 1995. Misawa qualifies as prior art with regard to the
`’493 Patent at least under 35 U.S.C. § 102(b) (pre-AIA).
`
`U.S. Patent No. 5,502,483 to Takase et al. (“Takase”) issued on March 26, 1996. Takase qualifies as prior art with regard to the ’493
`Patent at least under 35 U.S.C. § 102(b) (pre-AIA).
`
`U.S. Patent No. 4,612,575 to Ishman et al. (“Ishman”) issued on September 16, 1986. Ishman qualifies as prior art with regard to the
`’493 Patent at least under 35 U.S.C. § 102(b) (pre-AIA).
`
`QV8000SX anticipates or renders obvious claims 1, 3, 5, and 10 under 35 U.S.C. §§ 102 and 103(a).
`
`Alterantively, QV8000SX in view of Sato renders obvious claims 1, 3, 5, and 10 under 35 U.S.C. § 103(a).
`
`Alternatively, QV8000SX in view of Horii renders obvious claims 1, 3, 5, and 10 under 35 U.S.C. § 103(a).
`
`Alternatively, QV8000SX in view of Sato and/or Horii renders obvious claims 1, 3, 5, and 10 under 35 U.S.C. § 103(a).
`
`Alternatively, QV8000SX view of Sato and/or Horii and in further view of Juen renders obvious claims 1, 3, 5, and 10 under 35
`U.S.C. § 103(a).
`
`Alternatively, QV8000SX in view of Sato and/or Horii and/or Juen and further in view of Misawa, Takase, or Ishman renders obvious
`claims 1, 3, 4, 5, 6, 10, and 11 under 35 U.S.C. § 103(a).
`
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`2
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 4 of 134 PageID #: 5416
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`U.S. Patent No.
`8,339,493
`Claim 1
`[1(P)] An electric
`camera
`comprising:
`
`
`QV8000SX
`
`To the extent the preamble is limiting, QV8000SX discloses an electric camera.
`
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`
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`QV8000SX Manual at 1.
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`3
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 5 of 134 PageID #: 5417
`Defendant’s Invalidity Contentions
`Exhibit B13
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`Id. at 2.
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`4
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 6 of 134 PageID #: 5418
`Defendant’s Invalidity Contentions
`Exhibit B13
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`
`Id. at 3.
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`5
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 7 of 134 PageID #: 5419
`Defendant’s Invalidity Contentions
`Exhibit B13
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`Id. at 4.
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`6
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 8 of 134 PageID #: 5420
`Defendant’s Invalidity Contentions
`Exhibit B13
`
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`Id. at 5.
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`Further, Sato discloses an electric camera, as claimed.
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`7
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 9 of 134 PageID #: 5421
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`An image signal reproduction device, provided in an electronic still camera, comprises a
`CPU, an image signal processing circuit, a memory card, in which a compressed image signal
`is recorded, and a display device having a liquid crystal display (LCD) and a resolution
`recognition unit. A clock pulse, outputted from the CPU, is received by the resolution
`recognition unit, so that a recognition pulse, corresponding to the inherent resolution of the
`LCD, is outputted from the resolution recognition unit to the image signal processing circuit.
`The compressed image signal is read from the memory card, and reproduced to some extent
`corresponding to the resolution of the LCD.
`
`Sato at Abstract.
`
`
`The present invention relates to an image reproduction device, which, based on an image
`signal outputted by a CCD, for example, reproduces and indicates an image on a display.
`
`
`Sato at 1:5-8.
`
`See also id. at 1:39-42, 2:54-57, 3:39-59, Fig. 1. A motivation to combine Sato with QV8000SX is provided
`below.
`
`Further, Horii discloses an electric camera, as claimed.
`
`
`An image taking apparatus includes an image taking sensor 10 having a high-resolution
`mode and a normal mode; synchronous signal generators 7 and 8 for generating synchronous
`signals corresponding to the high-resolution mode and the ordinary mode, respectively; a first
`memory 17 for storing image signals taken in the high-resolution mode; a second memory 35
`for storing image signals taken in the normal mode; and a video signal encoder 33 for
`processing the image signals stored in the second memory 35 in accordance with a
`predetermined image signal system, wherein, in the high-resolution mode, image signals are
`stored in the first memory 17 to output digital image signals, and, in the normal mode, image
`signals are stored in the second memory 35, video signals 34 being output from the encoder
`33.
`
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`
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`Horii at Abstract.
`
`8
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 10 of 134 PageID #: 5422
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`
`
`The present invention relates to an image taking apparatus, such as a video camera, that is
`equipped with an image taking device, such as a charge-coupled device (hereinafter referred
`to as "CCD").
`
`
`Horii at 1:6-9.
`
`See also id. at 6:5-10, Figs. 1, 4, 8. A motivation to combine Horii with QV8000SX is provided below.
`
`On information and belief, QV8000SX discloses an image sensing device with a light receiving sensor having
`an array of pixels arranged vertically and horizontally in a grid pattern, in an N number of vertically arranged
`pixel lines.
`
`
`[1(a)(i)] an image
`sensing device
`with a light
`receiving sensor
`having an array of
`pixels arranged
`vertically and
`horizontally in a
`grid pattern, in an
`N number of
`vertically
`arranged pixel
`lines,
`
`
`
`9
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 11 of 134 PageID #: 5423
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`QV8000SX Manual at 10.
`
`
`10
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 12 of 134 PageID #: 5424
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 118.
`
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`11
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 13 of 134 PageID #: 5425
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`
`Id. at 53.
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`12
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 14 of 134 PageID #: 5426
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Further, Sato discloses an image sensing device with a light receiving sensor having an array of pixels arranged
`vertically and horizontally in a grid pattern, in an N number of vertically arranged pixel lines.
`
`
`In the electronic still camera 10, an optical image obtained by a photographing optical
`system (not shown) is formed on a light receiving surface of a CCD (charge coupled
`device) 11, so that the optical image is photoelectrically-converted to an electric charge
`signal by the CCD 11. The electric charge signal, which is an analog image signal, having
`been outputted from the CCD 11, is converted by an A/D converter 12 to a digital image
`signal.
`
`the pixel block F2 corresponds to a luminance value or a color differential data of the pixel,
`and is a positive integer.
`
`
`Sato at 4:41-46.
`
`See also id. at 7:8-32, Figs. 1-2.
`
` A
`
` PHOSITA would have found it obvious to modify QV8000SX’s multimode camera to operate using an
`image sensing device with a light receiving sensor having an array of pixels arranged vertically and
`horizontally in a grid pattern, in an N number of vertically arranged pixel lines, as also taught by Sato.
`Combining the grid pattern expressly taught by Sato, e.g., “pixel blocks” of “8x8 pixels,” would entail a
`combination of prior art elements according to known methods and would have yielded predictable results with
`a reasonable expectation of success.
`
`Horii discloses an image sensing device with a light receiving sensor having an array of pixels arranged
`vertically and horizontally in a grid pattern, in an N number of vertically arranged pixel lines.
`
`
`
`
`13
`
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`Sato at 3:42-49.
`
`
`of pixel blocks F2, each of which is composed of 8×8 pixels. A pixel value ak (1≦k≦64) in
`
`An image of one frame F1 has 1280×960 pixels, for example, and is divided into a plurality
`
`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 15 of 134 PageID #: 5427
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`The present invention relates to an image taking apparatus, such as a video camera, that is
`equipped with an image taking device, such as a charge-coupled device (hereinafter referred
`to as "CCD").
`
`
`Horii at 1:6-9.
`
`
`The image taking sensor 10 is a solid-state image sensing device, such as CCD, and has a
`number of effective pixels of 1536×988, which is large enough to provide high resolution.
`This image taking sensor is a single-plate color sensor in which a complementary color
`mosaic filter (Cy, Mg, Ye, Gr) is attached to a chip.
`
`
`Horii at 6:5-10.
`
`See also id. at 6:5-28, 10:20-26, 12:6-14, 17:33-42, Figs. 1, 2, and 6.
`
` A
`
` PHOSITA would have found it obvious to modify QV8000SX’s multimode camera to operate using an
`image sensing device with a light receiving sensor having an array of pixels arranged vertically and
`horizontally in a grid pattern, in an N number of vertically arranged pixel lines, as also taught by Horii.
`Combining the grid pattern expressly taught by Horii in, for example, Fig. 2, would entail a combination of
`prior art elements according to known methods and would have yielded predictable results with a reasonable
`expectation of success.
`
`On information and belief, QV8000SX discloses a display screen having M effective scanning lines under
`Plaintiff’s apparent construction, wherein N is equal to or greater than three times M.
`
`
`[1(a)(ii)] wherein
`N is equal to or
`greater than three
`times a number of
`effective scanning
`lines M of a
`display screen;
`
`
`
`14
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`

`

`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 16 of 134 PageID #: 5428
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`QV8000SX Manual at 16.
`
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`15
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 17 of 134 PageID #: 5429
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`
`Id. at 118.
`
`
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`16
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 18 of 134 PageID #: 5430
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`
`Id. at 119.
`
`Further, Sato discloses a display screen having M effective scanning lines, wherein N is equal to or greater than
`three times M. For example, Sato teaches that an original image, having a resolution of 1280X960, may be
`
`17
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 19 of 134 PageID #: 5431
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`“thinned” for display on an LCD screen by only reading, for example, every eighth pixel. Sato expressly states
`that this is done in both the horizontal and vertical directions. Thus, Sato expressly teaches that N may be up to
`8 times M, which is greater than 3M.
`
`
`When the image signal, stored in the frame memory 14, is read therefrom and then stored in
`the video memory 18 (see FIG. 1), some pixel signals are thinned or disregarded from the
`image signal, in accordance with the inherent resolution of the LCD 24, except when the
`inherent resolution has a value greater than a predetermined value. In the context of this
`specification, “thinning” is a process of reading only every [thinning number +1]th pixel,
`i.e., the thinning number is the number of skipped or disregarded pixels (per pixel read).
`The number of thinned pixels becomes greater as the inherent resolution becomes lower.
`Namely, in the case of the LCD 24 being of type D (160×120 pixels), pixel signals are only
`stored in the video memory 18 on every eighth pixel (i.e. an eight pixel separation in both
`the horizontal and vertical directions of the image), so that an image having a satisfactory
`number of pixels, which conforms to the inherent resolution of the LCD 24, is generated,
`and subsequently indicated by the LCD 24, while the expanded image data, stored in the
`frame memory 14, maintains the resolution of the original image signal, i.e., in this case,
`1280×960 pixels. The reason is as follows: Since the inherent resolution of the LCD 24 is
`160 ×120 pixels, only ⅛ of the pixels in both the horizontal direction and the vertical
`direction of the original 1280×960 pixel image (FIG. 2, F1) can be indicated by the LCD 24.
`
`
`Sato at 7:8-32.
`
`
`
`Sato at 5:47-56.
`
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`Initially, the encoded image data of Scan (1), which are obtained by encoding the quantized
`DCT coefficients of the degrees 1 through 6, are read from the memory card 16. Then, the
`image data corresponding to Scan (1) are expanded, and stored in the frame memory 14.
`The expanded image data, for each of the blocks, are successively read from the frame
`memory 14, and are processed by the image processing circuit 13 to reproduce an image
`signal, thus enabling an image, which has a lower resolution as shown in FIG. 8, to be
`indicated on the LCD 24
`
`
`
`18
`
`

`

`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 20 of 134 PageID #: 5432
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`See also id. at 1:29-52, 4:41-46.
`
` A
`
` PHOSITA would have found it obvious to modify QV8000SX’s multimode camera to operate using the
`resolution-altering details taught by Sato for the advantage of reducing unnecessary processor load, thereby
`improving similar devices in the same way. Such a combination of prior art elements according to known
`methods would have yielded predictable results with a reasonable expectation of success.
`
`Alternatively, Horii discloses the limitations of claim 1(a)(ii). Horii discloses downscaling from a 1536x988
`resolution to a 768x494 resolution and then generating a video signal for the NTSC system.
`
`
`The image taking sensor 10 is a solid-state image sensing device, such as CCD, and has a
`number of effective pixels of 1536x988, which is large enough to provide high resolution.
`This image taking sensor is a single-plate color sensor in which a complementary color
`mosaic filter (Cy, Mg, Ye, Gr) is attached to a chip. FIG. 2 shows an example of the layout
`of the complementary color mosaic filter (Cy, Mg, Ye, Gr) attached to the chip. In the image
`taking sensor 10, the switch 9 effects switching between synchronous signals having different
`frequencies that are respectively generated by the first and second synchronous signal
`generators 7 and 8, thereby enabling the image taking sensor 10 to operate in two image
`taking modes.
`
`The second image taking mode will be explained first. The second synchronous signal
`generator 8 generates a synchronous signal for video signals (NTSC, PAL and the like).
`It effects thinning-out by reducing the apparent number of pixels through addition of pixels
`of the same filter arranged close to each other, or by skipping over part of the pixels when
`reading them from the image taking sensor 10. Alternatively, it reads only a particular
`storage area. In this way, it has the same access to data in the same way as in the case of
`video CCD, and reads 768x494 pixels in accordance with a video signal.
`
`
`
` A
`
`
`Horii at 6:5-28.
`
`
`
` PHOSITA would reasonably understand that because (1) the original pixel size was 1536x988; and (2) the
`thinned 768x494 pixels are further interlaced in accordance with the NTSC system and the “frequency of the
`video signal,” then the pixel output is reduced by another ½ factor. Therefore, the resulting vertical pixel
`
`19
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`

`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 21 of 134 PageID #: 5433
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`density is approximately 240 vertically arranged pixel lines or N=4M. See Horii at 1:12-23, 17:33-42; ’493
`Patent at 1:30-50 (describing the known NTSC system, which “performs interlaced scanning on two fields,
`each of which has an effective scanning line number of about 240 lines”), 4:64-5:6. This understanding of
`Horii’s teaching is consistent with the ’493 Patent’s disclosure that an image sensing device with 480 pixel
`rows has a standard effective number of vertically arranged pixels of 240 scanning lines in accordance with the
`NTSC system. ’493 Patent at 1:30-50, 4:64-5:6. Therefore, Horii’s teaching of reducing the 768x494 pixel
`density to be in accordance with the NTSC system further reduces the pixels by half to reach the effective 240
`scanning lines. See Horii at 17:33-47 (discussing reducing the pixels to 768x494 to be in the “same condition as
`in the case of a CCD sensor that is widely used in ordinary television sets is obtained” and with the further
`understanding that the pixels are subsequently interlaced for display on the television via the NTSC system). As
`such, Horii teaches N≥3M, where N=988 vertically arranged pixel lines and M=240 vertically arranged pixel
`lines to conform to transmission signals via the NTSC system.
`
`To the extent Plaintiff contends the claimed “effective scanning lines” equates to the resolution of the display
`screen, Horii discloses a display screen having M “effective scanning lines,” i.e., a resolution M of vertically
`arranged pixel lines under this interpretation, wherein N (=988) is equal to or greater than two times M.
`
`
`As in the first embodiment, the synchronous signal generated by the first or second
`synchronous signal generator 7 or 8 is switched by the switch 9 to drive the image taking
`sensor 10. The image signal taken by the image taking sensor 10 is subjected to sample-and-
`hold and AGC (automatic gain control) for removing switching noise and extracting the
`signal component at the SH,AGC circuit 13, and converted to digital data by the 10-bit A/D
`converter 14 to be stored in a third memory 38. Here, the third memory 38 has a capacity
`that is large enough to store both high-resolution image data (1536×988 pixels) read by the
`image taking sensor 10 in accordance with the first synchronous signal generator 7 and low-
`resolution image data (768×494 pixels) read by the image taking sensor 10 in accordance
`with the second synchronous signal generator 8.
`
`
`Horii at 7:30-44.
`
`
`
`
`Next, when previewing the image taken by the sensor 10, the image data stored in the first
`memory 215 is read under the control of the first memory controller 16 in accordance with
`the synchronous signal generated by the ordinary synchronous signal generator for
`
`20
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`

`

`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 22 of 134 PageID #: 5434
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`television 8, and input to the second color processing section 31. Here, the image of
`1536×988 pixels is compressed to 1/2 and read as an image of 768×494 pixels. By thus
`reducing the number of pixels to 768×494, the same condition as in the case of a CCD
`sensor that is widely used in ordinary television sets is obtained.
`
`
`Horii at 17:33-42.
`
` A
`
` PHOSITA would have found it obvious to try any desirable factor of proportionality between the number of
`vertically arranged pixel lines N and the number of effective scanning lines M of the display screen. The choice
`of “three times” is a design choice that would have been trivial for a PHOSITA to modify, given the disclosure
`of Horii regarding the relationship between the image resolution and the displayed resolution. For example,
`Horii emphasizes reducing the pixel density in the normal mode to generate a video signal in accordance with
`the NTSC protocol or at a pixel density “that is widely used in ordinary television sets.” See Horii at 6:18-28,
`17:38-42, 20:21-26. Horii also teaches outputting the image taken in the normal mode “on a monitor without
`any portion thereof being lost.” Horii at 9:57-59.
`
` A
`
` PHOSITA would have found it obvious to modify QV8000SX’s multimode camera to operate using the
`resolution-altering details taught by Horii for the advantage of reducing unnecessary processor load, thereby
`improving similar devices in the same way. Additionally, QV8000SX expressly teaches that pictures recorded
`can be output to an attached TV screen in the NTSC format, further indicating to a PHOSITA the desirability of
`incorporating Horii’s pixel resolution details. QV8000SX Manual at 78, 87, 99, 119. Such a combination of
`prior art elements according to known methods would have yielded predictable results with a reasonable
`expectation of success.
`On information and belief, QV8000SX discloses a signal processing unit that generates image signals by using
`the output signals of the image sensing device.
`
`
`
`
`[1(b)] a signal
`processing unit,
`that generates
`image signals by
`using the output
`signals of the
`image sensing
`device; and
`
`
`
`21
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`

`

`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 23 of 134 PageID #: 5435
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`QV8000SX Manual at 53.
`
`
`
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`22
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 24 of 134 PageID #: 5436
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 118.
`
`
`
`
`23
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 25 of 134 PageID #: 5437
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`
`Id. at 119.
`
`
`
`
`24
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 26 of 134 PageID #: 5438
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 75.
`
`
`
`25
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`

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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 27 of 134 PageID #: 5439
`Defendant’s Invalidity Contentions
`Exhibit B13
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`Id. at 76.
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`26
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 28 of 134 PageID #: 5440
`Defendant’s Invalidity Contentions
`Exhibit B13
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`Id. at 77.
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`27
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 29 of 134 PageID #: 5441
`Defendant’s Invalidity Contentions
`Exhibit B13
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`Id. at 78.
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`28
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 30 of 134 PageID #: 5442
`Defendant’s Invalidity Contentions
`Exhibit B13
`
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`Sato discloses a signal processing unit that generates image signals by using the output signals of the image
`sensing device.
`
`
`According to the present invention, there is provided an image signal reproduction device
`comprising an image signal expansion processor, a display and a resolution setting
`processor.
`
`The image signal expansion processor expands a compressed image signal to reproduce an
`image with a predetermined resolution. The display, which indicates the image, includes an
`inherent resolution which is a maximum permissible resolution. The resolution setting
`processor sets the predetermined resolution, which is incremented from a lower resolution
`to a higher resolution. The predetermined resolution set by the resolution setting processor
`is lower than or equal to the inherent resolution.
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`Sato at 1:40-61.
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`Further, according to the present invention, there is provided an image signal reproduction
`device comprising an image signal expansion processor for expanding a compressed image
`signal to reproduce an image with a predetermined resolution, a resolution setting processor
`incrementally setting the predetermined resolution to be lower than or equal to a maximum
`permissible resolution, and a display indicating the image, the display including an inherent
`resolution equal to the maximum permissible resolution.
`
`In the electronic still camera 10, an optical image obtained by a photographing optical
`system (not shown) is formed on a light receiving surface of a CCD (charge coupled
`device) 11, so that the optical image is photoelectrically-converted to an electric charge
`signal by the CCD 11. The electric charge signal, which is an analog image signal, having
`been outputted from the CCD 11, is converted by an A/D converter 12 to a digital image
`signal.
`
`An image signal processing circuit 13 is provided for subjecting the digital image signal
`to various kinds of image processing. A frame memory 14, provided for storing the digital
`image signal, is connected to a frame memory controller 15, which is connected to the image
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 31 of 134 PageID #: 5443
`Defendant’s Invalidity Contentions
`Exhibit B13
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`signal processing circuit 13. The digital image signal outputted from the A/D converter 12 is
`temporarily stored in the frame memory 14, through the frame memory controller 15, and is
`subsequently read from the frame memory 14, to be compressed by the image signal
`processing circuit 13.
`
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`Sato at 3:42-59.
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`The video memory 18 is connected to a video memory controller 19, which is connected to
`the image signal processing circuit 13. Thus, the image signal is stored in and read from the
`video memory 18, through the video memory controller 19. The image signal read from the
`video memory 18 is inputted into an LCD controller 21, in which a synchronization signal is
`added to and an image signal processing, such as a gamma correction, is performed on the
`image signal, so that a video image signal is generated. The video image signal is then
`inputted into a display device 22 via an input terminal 23 provided in the display device 22.
`
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`Sato at 4:10-19.
`
`See also id. at 4:26-37.
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`Further, Horii discloses a signal processing unit that generates image signals by using the output signals of the
`image sensing device.
`
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`In still another aspect of the present invention, there is provided an image taking apparatus
`comprising: an optical lens; an image taking sensor having at least first and second image
`taking modes and adapted to operate in two or more image taking modes; first image
`processing means for processing image signals taken by the image taking sensor; an A/D
`converter for A/D-converting the image signals taken by the image taking sensor; storage
`means for storing the image signals converted into digital signals by the A/D converter;
`second signal processing means for processing the digital image signals stored in the
`storage means; mode switching means for switching the mode for processing the image
`signals taken by the image taking sensor between the first and second image taking modes;
`and control means, which, when the first image taking mode is selected by the mode
`switching means, causes signal processing to be performed by the first signal processing
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 32 of 134 PageID #: 5444
`Defendant’s Invalidity Contentions
`Exhibit B13
`
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`means, and which, when the second image taking mode is selected by the mode switching
`means, causes signal processing to be performed by the second signal processing means.
`
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`Horii at 3:7-31.
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`Then, the image signal taken is subjected to signal processing by the signal processing means
`117, and supplied to the D/A converter 120 without being stored in the first memory 118.
`Subsequently, in step P2, the image signal converted to an analog signal is encoded by the
`encoder 121, and output as a video signal, thereby displaying the moving picture taken.
`
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`Horii at 12:44-50.
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`See also id. at 2:24-59, 11:14-23, 19:26-36.
`
`On information and belief, QV8000SX discloses a a display unit with the display screen to display an image
`corresponding to the image signals.
`
`
`[1(c)] a display
`unit with the
`display screen, to
`display an image
`corresponding to
`the image signals;
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 33 of 134 PageID #: 5445
`Defendant’s Invalidity Contentions
`Exhibit B13
`
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`QV8000SX Manual at 25.
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`32
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 34 of 134 PageID #: 5446
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 30.
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`33
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 35 of 134 PageID #: 5447
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 46.
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`
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`34
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 36 of 134 PageID #: 5448
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
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`Id. at 47.
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`35
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 37 of 134 PageID #: 5449
`Defendant’s Invalidity Contentions
`Exhibit B13
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`
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`Id. at 118.
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`36
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 38 of 134 PageID #: 5450
`Defendant’s Invalidity Contentions
`Exhibit B13
`
`
`Id. at 119.
`
`Further, Sato discloses a display unit with the display screen to display an image corresponding to the image
`signals.
`
`
`37
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`Case 5:19-cv-00036-RWS Document 130-4 Filed 11/14/19 Page 39 of 134 PageID #: 5451
`Defendant’s Invalidity Contentions
`Exhibit B13
`
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`The display device 22 includes a liquid crystal display (LCD) 24 and a resolution
`recognition unit 25, which is provided for recognizing an inherent resolution of the LCD 24.
`The inherent resolution is a maximum permissible resolution of the LCD 24.
`
`Sato at 4:20-24.
`
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`The present invention relates to an image reproduction device, which, based on an image
`signal outputted by a CCD, for example, reproduces and indicates an image on a display.
`
`
`Sato at 1:5-8.
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`When the image signal, stored in the frame memory 14, is read therefrom and then stored in
`the video memory 18 (see FIG. 1), some pixel signals are thinned or disregarded from the
`image signal, in accordance with