`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`SHERMAN DIVISION
`
`R2 SOLUTIONS LLC,
`
`
`Plaintiff,
`
`
`DATABRICKS, INC.,
`
`
`
`
`v.
`
`
`
`
`
`Civil Action No. 4:23-cv-01147-ALM
`
`
`JURY TRIAL DEMANDED
`
`Defendant.
`
`DEFENDANT’S RESPONSIVE CLAIM CONSTRUCTION BRIEF
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 2 of 39 PageID #: 2601
`
`TABLE OF CONTENTS
`
`Page
`
`I.
`
`II.
`
`INTRODUCTION ....................................................................................................1
`
`THE ASSERTED PATENT ....................................................................................1
`
`III.
`
`THE DISPUTED CLAIM TERMS AND PHRASES .............................................3
`
`A.
`
`“processor and memory that are operable to perform the following
`operations: . . .” ............................................................................................3
`
`1.
`
`2.
`
`The term “processor and memory that are operable to perform
`the following operations: . . .” is purely functional and subject
`to § 112, ¶ 6. .....................................................................................5
`
`The specification does not disclose structure or an algorithm
`clearly linked to the “processor and memory” term, rendering
`the term indefinite. .........................................................................12
`
`a.
`
`b.
`
`c.
`
`“partitioning the data of each one of the data groups into
`a plurality of data partitions that each have a plurality of
`key-value pairs” .................................................................13
`
`“providing each data partition to a selected one of a
`plurality of mapping functions that are each user-
`configurable to independently output a plurality of lists
`of values for each of a set of keys found in such map
`function’s corresponding data partition to form
`corresponding intermediate data for that data group and
`identifiable to that data group” ..........................................15
`
`“reduce the intermediate data for the data groups to at
`least one output data group, including processing the
`intermediate data for each data group in a manner that is
`defined to correspond to that data group so as to result in
`a merging of the corresponding different intermediate
`data based on the key in common” ....................................17
`
`B.
`
`C.
`
`D.
`
`“mapping” / “map” / “mapped” .................................................................17
`
`“reducing” / “reduce” .................................................................................21
`
`“providing each data partition to a selected one of a plurality of
`mapping functions” ....................................................................................22
`
`i
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 3 of 39 PageID #: 2602
`
`E.
`
`F.
`
`G.
`
`“[processing] / [process] the intermediate data for each data group in a
`manner that is defined to correspond to that data group” ..........................26
`
`“schema” ....................................................................................................28
`
`“the different schema and corresponding different intermediate data
`have a key in common”..............................................................................30
`
`IV.
`
`CONCLUSION ......................................................................................................30
`
`
`
`
`
`
`
`
`
`
`
`ii
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 4 of 39 PageID #: 2603
`
`CASES
`
`TABLE OF AUTHORITIES
`
`Page(s)
`
`3M Innovative Properties Co. v. Avery Dennison Corp.,
`350 F.3d 1365 (Fed. Cir. 2003)................................................................................................18
`
`Advanced Ground Info. Sys., Inc. v. Life360, Inc.,
`830 F.3d 1341 (Fed. Cir. 2016)..................................................................................................7
`
`Am. Piledriving Equip., Inc. v. Geoquip, Inc.,
`637 F.3d 1324 (Fed. Cir. 2011)................................................................................................26
`
`Apple Inc. v. Motorola, Inc.,
`757 F.3d 1286 (Fed. Cir. 2014)................................................................................................10
`
`Aristocrat Techs., Austl. PTY Ltd. v. Int’l Game Tech.,
`521 F.3d 1328 (Fed. Cir. 2008)............................................................................................9, 10
`
`Aylus Networks, Inc. v. Apple Inc.,
`856 F.3d 1353 (Fed. Cir. 2017)....................................................................................23, 26, 27
`
`Bd. of Regents of the Univ. of Texas Sys. v. BENQ Am. Corp.,
`533 F.3d 1362 (Fed. Cir. 2008)................................................................................................22
`
`Collaborative Agreements, LLC v. Adobe Sys.,
`No. 15-cv-03853-EMC, 2015 U.S. Dist. LEXIS 161809
`(N.D. Cal. Dec. 2, 2015) ..........................................................................................................10
`
`Digit. Retail Apps, Inc. v. H-E-B,
`No. 6-19-cv-00167-ADA, 2020 WL 376664 (W.D. Tex. Jan. 23, 2020) ..............................5, 7
`
`Finjan, Inc. v. Proofpoint, Inc.,
`No. 13-cv-05808-HSG, 2015 U.S. Dist. LEXIS 162504
`(N.D. Cal. Dec. 3, 2015). ...................................................................................................10, 11
`
`Function Media, LLC v. Google, Inc.,
`708 F.3d 1310 (Fed. Cir. 2013)............................................................................................5, 12
`
`Garrity Power Servs. LLC v. Samsung Elecs. Co.,
`No. 2:20-CV-00269-JRG, 2021 WL 3403747 (E.D. Tex. Aug. 4, 2021)................................11
`
`In re Katz Interactive Call Processing Pat. Litig.,
`639 F.3d 1303 (Fed. Cir. 2011)............................................................................................8, 12
`
`Intelligent Agency, LLC v. 7-Eleven, Inc.,
`No. 4:20-CV-0184-ALM, 2022 U.S. Dist. LEXIS 43610
`(E.D. Tex. Mar. 11, 2022) ........................................................................................................11
`
`iii
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 5 of 39 PageID #: 2604
`
`Kyocera Senco Indus. Tools Inc. v. Int’l Trade Comm’n,
`22 F.4th 1369 (Fed. Cir. 2022) ................................................................................................29
`
`Linear Tech. Corp. v. Impala Linear Corp.,
`379 F.3d 1311 (Fed. Cir. 2004)............................................................................................9, 10
`
`MTD Prods. Inc. v. Iancu,
`933 F.3d 1336 (Fed. Cir. 2019)..................................................................................................5
`
`Noah Sys., Inc. v. Intuit Inc.,
`675 F.3d 1302 (Fed. Cir. 2012)................................................................................................12
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005)................................................................................................19
`
`Promptu Sys. Corp. v. Comcast Corp.,
`92 F.4th 1372 (Fed. Cir. 2024) ..........................................................................................20, 22
`
`Rain Computing, Inc. v. Samsung Elecs. Am., Inc.,
`989 F.3d 1002 (Fed. Cir. 2021)..................................................................................................5
`
`Schindler Elevator Corp. v. Otis Elevator Co.,
`593 F.3d 1275 (Fed. Cir. 2010)................................................................................................23
`
`Southwall Techs., Inc. v. Cardinal IG Co.,
`54 F.3d 1570 (Fed. Cir. 1995)..................................................................................................23
`
`St. Isidore Research, LLC v. Comerica Inc.,
`No. 2:15-CV-1390-JRG-RSP, 2016 WL 4988246 (E.D. Tex. Sept. 19, 2016) .....................6, 9
`
`Sulzer Textil A.G. v. Picanol N.V.,
`358 F.3d 1356 (Fed. Cir. 2004)................................................................................................27
`
`VARTA Microbattery GmbH v. Audio P’ship LLC,
`No. 2:21-CV-00400-JRG-RSP, 2023 WL 5103113 (E.D. Tex. Aug. 9, 2023) .......................25
`
`VLSI Tech. v. Intel Corp.,
`53 F.4th 646 (Fed. Cir. 2022) ............................................................................................20, 21
`
`Williamson v. Citrix Online, LLC,
`792 F.3d 1339 (Fed. Cir. 2015) (en banc) ........................................................................ passim
`
`WSOU Investments LLC v. Google LLC,
`Nos. 2022-1063, 2022-1065, 2023 WL 6889033 (Fed. Cir. Oct. 19, 2023) ..........................7, 9
`
`Wyeth v. Teva Pharms. USA, Inc.,
`No. 03-CV-1293 (WJM), 2005 WL 2175440 (D.N.J. Sept. 6, 2005)......................................20
`
`iv
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 6 of 39 PageID #: 2605
`
`STATUTES
`
`35 U.S.C. § 112 ¶ 6 ................................................................................................................ passim
`
`35 U.S.C. § 311(b) .........................................................................................................................11
`
`
`
`
`
`v
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 7 of 39 PageID #: 2606
`
`Exhibit No.
`
`TABLE OF EXHIBITS1
`
`
`Description
`
`Declaration of Dr. Jon B. Weissman (“Weissman Decl.”)
`
`Jeffery Dean & Sanjay Ghemawat, “MapReduce: Simplified Data Processing
`on Large Clusters,” OSDI ’04: Sixth Symposium on Operating system
`Design and Implementation, San Francisco, CA, USA (Dec. 2004) (“Dean”)
`
`Excerpts of U.S. Patent No. 8,190,610 File History
`
`Hung-Chih Yang, Ali Dasdan, Ruey-Lung Hsiao & D. Stott Parker,
`“MapReduceMerge: Simplified Relational Data Processing on Large
`Clusters,” SIGMOD ’07 Annual Conference, June 12-14-2007, Beijing,
`China (2007) (“Yang”)
`
`Patent Owner Preliminary Response filed in Databricks, Inc. v. R2 Solutions
`LLC, PTAB-IPR2024-00659 (“POPR”)
`
`R2 Solutions LLC v. Walmart Inc., No. 4:21-cv-00091, Dkt. 54 (E.D. Tex. Jan. 4,
`2022)
`
`Excerpt of “schema” from Microsoft Computer Dictionary (5th ed. 2002)
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`
`
`
`
`1 Exhibits are attached to the Declaration of Vigen Salmastlian in Support of Defendant’s
`Responsive Claim Construction Brief.
`
`vi
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 8 of 39 PageID #: 2607
`
`I.
`
`INTRODUCTION
`
`Defendant Databricks, Inc. (“Databricks”) submits its Responsive Claim Construction
`
`Brief addressing the disputed terms of U.S. Patent No. 8,190,610 (the “’610 patent”).
`
`II.
`
`THE ASSERTED PATENT
`
`The ’610 patent generally relates to processing large amounts of data in parallel over a
`
`network of distributed computers. (Ex. 1, Weissman Decl. ¶ 36.) The patent purports to
`
`“enhance[] the utility of the MapReduce programming technology.” (’610 patent at Abstract; see
`
`also id. at 1:31–33, 1:66–2:2.) MapReduce was first described in a 2004 paper authored by Jeffrey
`
`Dean and Sanjay Ghemawat over two years before the ’610 patent filing date. (Ex. 1, Dean at 1.)
`
`Dean is titled, “MapReduce: Simplified Data Processing on Large Clusters” and is discussed at
`
`length in the ’610 patent. (’610 patent, 1:6–27; 1:66–2:67; Figs. 1, 2; Weissman Decl. ¶ 42.)
`
`Both Dean and the ’610 patent explain that MapReduce has always involved “two
`
`functions: Map and Reduce.” (’610 patent at 1:1–20; Dean § 2.) For example, Dean explains that
`
`“[u]sers specify a map function that processes a key/value pair to generate a set of intermediate
`
`key/value pairs, and a reduce function that merges all intermediate values associated with the same
`
`intermediate key.” (Dean, Abstract; see also id. § 2.) The applicants relied on these descriptions
`
`of map and reduce in Dean to define “map” and “reduce” in the patent:
`
`Basically, a “map” function maps key-value pairs to new (intermediate) key-value
`pairs. A “reduce” function represents all mapped (intermediate) key-value pairs
`sharing the same key to a single key-value pair or a list of values. The “map” and
`“reduce” functions are typically user-provided. The map function iterates over a list
`of independent elements, performing an operation on each element as specified by
`the map function. The map function generates intermediate results. The reduce
`operation takes these intermediate results via a single iterator and combines elements
`as specified by the reduce function.
`
`(’610 patent, 1:18–28.)
`
`1
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 9 of 39 PageID #: 2608
`
`Figure 1 shows “the conventional MapReduce architecture” described by Dean. (Id. at
`
`1:48–49; 2:12–17; Fig. 1 (shown below).) Data may be “partitioned into an arbitrary grouping of
`
`seven partitions 102(1) through 102(7).” (Id. at 2:31–33.) The partitioned data is then provided
`
`to map functions 104(1) through 104(7) that generate intermediate values as key-value pairs 106(1)
`
`through 106(7). (Id. at 2:21–24, 2:33–35.) The intermediate key-value pairs are grouped by key
`
`in intermediate partitions 110(k1)
`
`through 110(k5). (Id. at 2:36–39.)
`
`And “[e]ach
`
`reduce
`
`function
`
`112(k1) through 112(k5) processes
`
`intermediate data from one of the
`
`intermediate partitions to generate
`
`the corresponding output partitions
`
`114(k1) to 114(k5),” which “combine[] all intermediate values for a particular key and produce[]
`
`a set of merged output values for the key.” (Id. at 2:35–51.)
`
`The ’610 patent claims to “enhance[] the utility of the MapReduce programming
`
`methodology” by applying MapReduce to data groups with different
`
`schema. (Id. at 1:24–27, 3:48–57.) It explains that the schema of a data
`
`set “includes a set of attributes” and “their properties.” (Id. at 3:18–56;
`
`Weissman Decl. ¶ 48.) It also illustrates an example of this in Figure 3
`
`(shown, in part, on right). Table 302 identifies company employees by
`
`department ID in the first column and last name in the second column.
`
`While Table 304 also identifies department ID in the first column, it
`
`identifies department name in the second column. (’610 patent, 3:23–
`
`2
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 10 of 39 PageID #:
`2609
`
`28.) Because these tables include the different attributes of “employee last name” and “department
`
`name,” Table 302 has a different schema than Table 304. (Id. at 3:19–25.)
`
`Figure 5 illustrates the purportedly “improved MapReduce architecture.” (Id. at 1:58–62;
`
`Fig. 5 (shown below).) According to the patent, this Figure shows the use of “map” and “reduce”
`
`to process Tables 302 and 304.
`
`(Id. at 3:18–46, 8:15–24). The
`
`patent treats each table as a
`
`separate “data group” and, in step
`
`502, partitions the data groups.
`
`(Id. at 8:15–24.) At step 504, each
`
`partition
`
`is provided
`
`to
`
`a
`
`respective map function that takes
`
`in key-value pairs and produces intermediate key-value pairs organized by even and odd key, as
`
`shown in step 506. (Id. at 8:25–31.) After sorting the intermediate data in step 508, the
`
`intermediate data is provided to respective reduce functions that combine all intermediate values
`
`sharing the same key. (Id. at 8:31–37.) The output is either a single key-value pair or a list of
`
`values associated with the key. (Id.) While Figure 5 shows the result of “partitioning,” “mapping,”
`
`and “reducing,” the patent does not provide any steps or algorithm to achieve these results.
`
`III. THE DISPUTED CLAIM TERMS AND PHRASES
`
`A.
`
`“processor and memory that are operable to perform the following
`operations: . . .”
`
`Term
`“processor and memory that
`are operable to perform the
`following operations:
`
`partitioning the data of each
`
`Databricks’ Construction
`Governed by pre-AIA 35 U.S.C.
`§ 112 ¶ 6.
`
`Function: “partitioning the data
`of each one of the data groups
`
`R2’s Construction
`Plain and ordinary
`meaning. No
`construction needed.
`
`Not subject to 35 U.S.C.
`
`3
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 11 of 39 PageID #:
`2610
`
`R2’s Construction
`§ 112 ¶ 6.
`
`Not indefinite.
`
`
`Term
`one of the data groups into a
`plurality of data partitions
`that each have a plurality of
`key-value pairs and providing
`each data partition to a selected
`one of a plurality of mapping
`functions that are each user-
`configurable to independently
`output a plurality of lists of
`values for each of a set of keys
`found in such map function's
`corresponding data partition to
`form corresponding
`intermediate data for that data
`group and identifiable to that
`data group, wherein the data of
`a first data group has a different
`schema than the data of a
`second data group and the data
`of the first data group is mapped
`differently than the data of the
`second data group so that
`different lists of values are
`output for the corresponding
`different intermediate data,
`wherein the different schema
`and corresponding different
`intermediate data have a key in
`common; and reduce the
`intermediate data for the data
`groups to at least one output
`data group, including processing
`the intermediate data for each
`data group in a manner that is
`defined to correspond to that
`data group so as to result in a
`merging of the corresponding
`different intermediate data
`based on the key in common.”
`
`Claim 17
`
`This term is governed by § 112, ¶ 6 as “processor and memory that are operable to perform
`
`Databricks’ Construction
`into a plurality of data partitions
`that each have a plurality of key-
`value pairs and providing each
`data partition to a selected one of
`a plurality of mapping functions
`that are each user-configurable to
`independently output a plurality
`of lists of values for each of a set
`of keys found in such map
`function’s corresponding data
`partition to form corresponding
`intermediate data for that data
`group and identifiable to that
`data group, wherein the data of a
`first data group has a different
`schema than the data of a second
`data group and the data of the
`first data group is mapped
`differently than the data of the
`second data group so that
`different lists of values are
`output for the corresponding
`different intermediate data,
`wherein the different schema and
`corresponding different
`intermediate data have a key in
`common; and reduce the
`intermediate data for the data
`groups to at least one output data
`group, including processing the
`intermediate data for each data
`group in a manner that is defined
`to correspond to that data group
`so as to result in a merging of the
`corresponding different
`intermediate data based on the
`key in common.”
`
`Structure: Indefinite.
`
`the following operations” fails to connote sufficient structure for performing the claimed function.
`
`The term is indefinite because the patent discloses no steps or algorithm clearly linked to the term.
`
`4
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 12 of 39 PageID #:
`2611
`
`Section 112, ¶ 6 limits “functional claiming,” the practice of claiming a result without
`
`disclosing how to accomplish it. Williamson v. Citrix Online, LLC, 792 F.3d 1339, 1349-51 (Fed.
`
`Cir. 2015) (en banc); Function Media, LLC v. Google, Inc., 708 F.3d 1310, 1319 (Fed. Cir. 2013).
`
`In Williamson, the Federal Circuit reinforced the longstanding prohibition against functional
`
`claiming: if claims do not identify specific structure or acts sufficient to achieve a claimed result,
`
`then the specification must fill the void to limit them to the inventor’s specific solution. 792 F.3d
`
`at 1350-51. This is true whether the claims recite the phrase “means for” or not. Id. at 1349-50.
`
`When evaluating whether § 112, ¶ 6 applies, courts must determine whether the patent
`
`“recit[es] a function to be performed rather than [] reciting structure for performing that function.”
`
`Id. at 1347–48. Even if a claim term connotes some generic structure (e.g., a general-purpose
`
`computer), it cannot escape § 112, ¶ 6 if that structure cannot perform entirely the recited function.
`
`Id. at 1348; Digit. Retail Apps, Inc. v. H-E-B, No. 6-19-cv-00167-ADA, 2020 WL 376664, at *4
`
`(W.D. Tex. Jan. 23, 2020). Where the claims recite functions performed by black boxes, they are
`
`subject to § 112, ¶ 6. Williamson, 792 F.3d at 1350–51.
`
`1.
`
`The term “processor and memory that are operable to perform the
`following operations: . . .” is purely functional and subject to § 112, ¶ 6.
`
`The claimed “processor and memory” term is purely functional and subject to § 112, ¶ 6.
`
`(’610 patent, claim 17; Weissman Decl. ¶¶ 56–-61.) The words “that are operable to perform the
`
`following operations” are nonce words that are simply a substitute for the term “means for.”
`
`Williamson, 792 F.3d at 1350–51 (“[g]eneric terms such as ‘mechanism,’ ‘element,’ ‘device,’ and
`
`other nonce words . . . reflect nothing more than verbal constructs” and are “tantamount to using
`
`the word ‘means’”). Courts have also found that similar words, such as “configured to,” provide
`
`no structure. MTD Prods. Inc. v. Iancu, 933 F.3d 1336, 1343 (Fed. Cir. 2019) (“[T]he claim
`
`language reciting what the mechanical control assembly is ‘configured to’ do is functional.”); Rain
`
`5
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 13 of 39 PageID #:
`2612
`
`Computing, Inc. v. Samsung Elecs. Am., Inc., 989 F.3d 1002, 1006 (Fed. Cir. 2021) (“[T]he purely
`
`functional claim language reciting what the ‘user identification module’ is configured to do
`
`provides no structure.”). For the same reasons, “that operable to perform the following operations”
`
`also does not provide structure. (Weissman Decl. ¶ 61.)
`
`The term “processor and memory” likewise fails to connote structure for performing the
`
`claimed functions. In St. Isidore Research, LLC v. Comerica Inc., this Court found a similar
`
`“processor” term to be subject to § 112, ¶ 6. No. 2:15-CV-1390-JRG-RSP, 2016 WL 4988246, at
`
`*14 (E.D. Tex. Sept. 19, 2016). The Court considered two terms: “a processor configured to verify
`
`the authenticity of the account access request based on the response” and “a processor configured
`
`to identify a second device associated with the account.” Id. at *14. The Court construed both as
`
`governed by § 112, ¶ 6 because “each processor is defined only by the function that it performs”
`
`and neither the claims nor specification described “how the processors interact with each other or
`
`with the other limitations in the claim to achieve their objectives.” Id. Specifically, nothing in the
`
`patent even “describe[d] or depict[ed] those processors connecting to and interacting with [any]
`
`other components.” Id. As in St. Isidore, the “processor and memory” recited here are defined
`
`only by the function they “are operable to perform”—partitioning, mapping, and reducing—and
`
`the claimed function identifies only results, and not any specific structure for achieving the claimed
`
`results. Moreover, nothing in the claims or specification identifies how the “processor and
`
`memory” “interact with each other or with other limitations in the claim to achieve their
`
`objectives.” Id. In fact, the claimed “processor and memory” are not identified as part of the
`
`claimed function at all. While the last element of the claim requires that “mapping and reducing
`
`operations are performed by a distributed system,” nothing in the claim identifies how the
`
`“processor and memory” communicate or interact with one another, much less a “distributed
`
`6
`
`
`
`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 14 of 39 PageID #:
`2613
`
`system,” to achieve the claimed results. (’610 patent, claims 1, 17.) The ’610 patent specification
`
`offers no further clarity. The specification does not describe or even mention a processor or
`
`memory.2 Thus, the “processor and memory” terms are subject to § 112, ¶ 6. Digit. Retail, 2020
`
`WL 376664, at *4–6 (applying § 112, ¶ 6 and finding “first communication module” indefinite
`
`where the “patent provide[d] no specific details concerning the [term]”).
`
`The Federal Circuit’s ruling in WSOU Investments LLC v. Google LLC is equally
`
`applicable. Nos. 2022-1063, 2022-1065, 2023 WL 6889033, at *3 (Fed. Cir. Oct. 19, 2023). In
`
`WSOU, the Federal Circuit held that a similar “processor” term—“said processor configured to
`
`provide a pre-emptive user output when the sub-set of pixels approaches an edge of the set of
`
`available pixels”—invoked § 112, ¶ 6. Id. at *4. “Processor” did “not recite sufficiently definite
`
`structure” because it was described “so broadly as to generically be any structure that manipulates
`
`data.” Id. The same is true here. As in WSOU, “processor and memory” are described so broadly
`
`that they refer generically to any structure that processes and stores data. Indeed, the claim
`
`identifies “processor” as any generic structure that “process[es] data of a data set” and recites
`
`“memory” generically as any structure with storage. (’610 patent, claim 17.) As explained above,
`
`the specification fails to cure the claim’s deficiencies, as it provides no description of the claimed
`
`“processor and memory” at all. Because the claimed “processor and memory” “[i]n the context
`
`of this claim, this specification, and this specific invention . . . [are] so generically and functionally
`
`described,” they “fail to convey a sufficiently definite meaning as a name for a structure,” and
`
`thus, are subject to § 112, ¶ 6. WSOU, 2023 WL 6889033, at *4; see also Advanced Ground Info.
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`Sys., Inc. v. Life360, Inc., 830 F.3d 1341, 1345–49 (Fed. Cir. 2016) (“The term ‘symbol generator’
`
`
`2 “Processor” and “memory” appear nowhere in the patent other than the claims. Both are
`recited in independent claims 17 and 40, and dependent claims 21–26, 28, 30–32, 42, and 44.
`
`7
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`
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`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 15 of 39 PageID #:
`2614
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`invokes the application of § 112, ¶ 6 because it fails to describe a sufficient structure and otherwise
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`recites abstract elements ‘for’ causing actions . . . or elements ‘that can’ perform functions.”).
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`Defendant’s expert, Dr. Jon Weissman, one of ordinary skill in the art at the time of the
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`patent, also confirms that the “processor and memory” term would not connote any specific
`
`structure, much less structure for achieving the specific results in the claimed function. (Weissman
`
`Decl. ¶ 56.) The claimed function is specialized to perform, in part: (1) “partitioning the data of
`
`each one of the data groups into a plurality of data partitions that each have a plurality of key-value
`
`pairs”; (2) “providing each data partition to a selected one of a plurality of mapping functions that
`
`are each user-configurable to independently output a plurality of lists of values for each of a set of
`
`keys found in such map function’s corresponding data partition to form corresponding
`
`intermediate data for that data group and identifiable to that data group”; and (3) “reduce the
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`intermediate data for the data groups to at least one output data group, including processing the
`
`intermediate data for each data group in a manner that is defined to correspond to that data group
`
`so as to result in a merging of the corresponding different intermediate data based on the key in
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`common.” (’610 patent, claim 17; Weissman Decl. ¶ 56.) Nothing in the claim explains how the
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`“processor and memory” would achieve these results, much less interact with one another to do
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`so. (Weissman Decl. ¶ 56.) And as further discussed in Section III.A.2 below, a generic processor
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`and general-purpose memory could not perform these complex recited functions without
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`specialized programming. (Id. at ¶¶ 57–60.) Indeed, a general-purpose computer—which includes
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`the generic processor and memory recited by the claims here—can be structure for only basic
`
`computer functions such as “processing,” “receiving,” and “storing,” and not the specialized
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`functions recited by this claim. (Id. at ¶¶ 56-60); In re Katz Interactive Call Processing Pat. Litig.,
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`639 F.3d 1303, 1316 (Fed. Cir. 2011) ( “processing,” “receiving,” and “storing” are “coextensive
`
`8
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`
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`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 16 of 39 PageID #:
`2615
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`with . . . a general purpose processor”).3 And as explained, the specification does not describe the
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`claimed “processor” and “memory” at all, much less explain what specialized programming is
`
`required for a processor and memory to perform the claimed function. There is no evidence to
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`suggest that “processor and memory” here is anything but a black box for achieving the claimed
`
`function’s results. Williamson, 792 F.3d at 1350. Just like the functional claim limitations in
`
`WSOU and St. Isidore, the “processor and memory” term here is subject to § 112, ¶ 6.
`
`R2 contends that the “processor and memory” term is not subject to § 112, ¶ 6 because
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`“[t]he entire claim sets out exactly what the processor and memory must do.” (Dkt. 53 (“Op. Br.”)
`
`at 6.) But as explained above, the claim is purely functional and recites the results of
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`“partitioning,” “mapping,” and “reducing” without identifying sufficient structure for the entirety
`
`of the claimed function. While R2 and its expert admit the claimed “partitioning,” “mapping,”
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`and “reducing” must all be done in a “specific way” (id.), nothing in the claim provides any such
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`structure, nor does R2 or its expert contend otherwise. In fact, the recited “processor and memory”
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`are defined functionally by only these claimed results, which in no way identify what processing
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`the “processor” performs to achieve the “partitioning,” “mapping,” and “reducing,” much less how
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`the “processor” relates structurally to or communicates with the recited “memory” to perform the
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`claimed function. Section 112, ¶ 6 applies in such circumstances. WSOU, 2023 WL 6889033, at
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`*3–4; St. Isidore, 2016 WL 4988246, at *14.
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`Next, R2 relies on Linear Tech. Corp. v. Impala Linear Corp., 379 F.3d 1311 (Fed. Cir.
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`2004)4 to argue that the claimed “processor and memory” have sufficiently definite structure
`
`
`3 See also Aristocrat Techs., Austl. PTY Ltd. v. Int’l Game Tech., 521 F.3d 1328, 1333 (Fed.
`Cir. 2008) (where the structure is a “computer, or microprocessor, programmed to carry out an
`algorithm, the disclosed structure is not the general purpose computer, but rather the special
`purpose computer programmed to perform the disclosed algorithm”).
`4 R2 also cites a non-precedential decision in Collaborative Agreements, LLC v. Adobe
`
`9
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`
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`Case 4:23-cv-01147-ALM Document 62 Filed 11/12/24 Page 17 of 39 PageID #:
`2616
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`because the claim recites their “objectives and operations.” (Op. Br. at 6–7.) But Linear Tech.
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`does not apply. There, the court did not address “processor” or “memory.” The court addressed
`
`a different term, “first circuit,” which it found had sufficient structure for the generic circuit
`
`function of “monitoring a signal from the output terminal to generate a first feedback signal.”
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`Linear Tech. Corp., 379 F.3d at 1320–21. And the court’s ruling relied on Linear’s expert opining
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`that a POSITA “would have an understanding of, and would be able to draw, structural
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`arrangements of the circuit elements defined by the claims.” Id. at 1320. Here, R2’s expert only
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`identifies examples of generic processors and memory and provides no testimony that a POSITA
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`would have understood how a processor and memory would be arranged, programmed, and
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`communicate with one another to achieve the specialized function of the claim and its claimed
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`results.5 (Op. Br., Ex. 2 (“Davis Decl.”) ¶¶ 39–42.)
`
`R2’s remaining cases are also distinguishable. The court in Apple Inc. v. Motorola, Inc.
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`found that “heuristics” connoted sufficient structure in part because the specification explained in
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`detail how the claimed heuristics performed the claimed functions. 757 F.3d 1286, 1295, 1301
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`(Fed. Cir. 2014), overruled on other grounds, Williamson, 792 F.3d at 1349. By contrast, the
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`specification here does not even mention “processor and memory.” In Finjan, Inc. v. Proofpoint,
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`Inc., the “content processor” connoted sufficient structure because the claim recited how the
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`processor “interacts with the inventio

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