Case 4:20-cv-00991-ALM Document 1-13 Filed 12/31/20 Page 1 of 22 PageID #: 282
`Case 4:20-cv-00991-ALM Document 1-13 Filed 12/31/20 Page 1 of 22 PageID #: 282
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`EXHIBIT M
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`EXHIBIT M
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`Case 4:20-cv-00991-ALM Document 1-13 Filed 12/31/20 Page 2 of 22 PageID #: 283
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`Analysis of Infringement of U.S. Patent No. 7,080,330 by Huawei Device USA Inc., Huawei Device Co., Ltd., and HiSilicon Technologies Co., Ltd.
`(Based on Public Information Only)
`
`Plaintiff Ocean Semiconductor LLC (“Ocean Semiconductor”), provides this preliminary and exemplary infringement analysis with respect to
`
`infringement of U.S. Patent No. 7,080,330, entitled “CONCURRENT MEASUREMENT OF CRITICAL DIMENSION AND OVERLAY IN
`SEMICONDUCTOR MANUFACTURING” (the “’330 patent) by Huawei Device USA Inc., Huawei Device Co., Ltd., and HiSilicon Technologies Co., Ltd.
`(“Huawei”). The following chart illustrates an exemplary analysis regarding infringement by Defendant Huawei semiconductor products, systems, devices,
`components, integrated circuits, and products containing such circuits, fabricated or manufactured using ASML’s semiconductor fabrication or manufacturing
`equipment and/or platforms (e.g., ASML’s YieldStar system). Such products include, without limitation, SoC chipsets and solutions (e.g., Hi3559A V100,
`Hi3519A V100, Hi3516D V300, Hi3556A V100, Hi3559 V200, Hi3559A V100, Hi3559C V100, Hi3559 V100, Hi3716M V430, Hi3716M V430, Hi3798C
`V200, Hi3798M V200H, Hi3798M V300, Hi3798M V310, Hi3796M V200, Hi3798M V200, Hi3796M V100, Hi3798M V100, Hi3716M V420, Hi3716M
`V410, and Hi3751 V553), processors (e.g., Hi3536, Hi3536C, Hi3536D V100, Hi3531D V100, Hi3521D V100, Hi3520D V400, Hi3520D V300, and Hi3520D
`V200), TV solutions (e.g., Hi3731 V201, Hi3731 V101, Hi3751 V811, HI3751 V810, Hi3751 V551, Hi3751 V730, Hi3751 V620, Hi3751 V510, Hi3751
`V310, Hi3751 V320, and Hi3751 V600), Kirin solutions (e.g., Kirin 9000/E, Kirin 1020, Kirin 990, Kirin 980, Kirin 970, Kirin 960, Kirin 950, Kirin 930, Kirin
`920, Kirin 910, and Kirin 710); Ascend solutions (e.g., Ascend 310 and Ascend 910); Kunpeng solutions (e.g., Kunpeng 920); and Balong solutions (e.g.,
`Balong 5000, Balong 5G01, Balong 765, Balong 750, Balong 720, Balong 710, and Balong 700), systems, products, or devices containing these solutions, and
`similar systems, products, devices, and integrated circuits (collectively, the “’330 Infringing Instrumentalities”).
`
`The analysis set forth below is based only upon information from publicly available resources regarding the ’330 Infringing Instrumentalities, as
`Huawei has not yet provided any non-public information.
`
`Unless otherwise noted, Ocean Semiconductor contends that Huawei directly infringes the ’330 patent in violation of 35 U.S.C. § 271(g) by using,
`
`selling, and/or offering to sell in the United States, and/or importing into the United States, the ’330 Infringing Instrumentalities. The following exemplary
`analysis demonstrates that infringement. Unless otherwise noted, Ocean Semiconductor further contends that the evidence below supports a finding of indirect
`infringement under 35 U.S.C. § 271(b) in conjunction with other evidence of liability.
`
`Unless otherwise noted, Ocean Semiconductor believes and contends that each element of each claim asserted herein is literally met through Huawei
`
`provision or importation of the ’330 Infringing Instrumentalities. However, to the extent that Huawei attempts to allege that any asserted claim element is not
`literally met, Ocean Semiconductor believes and contends that such elements are met under the doctrine of equivalents. More specifically, in its investigation
`and analysis of the ’330 Infringing Instrumentalities, Ocean Semiconductor did not identify any substantial differences between the elements of the patent
`claims and the corresponding features of the ’330 Infringing Instrumentalities, as set forth herein. In each instance, the identified feature of the ’330 Infringing
`Instrumentalities performs at least substantially the same function in substantially the same way to achieve substantially the same result as the corresponding
`claim element.
`
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`1
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`Ocean Semiconductor notes that the present claim chart and analysis are necessarily preliminary in that Ocean Semiconductor has not obtained
`substantial discovery from Huawei nor has Huawei disclosed any detailed analysis for its non-infringement position, if any. Further, Ocean Semiconductor
`does not have the benefit of claim construction or expert discovery. Ocean Semiconductor reserves the right to supplement and/or amend the positions taken in
`this preliminary and exemplary infringement analysis, including with respect to literal infringement and infringement under the doctrine of equivalents, if and
`when warranted by further information obtained by Ocean Semiconductor, including but not limited to information adduced through information exchanges
`between the parties, fact discovery, claim construction, expert discovery, and/or further analysis.
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`
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`
`
`USP 7,080,330
`
`Infringement by the ’330 Accused Instrumentalities
`
`19. A method for
`monitoring and controlling
`a semiconductor fabrication
`process comprising:
`
`providing a plurality of
`wafers undergoing the
`fabrication process;
`
`To the extent that the preamble of Claim 19 is a limitation, ASML’s YieldStar system monitors and controls a semiconductor
`fabrication process.
`
`For example, a variety of YieldStar systems perform this method, as follows:
`
`“The YieldStar 380G offers the nanometer-level precision necessary to monitor and control processes for today’s most advanced
`chips.”
`
`See YieldStar380G Product Overview, available at https://www.asml.com/en/products/metrology-and-inspection-
`systems/yieldstar-380g (last visited Oct. 12, 2020).
`
`The YieldStar 375F also performs this method, as follows:
`
`“The YieldStar 375F offers the nanometer-level precision necessary to monitor and control processes for today’s most advanced
`chips.”
`
`See YieldStar 375F Product Overview, available at https://www.asml.com/en/products/metrology-and-inspection-
`systems/yieldstar-375f (last visited Oct. 12, 2020).
`
`The YieldStar system is further describes as follows:
`
`“The YieldStar platform offers a standalone configuration and a configuration integrated in the resist track of a litho cluster. When
`integrated, a rich set of data becomes available from every production lot running through the litho cluster. This allows the
`lithography engineer to monitor, diagnose and further optimize production performance, fine tune production sampling schemes
`and offload metrology from today’s offline metrology tools such as CD-SEM.”
`
`See Marlene Strobl et al., Integrated ADI optical metrology solution for lithography process control of CD and OV, Metrology,
`Inspection, and Process Control for Microlithography 28, at 1 (Apr. 2, 2014) (“Integrated ADI”)
`ASML’s YieldStar system provides a plurality of wafers undergoing the fabrication process.
`
`For example, ASML’s YieldStar system provides multiple wafers undergoing the fabrication process, as follows:
`
`“To estimate the repeatability errors, we have performed TMU measurements on YieldStar 5th-gen. We restrict here to measure all
`
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`3
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`targets in Set 1, together with the C16 targets in Set 2 and 3. We were able to measure down to C6 with using the YieldStar in
`inline operation. For C4 we have used offline overlay extraction, which will be discussed in Section 3.4. The measurements are
`eight repeated runs in TIS mode with in between wafer (un)load and include sensor asymmetry correction (AC3). For practical
`reasons we have compromised on the total measurement time by measuring only four metrology blocks per exposure field within a
`wafer radius of 145 mm.”
`
`See Victor Calado et al., Study of μDBO overlay target size reduction for application broadening, SPIE Advanced Lithography
`2018, at 4 (Mar. 13, 2018) (“Overlay Study”)
`
`Additionally, the YieldStar system provides a plurality of wafers through increased wafer lot “throughput,” as described below:
`
`“The YieldStar 375F has a throughput to match the productivity of our fastest lithography systems. It can measure thousands of
`data points per lot and do so faster than previous solutions, reducing chipmakers’ metrology costs.”
`
`See YieldStar 375F Product Overview, available at https://www.asml.com/en/products/metrology-and-inspection-
`systems/yieldstar-375f (last visited Oct. 12, 2020).
`
`Further, the YieldStar system is shown as being integrated in a wafer manufacturing process and provides a plurality of water
`through such process, as shown below:
`
`
`
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`4
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`See Integrated ADI at 2.
`
`ASML’s YieldStar system maps the plurality of wafers into one or more logical grids comprising one or more portions in which a
`mapping the plurality of
`wafers into one or more
`grating structure for use in concurrent measurements is formed.
`
`logical grids comprising one
`or more portions in which a
`The YieldStar system records dense overlay maps depicting the average overlay of three wafers, as follows:
`grating structure for use in
`
`concurrent measurements is
`formed;
`
`
`See Overlay Study at 3.
`
`See also id. at 2 (“In addition, reduced sized targets have the advantage to be placed in-die (enabling intra-eld corrections) instead
`of in the scribe lanes only, allowing more freedom and flexibility in metrology target placement. It is also desirable to have
`multiple targets of different designs nearby each other to guarantee accurate overlay measurements during stack changes by
`allowing the freedom to choose an overlay target that matches the optical properties of the stack.”)
`
`See also id. at Fig. 1:
`
`
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`
`
`
`See also id. (“This is because we have added metrology tool-optical proximity correction (MT-OPC) assist features6 around the
`gratings. A separate study is dedicated to the impact of the MT-OPC and thus not in scope of this work. Smaller targets (< C10)
`are expected to have an affected overlay registration due to the following causes: At first targets below 10 x 10 µm2 have an
`individual grating size below 5 x 5 µm2 and should no longer be regarded as (pure) infinite gratings.7 Errors due to finite grating
`effects may emerge as a decreasing diffraction intensity (edge effects). This is because diffraction on such small targets occurs
`over a wider cone of angles and results in less diffracted photons captured by the optics.”
`
`Each of these maps includes one or more portions, depicted as different colored squares in the map. The squares represent the “the
`point-to-point difference in overlay.” Id. at 2. The wafers being measured by the YieldStar system further includes “grating
`dimensions” which are “essential to select the right measurement recipe (wavelength and polarization) for an accurate overlay
`measurement. Id. at 4.
`
`As a further example, the YieldStar system provides “customers with a high-density overlay map for every single TWINSCAN
`production wafer.” See YieldStar 375F Product Overview, available at https://www.asml.com/en/products/metrology-and-
`inspection-systems/yieldstar-375f (last visited Oct. 12, 2020). As noted above, this mapping is performed on wafers with a grating
`
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`structure, and in multiple portions. See Overlay Study at 2-4.
`
`See also Integrated ADI at Figs. 7 and 8:
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`concurrently measuring one
`or more critical dimensions
`and overlay in a wafer
`undergoing the fabrication
`process;
`
`
`
`
`
`ASML’s YieldStar system concurrently measures one or more critical dimensions and overlay in a wafer undergoing the
`fabrication process;
`
`For example, the YieldStar system measures multiple layers at the same time, wherein the layers consist of the critical dimension
`(“CD”) and an overlay during chip manufacturing, as follows:
`
`“The YieldStar 1375F is the first YieldStar optical metrology system to offer measurements within the chip itself.
`
`Capable of measuring multiple layers at once, this standalone system targets post-etch overlay and critical dimension (CD)
`measurements, allowing chipmakers to monitor the performance of their whole manufacturing process.”
`
`See YieldStar 1375F Product Overview, available at https://www.asml.com/en/products/metrology-and-inspection-
`systems/yieldstar-1375f (last visited Oct. 12, 2020).
`
`As an additional example, the YieldStar system measures CD and overlay in a single tool, as follows:
`
`“The ASML YieldStar high NA angular resolved scatterometry system has the unique capability to measure overlay, scanner focus
`and critical dimension (CD) with one metrology tool. It offers the lithography engineer access to a wide variety of lithography
`8
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`parameters on overlay, focus and imaging profiles (CD, resist height, Side Wall Angle) as well as on the properties of the
`underlying stack (height, n, k).”
`
`See Integrated ADI at 1.
`
`See also id. at 3 (“3.3 CD monitoring Using the recipes described in the previous section, YieldStar CD measurements were
`collected over a 2 months period, covering more than 4000 wafers, 12 points per wafer, on the stand-alone tool, prior to install of
`the integrated tool. Note that during this period the recipes were not adapted. For a large part of these wafers also CD-SEM data
`was available on – pairwise – nearby locations on the wafer, on a target with slightly different nominal CD. The CD monitoring
`results for the L/S feature are shown in Figure 4. The raw data is split into mean per wafer and residuals, which was obtained after
`subtracting the mean per wafer and the average wafer fingerprint of the full data set. These residuals contain random effects such
`as tool repeatability, and the impact of local CD variations that are not averaged out by the sampling area of the measurement tool.
`It can be seen that the YieldStar residuals are almost 2 times smaller than those of the CD-SEM, in line with the better repeatability
`and the larger sampling area.”).
`
`See also id. at Fig. 4:
`
`
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`
`See also id. at 4 (“From the mean-per-wafer plots, it can be seen that, irrespective of the CD metrology tool, the mean CD is well
`controlled within +/- 1nm, except for a few outliers. In addition to CD, the optical CD metrology tools can also measure many of
`the stack parameters. In Figure 5, as an example, the variation of the measured polysilicon height is shown. The data reveals that
`from lot 200 onwards, the polysilicon height follows a more or less bimodal distribution. Note that this variation didn’t show up in
`the CD readings.”)
`
`See also id. at 5 (“As explained in the introduction, the YieldStar angular scatterometer can not only measure CD but also overlay
`(OV) and scanner Focus. The overlay measurement method used in the YieldStar is diffraction based overlay (DBO, see ref . [5]
`for more details).”).
`
`
`
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`
`
`determining if one or more
`of the critical dimensions
`are outside of acceptable
`tolerances;
`
`ASML’s YieldStar system determines if one or more of the critical dimensions are outside of acceptable tolerances.
`
`For example, the YieldStar system generates a graph which shows the difference between wafer measurements and a metrology
`“recipe,” as follows:
`
`
`
`See Integrated ADI at 3.
`
`See Overlay Study at 3-4 (“We compare different sized targets with a reference overlay (Figure 2a). For the reference we have
`
`
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`chosen the mean overlay of the three C16 targets per location. Next we take the point-to-point difference in overlay between the
`reference (Figure 2a) and the candidate (Figure 2b). As an example, we plot this difference in Figure 2c labelled "Delta". This
`"Delta" map is the difference overlay that can be broken down in the following contributors: 1. An overlay difference between the
`targets, that comes from reticle writing errors. This is systematic in the exposure eld. 2. Difference in interaction with the local
`environment between each target, leading to an overlay registration error (such as grating imbalance). Here it is assumed to be also
`systematic in the exposure eld. 3. Repeatability errors. These have a random nature. 4. Overlay registration error due to size di
`erence. We assume these to be both of random and systematic nature.”).
`
`See also id. at Fig. 2:
`
`
`determining whether an
`overlay error is occurring;
`
`
`
`
`ASML’s YieldStar system determines whether an overlay error is occurring.
`
`For example, where the YieldStar system identifies a delta, or difference, between the “recipe” and the recorded measurements, the
`system identifies those areas on the overlay map with a red color, as follows:
`
`
`
`
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`
`See Integrated ADI at 3.
`
`This red color represents a large variance from the “recipe.”
`
`See also id. at Figs. 7 and 8:
`
`
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`
`
`
`
`
`
`
`Also, the YieldStar system flags “out-of-spec” measurements for further investigation, as follows. These “out-of-spec”
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`measurements can include overlay errors:
`
`“Table 3.2: Sample images from FEM gratings. The first column shows the best focus and exposure for each grating. The second
`column shows faulty gratings that YieldStar flagged out-of-spec by outputting a small numeric measurement. The third column
`shows faulty gratings that YieldStar missed to flag. For context, there were 43 erroneous gratings judged from SEM images;
`YieldStar correctly flagged 39 samples.”
`
`
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`15
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`Faulty Gratings
`Detected by Scatterometry Not Detected by Scatterometry
`
`
`
`
`
`
`Best
`
`90/45
`
`100/45
`
`100/50
`
`600/100
`
`600/150
`
`600/200
`
`600/300
`
`
`
`
`
`
`See Jae Yeon Baek, Modeling and Selection for Real—time Wafer—to—Wafer Fault Detection Applications, available at
`See Jae Yeon Baek, Modeling and Selection for Real-time Wafer-to-Wafer Fault Detection Applications, available at
`I ttlZ//WWW.66CS.b61‘kClC .edu/Pubs/TechRts/2015/EECS—2015—215.html
`last Visited Oct. 12, 2020 “Modelin_ and Selection” .
`http://www.eecs.berkeley.edu/Pubs/TechRpts/2015/EECS-2015-215.html (last visited Oct. 12, 2020) (“Modeling and Selection”).
`16
`16
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`
`
`See Overlay Study at 3-4 (“We compare different sized targets with a reference overlay (Figure 2a). For the reference we have
`chosen the mean overlay of the three C16 targets per location. Next we take the point-to-point difference in overlay between the
`reference (Figure 2a) and the candidate (Figure 2b). As an example, we plot this difference in Figure 2c labelled "Delta". This
`"Delta" map is the difference overlay that can be broken down in the following contributors: 1. An overlay difference between the
`targets, that comes from reticle writing errors. This is systematic in the exposure eld. 2. Difference in interaction with the local
`environment between each target, leading to an overlay registration error (such as grating imbalance). Here it is assumed to be also
`systematic in the exposure eld. 3. Repeatability errors. These have a random nature. 4. Overlay registration error due to size di
`erence. We assume these to be both of random and systematic nature.”).
`
`See also id. at Fig. 2:
`
`
`
`See also id. at 6 (“In Figure 4a we plot the C6 overlay as function of the reference C16 overlay. The C16 reference is the mean of
`the three C16 targets. We see a good point-to-point correlation, which is confirmed by a correlation coefficient of p = 0:99 and a
`linear t yields a slope here of 1:06.”)
`
`See also id. at Fig. 4:
`
`
`
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`developing control data
`based upon one or more
`concurrent measurements
`when at least one of an
`overlay error is occurring
`and one or more of the
`critical dimensions fall
`outside of acceptable
`tolerances; and
`
`
`
`
`ASML’s YieldStar system develops control data based upon one or more concurrent measurements when at least one of an overlay
`error is occurring and one or more of the critical dimensions fall outside of acceptable tolerances.
`
`For example, the YieldStar system collects metrology data for the purpose of eventual control of the fabrication process, as
`follows:
`
`“Integrated metrology is aimed at optimal control of the production process by a enabling a combination of sufficiently dense
`sampling and a very short feedback time. However, during recipe preparation, and excursion diagnosis, the availability of a stand-
`alone tool that is matched to the integrated tool is pre-requisite. In the YieldStar platform this is accomplished by using the very
`same sensor design for both the integrated and the stand-alone configuration.”
`
`See Integrated ADI at 6.
`
`This collected metrology data is then integrated into another tool for the purpose of process control. One such tool is ASML’s
`LithoInsight correction model, as follows:
`
`“As explained in the introduction, the YieldStar angular scatterometer can not only measure CD but also overlay (OV) and scanner
`Focus. The overlay measurement method used in the YieldStar is diffraction based overlay (DBO, see ref .[5] for more details).
`This section deals with the OV sampling, correction models and the resulting control.
`
`
`
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`4.1 Overlay control using HVM sampling, LithoInsight model and Overlay Optimizer
`
`To assess the overlay control capability offered by an integrated metrology solution, we compared a typical APC control case, as
`reference, with the integrated solution with optimized control model, sampling scheme and the full correction capabilities of the
`scanner.
`
`
`* * *
`
`“For the integrated solution, where the control is based upon metrology data from the integrated DBO tool, we used a LithoInsight
`(LIS) correction model.”
`
`See Integrated ADI at 5-6.
`
`See also id. at Fig. 1:
`
`
`
`See also Modeling and Selection at 4 (“After the CD has been estimated for an incoming sample, R2R control algorithms are used
`to automate recipe corrections. One well-known algorithm is the exponentially weighted moving average (EWMA) filter.”
`
`
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`
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`feeding forward or
`ASML’s YieldStar system feeds forward or backward the control data to adjust one or more fabrication components or one or
`
`backward the control data to more operating parameters associated with the fabrication components when at least one of an overlay error is occurring and one or
`adjust one or more
`more of the critical dimensions fall outside of acceptable tolerances to mitigate overlay error and/or to bring critical dimension
`fabrication components or
`within acceptable tolerances
`one or more operating
`
`parameters associated with
`For example, the YieldStar system accomplishes metrology control by using the LithoInsight correction model, as follows:
`the fabrication components
`
`when at least one of an
`“In this paper, we have studied the wafer overlay correction capability by RegC® in combination with TWINSCANTM intra-field
`overlay error is occurring
`corrections to improve the on product overlay performance. RegC® is a reticle intra-volume laser writing technique that causes a
`and one or more of the
`predictable deformation element (RegC® deformation element) inside the quartz (Qz) material of a reticle. This technique enables
`critical dimensions fall
`to post-process an existing reticle to correct, for instance, for IPE. Alternatively, a pre-determined intra-field fingerprint can be
`outside of acceptable
`added to the reticle such that it results in a straight field after exposure. This second application might be very powerful to correct
`tolerances to mitigate
`for instance for (cold) lens fingerprints that cannot be corrected by the scanner itself. Another possible application is the intra-field
`
`overlay error and/or to bring processing fingerprint. One should realize that a RegC® treatment of a reticle generally results in global distortion of the reticle.
`critical dimension within
`This is not a problem as long as these global distortions can be corrected by the TWINSCANTM system (currently up to the third
`acceptable tolerances
`order). It is anticipated that the combination of the RegC® and the TWINSCANTM corrections act as complementary solutions.
`These solutions perfectly fit into the ASML LithoInsight product in which feedforward and feedback corrections based on
`YieldStar overlay measurements are used to improve the on product overlay.”
`
`See Ofir Sharoni, Carl Zeiss, Intra-field on-product overlay improvement by application of RegC® and TWINSCANTM
`corrections, at 2, available at http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.682.133&rep=rep1&type=pdf (last visited
`Oct. 12, 2020).
`
`See also id. at Fig. 1:
`
`
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`
`See also “Yieldstar S-1375F,” available at https://www.asml.com/-/media/asml/files/products/yieldstar-systems/yieldstar-s-
`1375f.pdf (“By utilizing the YieldStar S-1375F's unique high-NA system, customers can measure device overlay and CD with
`speed and accuracy. This capability enables hyper dense sampling and faster feedback of after-etch data to the TWINSCAN and
`etchers.”)
`
`See also “Measuring accuracy,” available at https://www.asml.com/en/technology/lithography-principles/measuring-accuracy (last
`visited Oct. 12, 2020) (“Additionally, YieldStar is being used for after-etch metrology to inspect actual device structures with more
`accuracy and higher measuring speed than our competitors’ scanning electron microscope (SEM) solutions.”).
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`21
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