Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 1 of 24 PageID #: 973
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`MARSHALL DIVISION
`
`Parthenon Unified Memory Architecture
`LLC,
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`v.
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`ZTE Corp. et al.
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`
`Case No. 2:15-cv-00225-JRG-RSP
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`ZTE (USA) Inc. & ZTE (TX) Inc.’s
`Claim Construction Brief
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 2 of 24 PageID #: 974
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`Table of Contents
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`Introduction ............................................................................................................................. 1  
`I.  
`II.   Agreed & Withdrawn Constructions ...................................................................................... 2  
`III.  
`Related Briefing and Orders ............................................................................................... 2  
`IV.  
`Relevant Legal Standards ................................................................................................... 2  
`V.   ZTE Requests Construction of the Following Terms ............................................................. 3  
`A.   bus ....................................................................................................................................... 3  
`B.   memory bus ....................................................................................................................... 11  
`C.  
`in real time ........................................................................................................................ 14  
`D.  
`fast bus .............................................................................................................................. 14  
`E.  
`coupled .............................................................................................................................. 15  
`F.   directly supplied ................................................................................................................ 18  
`G.   arbiter ................................................................................................................................ 19  
`H.   control circuit .................................................................................................................... 20  
`I.   monolithically integrated into/with ................................................................................... 20  
`VI.  
`Conclusion ........................................................................................................................ 21  
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`

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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 3 of 24 PageID #: 975
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`Table of Authorities
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`2
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`2, 8, 17
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`2
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`2
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`7, 8
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`12
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`12
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`12
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`12
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`17
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`19
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`Vitronics Corp. v. Conceptronic, Inc.,
`90 F.3d 1576, 1582 (Fed. Cir. 1996)
`Phillips v. AWH Corp., 415 F.3d
`1303, 1312-14 (Fed. Cir. 2005) (en
`banc)
`Markman v. Westview Instruments,
`Inc., 52 F.3d 967, 979 (Fed. Cir.
`1995)
`Liquid Dynamics Corp. v. Vaughan
`Co., 355 F.3d 1361, 1367 (Fed. Cir.
`2004)
`Nystrom v. TREX Co. Inc., 424 F.3d
`1136, 1144 (Fed. Cir. 2005)
`Felix v Am. Honda Motor Co., 562
`F.3d 1167, 1178. (Fed. Cir. 2009) 

`Merck & Co. v. Teva Pharm. USA,
`Inc., 395 F.3d 1364, 1372 (Fed. Cir.
`2005) 

`Elekta Instrument S.A. v. O.U.R.
`Scientific Int’l, Inc., 214 F.3d 1302,
`1307 (Fed. Cir. 2000) 

`Gen. Am. Transp. Corp. v. Cryo–
`Trans, Inc., 93 F.3d 766, 770
`(Fed.Cir.1996) 

`Innova/Pure Water, Inc. v Safari
`Water Filtration Systems, Inc., 381
`F.3d 1111 at 1116 (Fed. Cir. 2004) 

`In re Nelson, 47 C.C.P.A. 1031, 280
`F.2d 172, 181 (1960)
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 4 of 24 PageID #: 976
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`I.  
`
`Introduction
`The fundamental issue to be determined in this proceeding is whether PUMA may use the
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`claim construction process to expand the scope of its claims to encompass technology which it
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`neither invented nor claimed during prosecution. The ZTE Defendants urge the Court not to
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`allow PUMA to do so.
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`This case is the “third round” of cases brought by Plaintiff Parthenon Unified Memory
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`Architecture LLC (“PUMA”) against various defendants—in this case, ZTE (USA) Inc. & ZTE
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`(TX) Inc. (collectively, the “ZTE Defendants”). In each of these cases PUMA asserts many of
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`the same patents and claims, and advances largely similar arguments for claim construction.
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`This Court has already conducted two claim construction hearings on these patents, on June 5,
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`2015 for the HTC / LG case, 2:14-cv-690-JRG-RSP (hereafter, the “HTC Case”), and on
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`September 1, 2015, for the Samsung / Huawei / Motorola case, 2:14-cv-902-JRG-RSP (hereafter,
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`the “Samsung Case”); issued a Memorandum Opinion and Order (2:14-cv-690-RSP, Dkt. 155)
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`construing the claims in the HTC Case; and provided “preliminary constructions” in advance of
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`the claim construction hearing in the Samsung Case, attached hereto as Exhibit ZTE-CC-C.
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`The ZTE Defendants’ arguments build upon those made by the defendants in related
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`cases. In the interest of judicial efficiency and conservation of the Parties’ resources, rather than
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`rehash or restate previously made arguments already presented to this Court, this memorandum
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`will focus on new matter not previously briefed, summarize arguments and material previously
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`presented to the Court, and incorporate by reference briefing from prior related cases that ZTE
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`intends to rely upon.
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`1
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 5 of 24 PageID #: 977
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`II.  
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`Agreed & Withdrawn Constructions
`Proposed constructions for terms that the parties have agreed to are presented in Exhibit
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`ZTE-CC-A.
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`III.   Related Briefing and Orders
`For the convenience of the Court, an index of related briefings and Orders from
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`proceedings before this Court relevant to the claim terms discussed in this brief is provided in
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`Exhibit ZTE-CC-B.
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`IV.   Relevant Legal Standards
`The Court is well versed in the general principles of claim construction. The process of
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`construing a claim term begins with the words of the claims themselves. See Vitronics Corp. v.
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`Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996); Phillips v. AWH Corp., 415 F.3d 1303,
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`1312-14 (Fed. Cir. 2005) (en banc). However, the claims “must be read in view of the
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`specification, of which they are a part.” Phillips, 415 F.3d at 1315 (quoting Markman v.
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`Westview Instruments, Inc., 52 F.3d 967, 979 (Fed. Cir. 1995) (en banc), aff’d, 517 U.S. 370
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`(1996)). “It is well-settled that, in interpreting an asserted claim, the court should look first to the
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`intrinsic evidence of record, i.e., the patent itself, including the claims, the specification and, if in
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`evidence, the prosecution history. Such intrinsic evidence is the most significant source of the
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`legally operative meaning of disputed claim language.” Liquid Dynamics Corp. v. Vaughan Co.,
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`355 F.3d 1361, 1367 (Fed. Cir. 2004) (quoting Vitronics Corp., 90 F.3d at 1582). Other relevant
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`principles of claim construction applicable to this case are discussed below.
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`2
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 6 of 24 PageID #: 978
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`ZTE Requests Construction of the Following Terms
`A.  
`bus
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`V.  
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`“bus”
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`ZTE’s Proposal
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`PUMA’s Proposal
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`A signal line or set of associated signal lines
`to which a number of devices are connected
`and over which information may be
`transferred by only one device at a time.
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`No construction necessary.
`Alternatively: a signal line or a set of
`associated signal lines to which a number of
`devices are coupled and over which
`information may be transferred between them.
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`Having reviewed and considered PUMA’s briefing, and the Court’s claim construction
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`Order in the HTC Case, ZTE has modified its proposed construction of “bus” by removing the
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`word “directly,” and will incorporate the clarification intended by the word “directly” into its
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`construction for “coupled.”
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`With respect to the term “bus”, ZTE incorporates by reference and adopts the briefing,
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`evidence, and arguments therein of the defendants from the Samsung Case (Parthenon United
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`Memory Architecture LLC v. Samsung Elec. Co. et al, 2:14-cv-902-JRG-RSP, Dkt. 86, at 2-8.)
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`(hereafter, the “Samsung Brief”).
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`To briefly summarize Samsung’s arguments:
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`•   The construction of “bus” from the HTC Order is incomplete because it does not provide
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`sufficient guidance on where one bus ends and another bus begins.
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`•   The limitation “by only one device at a time” clarifies that, if two devices may transmit at
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`the same time on different signal lines, those lines are not part of a single “bus.”
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`•   Using the term “coupled” to define a “bus” makes it impossible to differentiate between
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`one bus and two buses.
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`3
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 7 of 24 PageID #: 979
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`After the conclusion of the briefing in the Samsung Case, the Court issued the Claim
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`Construction Order1 in the HTC Case (the “HTC Order”) construing “bus,” which remedies
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`some of the issues addressed in the Samsung Brief. Specifically, the HTC Order indicates that
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`the “PCI bus lines,” the “ISA bus lines,” and the “memory bus lines” are each a separate “set of
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`associated signal lines,” and it follows from this that they are separate buses. HTC Order, at 16-
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`17.
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`The ZTE Defendants agree in this respect with the HTC Order, as far as it goes–the PCI
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`bus, ISA bus, and memory bus are different busses and their signal lines are associated with
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`their respective busses and not “associated” with the others within the meaning of the term
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`“bus.” However, the HTC Order leaves room for significant mischief and confusion at trial,
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`because it does not provide the parties any method to determine whether or why one set of lines
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`is or is not part of a bus, outside of comparison to the examples explicitly provided by the Court
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`(i.e. PCI and ISA buses).2
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`To explain why the lines associated with those buses are “a bus” and not just an arbitrary
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`set of lines, it is necessary to understand that the “bus” recited in the specification is a shared
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`transmission medium3, and that the “one device at a time” limitation is fundamental to a shared
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`medium.4 “Because a wire can carry only one symbol at any one time, a ‘bus’ composed of one
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`or more wires can only carry one bus transaction at any one time over the wires.”5 Simply put, if
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`1 Mem. Op. & Order, Case No. 2:14-cv-690-JRG-RSP, Dkt. 155, at 17.
`2 PCI and ISA bus technology is unlikely to be an issue in this case (except with respect to
`invalidity).
`3 O’Hallaron, David R., Ph.D., Lecture 3, 20-755: The Internet, Summer 1999, at 4. Retrieved
`from http://www.cs.cmu.edu/~droh/755/lect03.ppt on 28 Sept, 2015. Attached as Exhibit ZTE-
`CC-CMU.
`4 Decl. Harold S. Stone, Ph.D., Case 2:14-cv-902-JRG-RSP, Dkt. 86-1, at ¶ 37.
`5 Id., at ¶¶ 36-37.
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`4
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 8 of 24 PageID #: 980
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`more than one device can simultaneously and successfully transmit data over a “set of associated
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`signal lines”, then that “set of associated signal lines” is not a “bus” within the meaning of the
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`patents-in-suit.
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`Slide 23 – ZTE Technology Tutorial
`This concept is illustrated by the technology tutorial submitted to the Court by ZTE.
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`Slide 23 depicts a single bus connected to three devices—a “Decoder/Encoder,” a “Memory,”
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`and an unspecified “Other Device.” A transmission on the bus is depicted by a stream of
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`vehicles (traffic) being emitted from the device into the bus. As depicted, either the
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`Decoder/Encoder or the “Other Device” can transmit on the bus simultaneously. One can
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`intuitively see that if both did, there would be a “collision” when the vehicles crash into each
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`other. Many mechanisms were known to one of ordinary skill in the art for preventing or dealing
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`5
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 9 of 24 PageID #: 981
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`with collisions. The patents-in-suit recite one such mechanism—an “arbiter,” depicted here as
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`the traffic cop stopping the “Other Device” and permitting the “Decoder” to transmit.6
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`PUMA’s brief makes three arguments against the “one device at a time” limitation, none
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`of which has any merit. First, PUMA asserts that the concept of the “one device at at time”
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`limitation is not supported by the intrinsic evidence.7 This is not true. In fact, all of the busses
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`mentioned in the specification of the patents-in-suit (i.e. the ISA and PCI busses) have a shared
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`medium (aka “a set of associated signal lines”), each of which can be driven to only one voltage,
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`and are therefore subject to the “only one device at a time” limitation.8
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`Second, PUMA asserts, incorrectly, that the “only one device at a time” limitation would
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`read out a “split-transaction” bus, which can “transfer information between multiple devices at
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`the same time.”9 This is also not true. In fact, a split-transaction bus is a bus protocol for
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`improving the performance of an ordinary bus, and multiple devices on a split-transaction bus
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`may not transmit at the same time. PUMA’s mistake appears to result from a misunderstanding
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`of how a split-transaction bus works. A split-transaction bus does not magically allow two
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`devices to transmit at the same time. Rather, a split transaction bus simply “splits” a bus
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`“transaction” into two separate transactions—the request, and the response—so that while the
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`6 Other bus technologies (for example, early bus topology Ethernet) took a different approach,
`and rather than prevent collisions, permit them to happen but deal with them using transmission
`protocols such as CSMA.
`7 Pl. Parthenon Unified Memory Architecture LLC’s Opening Claim Construction Br., Dkt. 56,
`at 6.
`8 See generally, PCI Local Bus Specification, attached as Exhibit ZTE-CC-PCI, and ISA Bus
`Specification and Application Notes, attached as Exhibit ZTE-CC-ISA
`9 Dkt. 56 at 6.
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`6
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 10 of 24 PageID #: 982
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`request is being worked on, other devices can transmit on the bus.10 Only one device, however,
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`is ever transmitting at one time.
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`Lastly, PUMA asserts that the “one device at a time” limitation would read out
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`technologies like “Mercury RACEway.”11 PUMA is correct that the term “bus” as used in the
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`patents-in-suit would not read on Mercury RACEway, but PUMA’s premise is flawed—because
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`Mercury RACEway is not a “bus” within the meaning of the patents-in-suit.
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`First and foremost, even if Mercury RACEway were considered to be an exotic species of
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`bus, it is both very different from the busses discussed in the specification, and it is also not part
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`of the intrinsic record. There is no indication that the inventors considered Mercury RACEway
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`to be a bus, or in fact that the inventors considered anything other than buses of the type actually
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`discussed in the specification. Nowhere in the approximately 2,600 pages of file history of the
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`PUMA patents, spanning over 15 years, do the terms “Mercury,” “RACEway,” or “crossbar”
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`appear. In contrast, “bus” appears on 871 pages, and “arbiter” appears on 463 pages. As in
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`Nystrom v. TREX, PUMA “is not entitled to a claim construction divorced from the context of
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`the written description and prosecution history.”12 “What Philips now counsels is that in the
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`absence of something in the written description and/or prosecution history to provide explicit or
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`10 “A bus, being a single path, can become a bottleneck in multiprocessor systems. One solution
`to this problem is to have multipath connection networks, but even for a bus-based system there
`are measures we can take. One of them is to make the bus work in split-transaction form, which
`is what we assume here. It means that when a CPU places a memory request on the bus, that
`CPU then immediately releases the bus, so that other entities can use the bus while the memory
`request is pending. When the memory request is complete, the memory module involved will
`then acquire the bus, place the result on the bus (the read value in the case of a read request, an
`acknowledgement in the case of a write request), and also place on the bus the ID number of the
`CPU that had made the request.” Matlof, Norm, Introduction to Discrete-Event Simulation &
`the SimPy Language, 2008, at 21. Attached as Exhibit ZTE-CC-SIMULATION.
`11 Dkt. 56 at 7.
`12 Nystrom v. TREX Co. Inc., 424 F.3d 1136, 1144 (Fed. Cir. 2005).
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`7
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 11 of 24 PageID #: 983
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`implicit notice to the public—i.e., those of ordinary skill in the art—that the inventor intended a
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`disputed term to cover more than the ordinary and customary meaning revealed by the context of
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`the intrinsic record, it is improper to read the term to encompass a broader definition simply
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`because it may be found in a dictionary, treatise, or other extrinsic source.” Id. at 1145, citing
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`Philips v. AWH Corp., 415 F.3d 1303, 1321 (Fed. Cir. 2005).
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`Second, RACEway is not a bus—it is a crossbar extension to a VMEbus.13 Plaintiff’s
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`Exhibit O, which appears to be a capture/printout from the Internet Archive Wayback Machine of
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`Mercury Systems’ product page for RACEway, describes RACEway tellingly:
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`“As a backward-compatible upgrade, Interlink modules transform the
`topology of an existing VMEbus chassis from a single transaction bus to a
`scalable real-time fabric . . . .”14 (emphasis added). RACEway’s literature
`describes the product as something that works with ordinary buses: “[t]he
`RACEway interconnect fabric provides a uniform communications medium
`that connects processors, I/O devices, and standard bus interfaces, such as
`VME and VSB, in a consistent way throughout the system.”
`Generally, throughout Plaintiff’s Exhibit O, the term “bus” is never used to refer to RACEway,
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`except insofar as a “bus” is something that RACEway connects to and transforms into something
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`else.
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`To put it into terms the Court is already familiar with from these patent(s), given a
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`standard bus topology with multiple devices (such as that provided in Fig. 1C of the patents-in-
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`suit), RACEway “extends” that topology by creating connections between the devices through
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`the RACEway crossbar so that they don’t need to use the actual bus.
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`13 Plaintiff’s Exhibit O, at 1.
`14 Id
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`8
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 12 of 24 PageID #: 984
`Auto route path selection is the default routing option with the ILK8, ILK12, and
`ILK16 devices. It is a unique feature of the RACEway ASIC and is illustrated in
`Figure 4.
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`Figure 4a shows a transfer in progress between CN1 and CN3.
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`Figure 4b shows how the crossbar ASIC automatically chooses the free
`available path through the Interlink's crossbar network between CN2 and CN4 for
`a second transfer.
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`Auto route path selection with the ILK8, ILK12, and ILK16 modules is an ease-of-
`use feature that frees the programmer from the details of path routing.
`Distributed matrix transpose, or "corner turn" applications, for example, achieve
`very-high interprocessor communication bandwidth with this feature.
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`
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`Excerpt of Figure 4 from Plaintiff’s Exhibit O.
`Path Priorities
`But RACEway crossbar is not merely an alternative bus (like the PCI bus or the ISA bus)
`Figure 4c depicts the path priority feature. Important transfers such as sensor I/O or synchronization messages can
`because, as shown in the excerpt of Figure 4 (above) of Plaintiff’s Exhibit O, multiple devices
`be programmed to preempt lower-priority transfers, ensuring deterministic message transfer time regardless of
`can transmit at the same time. This means that there is not a single shared medium that each
`lower-priority internode traffic. This example shows how transfers #1 and #2 (in Figure 4b) are preempted when a
`higher-priority transfer #3 takes place from CN5 to CN1. The lower-priority transfers resume when transfer #3
`connected device uses to transmit on, which makes the RACEway not a bus.
`completes.
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`The other two documents Plaintiff offers on RACEway are irrelevant. Each shows a
`ILK1 Module
`usage of RACEway, by third parties, described as a bus. Even if these documents were to be
`open in browser PRO version Are you a developer? Try out the HTML to PDF API
`considered relevant and probative extrinsic evidence, however, (which they are not) and even if
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`they were to be considered to be in the relevant field of the patents-in-suit (which they are not);
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`any evidentiary value they may possess would be far outweighed by the directly relevant
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`intrinsic evidence, in which the inventor disclosed ordinary busses which are in relevant respects
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`very like each other, and very unlike RACEway.
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`Plaintiff’s Exhibit N appears to be a study of military digital signal processor
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`architectures.15 It mentions RACEway on only five pages; the first of which contains a
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`15 Plaintiff’s Exhibit N.
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 13 of 24 PageID #: 985
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`description of several kinds of buses, including control bus, data bus (of which it considers
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`RACEway a member), test and maintenance bus, input/output bus, local/wide area network bus,
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`and lastly PC bus.16 The PC Bus category includes the PCI and ISA busses, as well as Extended
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`ISA, and PCMCIA.17 Each of these “PC Buses” are similar in that each meets the Court’s prior
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`construction from the HTC case, as well as the “only one device at a time” limitation. While the
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`types of “bus” listed may be accurate descriptions in the field of digital signal processor
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`architectures, they are not useful in the context of the patents-in-suit which are about personal
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`computer or system-on-chip architectures. This document on its own terms puts the kinds of
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`busses described in the patents-in-suit into a separate category from “RACEway.”
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`Lastly, Plaintiff’s Exhibit M appears to be an academic study of military radar systems.
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`Not counting the index and figures, it discusses RACEway on one page of a 62 page study
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`(referring to it as the “Mercury RACEway Bus”) as part of a description of the computer
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`equipment used build a radar system.18 Aside from the inaccuracy of the description, the Court
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`should give it no weight, for two reasons. First, the field of technology and audience to which
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`the document relates (multi-aperture radars, and radar engineers) are not relevant to the
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`technology and audience for the patents in suit (microcomputer bus design, and computer
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`engineers). Radar engineers, discussing the computer hardware used to build radar systems, do
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`not redefine common terms well known to persons of ordinary skill in the art of personal
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`computer architecture through their casual or inaccurate use of terminology.
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`Finally, PUMA offers a sealed document (Plaintiff’s Exhibit X) which appears to use the
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`term “fabric” interchangeably with “bus.” This document is not relevant to the determination for
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`16 Id, at 4.
`17 Id.
`18 Pl. Ex. M, at 31.
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 14 of 24 PageID #: 986
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`several reasons. First, on its face it is dated 2011. Even if it contained an accurate description or
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`definition of terminology in 2011, it is not relevant evidence as to what the inventor of the
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`patents-in-suit intended by the term bus, as he used it in the patents-in-suit, 15 years earlier.
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`Second, without more technical detail as to what “fabric” represents, it is difficult to
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`know what precisely this document means when it uses the term “fabric” and thus whether it is
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`indeed relevant at all to the determination. If the “fabric” of Exhibit X is, like each of the buses
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`which were disclosed by the patents-in-suit and the prosecution history, a shared medium over
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`which multiple devices transmit data, one at a time; then perhaps the device referred to as a
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`fabric is a bus. If, however, the “fabric” is a switched network of buses, connecting many sets of
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`signal lines together in a non-blocking fashion, then it is not “a bus” within the meaning of the
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`patents-in-suit, rather it is a collection of busses.
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`Plaintiff’s remaining arguments related to “bus” dealt with the word “directly.”19 That word has
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`been removed from the ZTE Defendants’ proposed construction, mooting these arguments.
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`B.  
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`memory bus
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`“memory bus”
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`ZTE’s Proposal
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`PUMA’s Proposal
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`a bus that connects directly with a memory
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`No construction necessary.
`Alternatively: a signal line or a set of
`associated signal lines to which a number of
`devices, including a memory, are coupled and
`over which information may be transferred.
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`
`
`
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`With respect to the term “memory bus”, ZTE incorporates by reference and adopts the
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`briefing, evidence, and arguments therein of the defendants from the Samsung Case (Parthenon
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`19 Dkt. 56, at 7-8.
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`11
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 15 of 24 PageID #: 987
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`United Memory Architecture LLC v. Samsung Elec. Co. et al, 2:14-cv-902-JRG-RSP, Dkt. 86, at
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`8-9.).
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`
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`To briefly summarize Samsung’s arguments:
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`•   A construction requiring a “direct connection” between a bus and a memory is supported
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`by the intrinsic record, including the figures in the specification.
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`•   PUMA’s proposed construction is overly broad because under it, any bus is a memory
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`bus.
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`As with several other claim terms, the parties’ fundamental disagreement here is on the
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`degree or relevance of connection. PUMA proposes that “coupled” means “directly or indirectly
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`connected.” Every computer contains memory, and every device in a computer is connected—
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`directly or indirectly—to every other device in the computer. Thus, according to PUMA’s
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`definition, every bus in a computer is a “memory bus.” Such a construction is inappropriate
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`because it reads “memory” out of the limitation entirely and destroys the differentiation between
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`“bus” and “memory bus” as used in the claims. Felix v Am. Honda Motor Co., 562 F.3d 1167,
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`1178. (Fed. Cir. 2009); see also Merck & Co. v. Teva Pharm. USA, Inc., 395 F.3d 1364, 1372
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`(Fed. Cir. 2005) (“A claim construction that gives meaning to all the terms of the claim is
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`preferred over one that does not do so.”) (citing Elekta Instrument S.A. v. O.U.R. Scientific Int’l,
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`Inc., 214 F.3d 1302, 1307 (Fed. Cir. 2000) (construing claim to avoid rendering the 30 degree
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`claim limitation superfluous); Gen. Am. Transp. Corp. v. Cryo–Trans, Inc., 93 F.3d 766, 770
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`(Fed.Cir.1996) (rejecting the district court's claim construction because it rendered superfluous
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`the claim requirement for openings adjacent to the end walls)). No person of ordinary skill in the
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`art would believe that every bus in a computer system is a memory bus.
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 16 of 24 PageID #: 988
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`ZTE’s proposed construction provides a definition which is simultaneously common-
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`sense and clear for the jury, as well as not committing the obvious categorical errors in PUMA’s
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`construction which render it inappropriate from a technical perspective. PUMA’s briefing
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`identifies only one issue with ZTE’s proposed construction—that a tri-state buffer would prevent
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`a memory from being “directly” connected to a bus. This, however, is based on a misreading
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`and misunderstanding of Dr. Stone’s transcript. Dr. Stone clearly states:
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`. . . you have a clock cycle or you have a time, a period, when the drivers to
`the bus are in tri-state mode. That means they’re physical disconnected,
`there’s no electrical connection. Actually, it’s through a transistor that’s
`open. Then you connect them to the bus by closing that transistor, closing
`a switched. So whatever you’re driving will be passed to the bus. When it
`says active high or active low, that means that you’re putting a zero or a one on
`the bus. When you’re done driving and you reach the time that you’re at
`the end of that clock period, you go back to tri-state, which means you
`disconnect the driver from the bus.
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`Plaintiff’s Ex. Q, at 5, Transcript 41:22-42:11.
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`In other words, there is a device called a tri-state buffer that can disconnect one device from
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`another. At some times the device is connected and transmitting, and then at other times the
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`device is disconnected and not transmitting. If a claim limitation requires a “connection” and, as
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`Plaintiff seems to admit in its briefing, the tri-state buffer “disconnects” the device, then whether
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`the connection is “direct” or “indirect” will not cause a “disconnected” device to meet a
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`limitation requiring “connection.”
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`If, however, as Dr. Stone describes, the tri-state buffer periodically connects and
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`disconnects the memory to the bus, then it is merely the case that the device is sometimes
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`connected and sometimes not—in other words, it sometimes may meet a “connected” limitation
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`and sometimes it does not. This is no different than a device which sometimes meets limitations
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`requiring it to perform method steps (because it is turned on), and sometimes does not (because it
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`is turned off). At any rate, “sometimes a limitation would not be met” is not a reasoned
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`objection to a proposed construction.
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`C.  
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`in real time
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`“in real time”
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`ZTE’s Proposal
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`PUMA’s Proposal
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`Indefinite.
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`Fast enough to keep up with an input data
`stream.
`
`
`
`
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`With respect to the term “in real time”, ZTE incorporates by reference and adopts the
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`briefing, evidence, and arguments therein of the defendants from the Samsung Case (Parthenon
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`United Memory Architecture LLC v. Samsung Elec. Co. et al, 2:14-cv-902-JRG-RSP, Dkt. 86, at
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`9-16). However, ZTE does not adopt Samsung’s position regarding an alternate proposed
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`construction. ZTE contends that the term is indefinite under Nautilus and that no construction is
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`possible given the intrinsic record.
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`To briefly summarize Samsung’s arguments:
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`•   The intrinsic evidence is inconsistent as to the meaning of “real time”
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`•   The specification indicates that the PCI bus is a real time bus.
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`•   The prosecution history distinguishes the invention over the PCI bus when cited in a
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`rejection, because the PCI bus is not a real time.
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`•   The patent’s notice function is not served, because a person of ordinary skill in the art,
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`reading the specification and claims, receives conflicting information and has no way to
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`know whether a PCI bus does or does not meet the “real time” limitation in the claims.
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`D.  
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`fast bus
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`“fast bus”
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`14
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`Case 2:15-cv-00225-JRG-RSP Document 60 Filed 09/28/15 Page 18 of 24 PageID #: 990
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`ZTE’s Proposal
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`PUMA’s Proposal
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`Bus with a bandwidth greater than the
`bandwidth required for the decoder to operate
`in real time
`
`Bus with a bandwidth equal to or greater than
`the required bandwidth to operate in real time.
`
`
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`With respect to the term “fast bus”, ZTE incorporates by reference and adopts the
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`briefing, evidence, and arguments therein of the defendants from the HTC Case (Parthenon
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`United Memory Architecture LLC v. HTC Corp. et al, 2:14-cv-690-JRG-RSP, Dkt. 121, at 9).
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`E.  
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`coupled
`
`“coupled” and related forms
`
`ZTE’s Proposal
`
`PUMA’s Proposal
`
`attached, resulting in an arrangement that
`includes no more than one bus
`
`alternatively, in the event that the Court
`adopts PUMA’s proposal:
`Indefinite
`
`coupled: directly or indirectly connected
`coupleable: directly or indirectly connectable
`coupling: directly or indirectly connecting
`
`
`
`
`
`
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`Having reviewed and considered PUMA’s briefing, and the Court’s HTC Order, ZTE
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`modifies its proposed construction to “attached, resulting in an arrangement that includes no
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`more than one bus,” which is the same construction briefed by the defendants in the HTC case.
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`And, with respect to this alternative construction, ZTE incorporates by reference and