10/784613
`
`NN
`
`PTO/SB/05 (01-04) -
`
`
`
`
`
`
`
`
`b. Specification SequenceListing on:
`.
`1. CL.CD-ROM or CD-R (2 copies)or
`
`
`
`
`
`
`ii. () Paper numberof pages
`Cc. 0 Statements verifying identity
`of above copies
`
`
`
`
`ACCOMPANYING APPLICATIONS PARTS
`
`
`
`
`
`AssignmentPapers (cover sheet & document(s))
`9.)
`
`
`37 CFR 3.73(b) Statement
`CO Powerof
`10.0)
`
`
`
`(whenthere is an assignee)
`Attomey
`&] Drawing(s) (35U.S.C.113)
`[TotalSheets 15]
`
`
`1.0 English Translation Document(if applicable)
`[TotaliPages
`1
`~
`]
`5. Oath or Declaration
`
`
`12.)_Information Disclosure LJ Copies of IDS
`
`a. & Newly executed (original or copy)
`
`
`
`Statement (IDS)/PTO-1449
`Citations
`
`b. O Capyfrom a prior application (37 CFR 1.63 (d))
`Preliminary Amendment
`
`
`(for a continuation/divisional with Box 18 completed)
`
`Return Receipt Postcard (MPEP 503)
`i. 1] DELETION OF INVENTOR(S)
`
`
`(Should be specifically itemized)
`Signed statementattached deleting inventor(s)
`Certified Copy of Priority Document(s)
`namedin the prior application, see 37 CFR
`
`
`
`
`1.63(d}(2) and 1.33(b).
`(if foreign priority is claimed)
`
`
`Nonpublication Request under 35 U.S.C. 122
`
`6.
`[& Application Data Sheet. See 37 CFR 1.76
`
`
`(b)(2)(B)(i). Applicant must attach form PTO/SB/35
`orits equivalent
`
`
`
`17:0
`:
`Other:
`
`18. If a CONTINUING APPLICATION,check appropriate box, and supply the requisite information below andin thefirst sentenceofthe
`Specification following the title, or in an Application Data Sheet under 37 CFR 1.76:
`of prior application No:
`D Continuation
`0 Divisional
`1 Continuation-in-part (CIP)
`Art Unit:
`Prior application information:
`Examiner
`For CONTINUATION OF DIVISIONAL APPSonly: The entire disclosure of the prior application, from which an oath or declaration Is supplied
`under Box 5b, is considered a part of the disclosure of the accompanying continuation or divisional application and is heraby incorporated by
`reference. The incorporation can only be relied upon when a portion has been inadvertently omitted from the submitted application parts.
`19. CORRESPONDENCE ADDRESS
`
`
`BI Customer Number
`
`
`OR
`(1 Correspondence address below
`
`
`
`
`
`
` February 23, 2004
`OTLyefg—
`
`
`
`
`021673-000210US
`UTILITY
`
`Tsividis, Yannis
`PATENT APPLICATION
`
`
`
`
`
`coO
`POWERDISSIPATION REDUCTION
`Title
`TRANSMITTAL —
`
`
`
`IN WIRELESS TRANSCEIVERS
`
`
`
`
`
`(Only for new nonprovisional applications under 37 CFR 1.53(b)) Express Mail Label No.|EV 369 118 824 US
`
`
`
`Mail Stop Patent Application
`
`
`Commissionerfor Patents
`APPLICATION ELEMENTS
`
`ADDRESS TO
`poBox 1480
`
`
`
`See MPEP chapter 600 concemingutility patent application contents.
`Alexandria, VA 22313-1450
`
`
`
`
`7. LJ] CD-ROM or CD-Rin duplicate,large table or
`Fee Transmittal Form (e.g., PTO/SB/17)
`
`(Submit an original and a duplicate for fee processing)
`Computer Program (Appendix)
`2.
`EQ Applicant claims small entity status.
`8. Nucleotide and/or Amino Acid Sequence Submission
`See 37 CFR 1.27.
`(if applicable, all necessary)
`[Total Pages
`LQ Specification
`a. J Computer Readable Form (CRF)
`(preferred arrangementsetforth below)
`- Descriptivetitle of the Invention
`-
`Cro:
`f
`lication.
`“StatementRegardingFedsponsoredR& D
`+ Reference to sequencelisting, a table,
`or a computer pragramlisting appendix
`- Background of the Invention
`- Brief Summary ofthe invention
`- Brief Description of the Drawings{ if filed)
`- Detailed Description
`- Claim(s)
`- Abstract of the Disclosure
`
`
`
`
`
`
`
`
`3.
`
`25
`
`|]
`
`_
`
`>
`
`Address
`
`60142384 vi
`
`13.0)
`14. K]
`
`15.0]
`
`16.
`
`J. Matthew Zigmant
`
`Registration No. (Attomey/Agent)
`L a)
`
`IPR2024-00816
`Apple EX1002 Page1
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 1
`
`IPR2023-00817
`Theta EX2019
`
`

`

`FEE TRANSMITTAL
`for FY 2004
`
`= SE
`ee,
`
`PTO/SB/17 (10-03)
`
`2
`Effective 10/01/2003. Patent fees are subject to annual revision. First Named Inventor|Tsividis, Yannis
`
`
`
`[X] Applicantclaims smallentity status. See 37 CFR 1.27
`
`TOTAL AMOUNTOF PAYMENT | Attorney DacketNo.|021673-000210US($) 604
`
`
`
`METHOD OF PAYMENT(checkail that apply)
`:
`FEE CALCULATION(continued
`CJ Credit Card CL] Money Order CI Other LC] None
`3. ADDITIONAL FEES
`C Check
`Ri Deposit Account:
`:
`Deposit
`Account
`
`Number Eee
`
`20-1430
`
`Fee Description
`
`Surcharge-latefilingfeeoroath
`
`65
`
`25
`
`Surcharge- late provisionalfiling fee or
`cover sheet.
`Non-English specification
`Forfiling a request for reexamination
`Requesting publication of SIR prior to
`Examineraction
`Requesting publication of SIR after
`Examineraction
`Extensionfor reply within first month
`Extension for reply within second month
`
`SUBTOTAL (3)
`
`Deposit
`ownsend and Townsend and Crew LLP
`Recount
`,
`heck all
`'
`he Di
`@
`Directoris authorized to:
`(check all hat apply)
`baa Charge fee(s) indicated below & Credit any overpayments
`Charge any additional fee(s) or any underpaymentof fee(s)
`se
`oO Charge fee(s) indicated below, exceptforthefiling fee
`o the above-identified deposit account.
`
`FEE CALCULATION
`1. BASIC FILING FEE
`‘
`Large Entity
`[Small Entity
`Feo Paid
`Feo Description
`Fee
`Fee
`‘eo
`Fee
`ode ($) Code=($) Extensionfor reply within fifth month
`
`
`1001
`770
`2001
`385
`Utility filing fee
`Notice of Appeal
`pes
`
`
`
`1002 2002=170340 Design filing fee Filing a brief in support of an appeal
`
`4003
`530
`2003
`265
` Plantfiling fee [|
`Requestfor oral hearing
`1004
`770
`2004
`385
`Reissuefiling fee
`.
`Petition to institute a public use
`1005
`160
`2005
`80
`Provisionalfiling fee
`proceeding
`Petition to revive — unavoidable
`.
`.
`Petition to revive — unintentional
`Utility issue fae (or reissue)
`Design issue fee
`Plant issue fee
`Petitions to the Commissioner
`Petitions related to provisional
`_ applications
`Submissionof Information Disclosure
`Stmt
`
`130
`2,520
`920°
`
`1,840*
`
`55
`210
`
`475
`740
`
`Extensionfor reply within third month
`Extension for reply within fourth month
`
`SUBTOTAL(1)
`
`385
`
`KS
`
`.
`2. EXTRA CLAIM FEES FOR UTILITY AND REISSUE
`Fee from
`below
`
`Extra Claims
`
`Fee Paid
`
`Total Claims
`
`independent
`laims
`
`:
`
`3" =
`
`8
`
`ps
`
`No
`
`Multiple
`Dependent
`
`Large Entity
`Fee
`Fee
`code
`(8)
`n2z0z2
`18
`1201
`86
`4203
`290
`1204
`86
`41205
`18
`
`mail Entity
`Fee
`Fee
`ode
`($)
`2202—=««g
`220143
`2203
`145
`2204
`43
`2205
`9
`
`-
`
`Recording each patent assignment per
`property (times numberofproperties)
`Filing a submissionafterfinalrejection
`Fee Description
`ad eeect
`onto’
`Claims in excess of20
`or each additional invention to be
`Independentclaims in excess of 3
`mamn ecCFRS‘rene
`Multiple dependentclaim,if not paid
`equest
`for Continued
`Examination
`** Reissue independent claims
`(RCE)
`overoriginal patent
`Requestfor expedited examination
`”
`ims
`i
`q
`pt
`Reissue claims in excess of 20
`of a design application
`and overorigina! patent
`Other fee (Specify) menemmeeme—eennneceeeneeeeeceneence
`SUBTOTAL(2)
`
`
`
`
`
`“or greater: For Reissues,seeabovenumber previously paid, if —_
`
`
`OFBUMDEEPrBVIQUSIY PAID,&GPBBIGE, FOF INGISSUBS, $89 ADOVE *Reduced by Basic Filing Fee Paid
`
`
`SUBMITTED BY
`
`
`
`650-326-2400
`
`Name(Print/Type)
`
`
`
`
`
`
`nnLL 2OW~—3TegZe
`
`Signature
`February 23, 2004
`
`
`
`
`WARNING:Information on this fora
`mdyve; ame public. Credit card information should not be
`included on this form. Provide crAdif
`cag information and authorization on PTO-2038.
`
`
`J. Matthew Zigmant (Attomey/Agent)_| 44,005Registration hig Telephone
`
`
`
`60142388 v1
`
`IPR2024-00816
`Apple EX1002 Page 2
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 2
`
`IPR2023-00817
`Theta EX2019
`
`

`

`
`NONPUBLICATION REQUEST
`CERTIFICATION
`
`UNDER
`35 U.S.C. 122(b)(2)(B)(i)
`
`
`
`
`
`POWERDISSIPATION REDUCTION IN WIRELESS TRANSCEIVERS
`
`PTO/SB/35 (02-01)
`
`
`
`
`
`application (35 U.S.C. 122(b)(2)(B)(iii)).
`
`If applicant subsequently files an application directed to the invention disclosed in the attached
`application in another country, or under a multilateral
`international agreement,
`that requires
`publication of applications eighteen monthsafterfiling, the applicant must notify the United States
`Patent and Trademark Office of suchfiling within forty-five (45) days after the date of the filing of
`such foreign or international application. Failure to do so will result in abandonmentof this
`
`021673-000210US
`Atty Docket Number
`
`
`
`
`| hereby certify that the invention disclosedin the attached application has not andwill not be the subject
`of an application filed in another country, or under a multilateral agreement, that requires publication at
`eighteen monthsafterfiling.
`
`| hereby request that the attached application not be published under 35 U.S.C. 122(b).
`
`February 23, 2004
`Date
`
`Reg. No. 44,005
`
`J. Matthew Zigmant
`Typed or printed name
`
`This request must be signed in compliance with 37 CFR 1.33(b) and submitted with the
`application upon filing.
`
`If applicant rescinds a request that
`Applicant may rescind this nonpublication request at any time.
`an application not be published under 35 U.S.C. 122(b), the application will be scheduled for
`publication at eighteen months from the earliest claimedfiling date for which a benefit is claimed.
`
`60142391 v1
`
`IPR2024-00816
`Apple EX1002 Page 3
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 3
`
`IPR2023-00817
`Theta EX2019
`
`

`

`Attorney Docket No.: 021673-000210US
`
`PATENT APPLICATION
`
`POWERDISSIPATION REDUCTIONIN WIRELESS TRANSCEIVERS
`
`Inventor:
`
`Yannis Tsividis, a citizen of Greece, residing at
`410 Riverside Drive, Apt. 52A
`New York, NY 10025
`
`.
`
`Assignee:
`
`Theta MicroelectronicsInc.
`2232 North First Street
`San Jose, CA, 95131
`
`Entity:
`
`Small
`
`TOWNSEND and TOWNSEND and CREW LLP
`Two Embarcadero Center, 8" Floor
`San Francisco, California 94111-3834
`Tel: 650-326-2400
`
`IPR2024-00816
`Apple EX1002 Page 4
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 4
`
`IPR2023-00817
`Theta EX2019
`
`

`

`Attorney Docket No.: 021673-000210US
`
`PATENT
`
`POWERDISSIPATION REDUCTION IN WIRELESS TRANSCEIVERS
`
`CROSS-REFERENCES TO RELATED APPLICATIONS
`
`This application claimsthe benefit of United States provisional application number
`[0001]
`60/451,229, filed March 1, 2003, which is incorporated by reference.
`[0002]
`This application is related to United States provisional application number 60/451,230,
`
`filed March 1, 2003, which is incorporated by reference.
`
`BACKGROUND
`
`[0003]
`The present invention relates to powerdissipation reduction techniques for electronic
`circuits, for example wireless transceiver integrated circuits.
`[0004] Wireless networking is quickly becoming ubiquitous, as desktop, notebook, and
`handheld computers are connected to share Internet access and-files. Wireless networking cards
`compatible with PCMCIA and compactflash form factors are popular for laptops and handhelds
`respectively, particularly as mobile users connect to the Internet on the road at coffee shops,
`hotels, and airports.
`.
`[0005] A downside ofthis connectivity is a corresponding drain on batterylife, especially for
`these portable devices. The power consumed by a wireless transmitter and receiver reduces the
`usefulness of a device and sends a user on a huntfor anelectrical outlet for recharging.
`
`[0006] One reason whythis powerdrainis high is that electronic circuits are typically
`
`designed to function properly under worst-case operating conditions. For a wireless transceiver,
`the worst case condition is when a desired signal reception strength is low, while other
`transceivers or nearby electronic equipment generate interfering signals and other spuriousnoise.
`[0007} But a wireless transceiver does not always operate in these worst-case conditions. For
`
`example, a base station, router or access point may be nearby suchthat the received signalis
`
`strong. Also, there may be no interfering signals, or they maybe relatively weak. In these
`
`situations, receiver circuit currents can be reduced below what is necessary for the worst case
`condition. If this is done, power dissipation is reduced, and battery life is increased.
`[0008]
`Thus, what is neededare circuits and methodsthat can adaptto a better-than-worst-case
`condition and reduce circuit currents and therefore powerdissipation accordingly.
`
`IPR2024-00816
`Apple EX1002 Page 5
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 5
`
`IPR2023-00817
`Theta EX2019
`
`

`

`SUMMARY
`[0009] Accordingly, embodimentsofthe present invention provide methods andcircuits for
`reducing powerdissipation in wireless transceivers and other electronic circuits and systems.
`-
`
`Embodiments of the present invention use bias current reduction, impedancescaling, gain, and
`
`other dynamic changeseither separately or in combination to reduce powerdissipation in
`
`response to better-than-worst case conditions. For example, bias currents are reduced in
`
`responseto a need for reduced signal handling capability, impedancesare scaled thus reducing
`
`required drive and other bias currents in responseto a strong received signal, or gain is varied
`
`and impedancesare scaled in response to a low received signal in the presence of no or weak
`
`interfering signals. Alternately, currents may start low and be increased in response to worse-
`than-best-case conditions, or they maystart at a point in between and vary up or down. These
`
`variations may be madeto electronic systems generally, and are particularly suited and discussed
`
`below in the context of a wireless transceiver that may be used in networking devices, cellular
`
`telephones, and other wireless systems.
`[0010] An exemplary embodimentofthe present invention provides a methodofreceiving a
`
`signal using an integrated circuit. The integrated circuit includes a signal path having a low-
`
`noise amplifier configured to receive the signal, a mixer having an input coupled to an output of
`the low-noise amplifier, and a low-passfilter having an input coupled to an output of the mixer.
`The methoditself includes determiningafirst signal strength at a first node in the signal path in
`
`the integrated circuit and dynamically changing an impedance of a componentin the signal path
`based onthefirst signal strength.
`[0011] A further exemplary embodimentofthe present invention provides a method of
`receiving a signal using an integrated circuit. The integrated circuit includes a signal path having
`a low-noise amplifier configured to receive the signal, a mixer having an input coupled to an
`output of the low-noise amplifier, and a low-passfilter having an input coupled to an output of |
`the mixer. The methoditself includes determininga first signal strength at a first node in the
`signal path in the integrated circuit and dynamically changinga bias currentin the signal path
`
`based on thefirst signal strength.
`(0012] Another exemplary embodiment of the present invention provides a method of
`receiving a signal using an integrated circuit. The integrated circuit includes a signal path having
`
`IPR2024-00816
`Apple EX1002 Page 6
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 6
`
`IPR2023-00817
`Theta EX2019
`
`

`

`a first circuit and a secondcircuit having an input coupledto an output ofthe first circuit. The
`
`methoditself includes determininga first signal strength at a first node in the signal path in the
`integrated circuit. The first node is beforethefirst circuit in the signal path. The method further
`includes dynamically changing a gain ofthe first circuit based on thefirst signal strength and »
`dynamically changing an impedanceof a componentin the second circuit based onthefirst
`signal strength.
`[0013]
`Still a further exemplary embodimentofthe present invention provides a wireless
`"transceiver integrated circuit including a receiver having a signal path, thesignal path including a
`low-noise amplifier, a mixer having an input coupled to an output of the low-noise amplifier, and
`
`a low-passfilter having an input coupled to an output of the mixer, as well asafirst signal
`
`strength indicatorcircuit coupled to the signal path and configured to determinea first signal
`
`strength. An impedanceinthesignal path is configured to be dynamically adjusted in response
`
`to the first signal strength.
`
`[0014] Yet a further exemplary embodimentofthe present invention provides a wireless
`transceiverintegrated circuit. This integrated circuit includes a receiver comprising a signal
`path, the signal path having a low-noise amplifier, a mixer having an input coupled to an output
`
`of the low-noise amplifier, and a low-passfilter having an input coupled to an output of the
`
`mixer, as well as a first signal strength indicator circuit coupled to the signal path, and
`
`configured to determinea first signal strength. A bias current in the signal path is configured to
`be dynamically adjusted in response to the first signal strength.
`[0015] Another exemplary embodimentof the present invention provides a wireless
`transceiver integrated circuit. This circuit includesa receiver comprising a signal path, the signal
`path havingafirst circuit; and a secondcircuit having an input coupled to an outputofthefirst
`circuit; as well as a first signal strength indicatorcircuit coupled to the signal path, and
`configured to determinea first signal strength. A gain ofthefirst circuit is configured to be
`
`dynamically adjusted in response to thefirst signal strength, and an impedancein the second
`
`circuit is configured to be dynamically adjusted in response tothe first signal strength.
`
`[0016] A.better understanding of the nature and advantagesof the present invention may be
`
`gained with reference to the following detailed description and the accompanying drawings.
`
`IPR2024-00816
`Apple EX1002 Page 7
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 7
`
`IPR2023-00817
`Theta EX2019
`
`

`

`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0017]
`
`Figure 1 is a block diagram ofa wireless transceiver that may benefit by incorporation
`
`of embodimentsof the present invention;
`
`Figures 2A and 2Billustrate examplesof desired and interfering signals and noise that
`[0018]
`maybereceived by a circuit in awireless receiver;
`
`[0019]
`
`Figure 3 illustrates what can occur as a maximum signal handling capability is reduced
`
`in the worst-case signal condition;
`
`{0020]
`
`Figure 4 illustrates a portion of a receiver consistent with an embodimentofthe present
`
`invention;
`
`| Figure 5 illustrates the relationship between a required bias current and a given output
`[0021]
`signal for a representative circuit;
`[0022]
`Figure 6 is an example of howa circuit's impedances may bescaled toreduce drive
`currents, and depending on the circuit configuration used, to reduce associated bias currents as
`well;
`|
`
`Figure 7 illustrates how gain maybeinserted in a signal path to improvea circuit's
`[0023]
`signal to noise ratio;
`[0024]
`Figures 8A-8D illustrate some ofthe possible power saving techniquesthat may be .
`
`used when received desired and interferer signals are all at a low powerlevel;
`
`[0025]
`
`Figures 9A-9Cillustrate one of the possible power saving techniques that may be used
`
`whena received desired signal is strong whileall interfering signals are at a low powerlevel;
`
`[0026]
`
`Figures 10A-10Cillustrate one of the possible power saving techniques that may be
`
`used when received desired and interferer signals are all at a high powerlevel;
`
`[0027]
`
`Figures 11A-11D illustrate one of the possible power saving techniques that may be
`
`used when a received desired signal is weak while one or moreinterfering signals are strong;
`
`[0028]
`
`Figure 12 is a summaryillustrating four different input conditions and someofthe
`
`appropriate power-saving changes that may be madein responseto those conditions;
`
`[0029]
`
`Figure 13 shows how power maybesavedas a function of time by employing one or
`
`moreof the power saving methods consistent with embodiments ofthe present invention;
`[0030]
`Figure 14 is a block diagram ofa portion of a receiver consistent with an embodiment
`of the present invention; and
`
`IPR2024-00816
`Apple EX1002 Page 8
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 8
`
`IPR2023-00817
`Theta EX2019
`
`

`

`[0031]
`
`Figure 15 is a block diagram ofa portion of a transmitter consistent with an
`
`embodimentofthe present invention.
`
`DESCRIPTION OF EXEMPLARY EMBODIMENTS
`
`Figure 1 is a block diagram of a wireless transceiver that may benefit by incorporation
`[0032]
`of embodiments ofthe present invention. This wireless transceiver may be designed to send and
`receive signals consistent with the IEEE 802.1 1a, 802.1 1b, 802.11g, or other signaling standard
`or combination of standards. This figure, as with all the included figures, is shown for
`illustrative purposes only and doesnotto limit either the possible embodimentsofthe present
`
`invention orthe claims.
`
`[0033] There are three main portions ofthis transceiver circuit, a receiver, transmitter, and
`
`synthesizer. This transceiver may be completely orpartially integrated on a semiconductorchip,
`or it maybeintegrated onto multiple integrated circuits. In a specific embodiment, the circuitry
`
`bounded by dashedline 100is integrated on a single chip coupled to one or more external
`
`componentsor circuits. The integrated circuit or circuits forming this wireless transceiver may
`
`incorporate various integrated circuit devices such as a bipolar, CMOS, or BiCMOSdevices
`
`madeusinga silicon, silicon-germanium (SiGe), gallium arsenide or other III-V process, or other
`
`manufacturing process. Embodiments ofthe present invention mayalso be applicable to circuits
`manufactured using nanotechnology processing.
`[0034] The receiver includesa signal path formed by low-noise amplifier 102, I and Q mixers
`104 and 106, low passfilters 108 and 110, and baseband amplifiers 114 and 116. Othercircuitry
`
`in the receiver includes received strength indicator 122, automatic gain control circuit 166,
`
`baseband gain control circuit 120, tuning circuit 112, and offset cancellation circuit 118.
`[0035]
`The transmitter includes input up-converter mixers 124 and 126, summing node 176,
`
`which may be conceptualrather than an actualcircuit, transmit variable gain amplifier 128, and
`
`poweramplifier 130..
`
`[0036] The synthesizer includes a voltage-controlled oscillator 148, which drives I and Q
`
`buffers 154 and 152, prescaler 156, reference clock buffer 142 and divider 158, phase-frequency
`
`detector 160, charge pump 162, andloopfilter 146, which in a specific embodimentis formed by
`external components.
`
`IPR2024-00816
`Apple EX1002 Page 9
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 9
`
`IPR2023-00817
`Theta EX2019
`
`

`

`[0037]
`
`Signals are received on an antenna, not shown,and typically pass through an RF switch
`
`and bandpassfilter before being received by the low-noise amplifier 102 on line 101. The low
`
`noise amplifier gains the received signal and providesit to quadrature mixers 104 and 106. I and
`Q mixers 104 and 106 down-convert the received signal to baseband by multiplying them with
`quadrature versionsofthe oscillator signal provided by buffers 152 and 154. This down
`
`conversion also produces a high frequency component at a frequencythat is equal to the sum of
`
`the frequencies of the received signal and the VCO. This unwantedsignalis filtered by low pass
`‘filters 108 and 110, which in turn drive baseband amplifiers 114 and 116. The outputs of
`baseband amplifiers 114 and 116 are typically converted to digital signals by analog-to-digital
`converters at the front end of a digital signal processing block.
`[0038]
`In the transmit mode,I and Q versionsofthe signal to be transmitted are provided on
`
`lines 121 and 123 to up-convert mixers 124 and 126. These up-convert mixers multiply the I and
`Q portions ofthe transmit signal by quadrature versions of the VCO signal provided by buffers .
`152 and 154. The outputsof the up-convert mixers 124 and 126 are summed, and amplified by -
`transmit VGA 128, which in turn drives power amplifier 130. The output of power amplifier 130
`
`is typically filtered, and passesthrough the RF switch to the antennafor transmission.
`
`[0039] A reference clock is received and buffered by the reference buffer 142. The VCO
`generates quadrature oscillatory signals that are divided by prescaler 156. The reference clock is
`
`typically generated by a crystal or other stable periodic clock source. The phase-frequency
`
`detector 116 comparesthe phase or frequency (depending on whether the synthesizer is tracking:
`
`or acquiring the correct frequency) of the divided VCO signal and the reference clock, or a
`
`divided version ofthe reference clock, and generates an error signal, which drives the charge
`pump 162. The output signal ofthe charge pump 162is filtered by the loop filter 146, which is
`commonlya lead-lag filter, and which provides a tuning or correction signal to the VCO 148.
`[0040] Embodiments of the present invention may be used to reduce the powerdissipation of
`one or more ofthese included circuits. For example, the powerdissipation in the low-noise
`
`amplifier 102, down-convert mixers 104 and 106,low passfilters 108 and 110, or baseband |
`amplifiers 114 and 116 may be optimized. Also, power dissipation in up-convert mixers 124
`_ 126, variable gain amplifier 128, and power amplifier 130 may also be optimized. Similarly,
`VCO148 and prescaler 156 currents may be adjusted. Embodimentsof the present invention
`
`IPR2024-00816
`Apple EX1002 Page 10
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 10
`
`IPR2023-00817
`Theta EX2019
`
`

`

`mayalso be applied in other circuits which maybeincludedin other integrated circuit receivers,
`transmitters, transceivers, or other electronic circuits or systems.
`
`[0041] Whenareceiveris actively receiving a desired signal, each block in the signal path has
`
`at its input the desired signal as well as noise and possibly interfering signals. The desired signal
`
`is the useful, information-carrying portion of a received signal. The noise maybe thermal, shot,
`
`or other noise generated on the integrated circuit, in addition to received noise generated by
`
`sources external to the chip. The noise at the input of a block maybereferredto as the
`
`equivalent input noise. The interfering signal or signals, or interferers, may be generated by
`
`similar transceivers, or other electrical equipment, circuits, or systems.
`[0042]
`Figures 2A and 2B illustrate examplesof desired signals, interferers, and noise that may ©
`be received by one of the various circuits in a wireless receiver. In each ofthesefigures, the
`signal strength is plotted along a Y-axis 204 or 254 as a function of frequency along an X-axis
`202 or 252. In the example of Figure 2A, a received desired signal 206 is large in comparison to
`
`interfering signals 208 and 210. In these examples, twointerfering signals are shown for
`illustrative purposes, though there maybe no suchsignals, one such signal, or more than two
`such signals in the frequency range of interest. Also, while for these examples theinterferers are
`
`shownas beingat a higher frequency than the desired signal, there may be one or more
`interferers at higher or lower frequencies as the desired signal. In this specific example, the
`acceptable noise floor 214 is relatively high, while maximum signal handling capability Smax
`
`212 (that is the maximum signal powerthat can be handled with an acceptably low distortion)
`needs only to be high enough to accommodatethe desired signal. For this specific example, the
`
`circuit receiving this input spectrum only requires a relatively small dynamic range for proper
`
`operation,that is the range between Smax 212 and the noisefloor 214 is relatively small.
`[0043] Conversely, in the example shownin Figure 2B, the desired signal 256 is relatively
`weak comparedto the large interferers 258 and 260.
`In this example, the noise floor 264 should
`be relatively low so as to prevent an unacceptablelevel of error in the recovery the desired signal
`256. The maximum signal handling capability Smax 262 should be relatively high to
`
`accommodatethe large interferers in order to avoid the creation of intermodulation products as
`described below. Accordingly, in this specific example, the circuit receiving this input spectrum
`should have a large dynamicrange, particularly in comparison to the example of Figure 2A.
`
`IPR2024-00816
`Apple EX1002 Page 11
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 11
`
`IPR2023-00817
`Theta EX2019
`
`

`

`[0044]
`
`It should be noted that the noise level or noise floors shownin these and the other
`
`—
`
`included figures is the noise density integrated over the bandwidth ofinterest. For simplicity and
`
`comparison, this level is shown as a horizontalline, and is not meant to imply noise density.
`
`[0045] Often in wireless receivers, a circuit at different times will receive an input spectrum .
`
`similar to those shownin Figures 2A and 2B. The input spectrum of Figure 2B is generally
`
`considered the worst-case input signal, and typical design methodology involves designing a
`
`receiverfor this condition, specifically the weakest desired signal accompaniedby largest
`interference level. Circuit impedancesand currentsare set such that the noise floor 264is
`sufficiently low for an acceptable bit-error rate, while bias currents are set sufficiently high for
`the required Smax 262.
`|
`[0046] Conversely, the input spectrum in Figure 2A is that of the best-case inputsignal,
`specifically, a robust desired signal accompanied bynoor low-levelinterferers. In this case, the
`noise floor 214 maybe allowedto rise, while the maximum signal handling capability Smax 212
`may be reduced. Whenthis is done, the receiver circuit may save significant power. For
`
`example, the circuit's impedances may be increased, thus reducing required drive currents.-
`
`Similarly, bias currents may be lowered, thus reducing the maximumsignal in handling
`
`capability.
`[0047]
`The minimum powerdissipation for a circuit is proportional to the required maximum
`signal-to-noise ratio, which is the ratio between Smax 212 or 262 and N 214 and 264. Thus, a
`circuit receiving an input similar to the one shown in Figure 2A can dissipate less power than
`one receiving the input as shown in Figure 2B, while still achieving an acceptable bit-error rate.
`[0048]
`Figure 3 illustrates what can occur when the maximumsignal handling capability Smax
`314 is reduced in the worst-case condition, that is when a weak desired signal 306 is
`accompanied by large interferers 310 and 312. Again,signal strength is plotted along a Y-axis
`
`304 as a function of frequency along X-axis 302. In this specific example, Smax 314 is reduced
`
`below the peak levels of the interferers 310 and 312. Since Smax is low, the circuit cannot
`handle the interferers linearly. The resulting nonlinearities lead to a mixing ofthe interferers and
`the creation of intermodulation products 308 (for example, a third-order intermodulation
`
`distortion, IM3), one of which in this example occurs at the same frequencyas the desired signal
`
`306. As can be seen, if the intermodulation products 308 become excessive, the received signal
`
`bit error rate may becomeexcessive, and the desired signal 306 maybe lost. Accordingly, while
`
`IPR2024-00816
`Apple EX1002 Page 12
`IPR2023-00817
`Theta EX2019
`
`IPR2024-00816
`Apple EX1002 Page 12
`
`IPR2023-00817
`Theta EX2019
`
`

`

`Smax may be lowered even under some unfavorable conditions in order to reduce power, care
`should be taken to avoid corruption ofthe received desired signal.
`.
`[0049]
`Figure 4 illustrates a portion of a receiver consistent with an embodimentof the present
`
`invention.
`
`Includedis a filter 430. An optional gain element 420 is placedin front ofthe filter
`
`430 in order to increase signal levels. Signal strength indicator circuits 440 and 450 are
`
`connected to input line 410 and output line 460. In this specific example, the input signal
`spectrum online 410 is shown asdesired signal 412 andinterferers 414 and 416. The signal
`
`spectrum at the output line 460 is shownas desired signal 462 and interferers 464 and 466. The
`
`signal strength indicators 440 and 450 donotprovide information asto the relative sizes of the
`desired and interfering signals. Rather, a cumulative signal level is provided at their outputs.
`
`For example,the first signal strength indicator 440 outputs a level corresponding to the sum of
`
`desired signal 412 andinterfering signals 414 and 416, while the second signal strength indicator
`
`450 provides a signal level corresponding to the sum of desired signal 462 andinterfering signals
`
`464 and 466.
`
`In this specific example, the gain of the gain andfilter circuit combinationsis
`
`shown.as approximately one, while the interfering signals 414 and 416 signallevels are reduced.
`[0050] A comparisonofthe signal levels provided by the signal strength indicators 440 and
`
`450 indicates that much of the combined received signal on line 410 has beenfiltered.
`Accordingly, it maybe deduced that large interfering signals presentat the input are being
`filtered by the filter 4