`____________________________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________________________
`
`SAMSUNG ELECTRONICS CO., LTD.,
`Petitioner
`
`v.
`
`NETWORK SYSTEM TECHNOLOGIES, LLC,
`Patent Owner
`
`U.S. PATENT NO. 8,086,800
`
`Case IPR2024-00339
`
`PETITION FOR INTER PARTES REVIEW
`UNDER 35 U.S.C. § 312 AND 37 C.F.R. § 42.104
`
`
`
`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
`
`I.
`II.
`
`TABLE OF CONTENTS
`
`INTRODUCTION ......................................................................................... 1
`BACKGROUND OF THE ’800 PATENT .................................................. 1
`A.
`Claims .................................................................................................... 2
`B.
`Overview of the ’800 Patent .................................................................. 2
`C.
`Prosecution History of the ’800 Patent ................................................. 3
`IDENTIFICATION AND BASIS OF CHALLENGE ............................... 3
`III.
`IV. OVERVIEW OF THE ASSERTED PRIOR ART ..................................... 5
`A.
`Rădulescu .............................................................................................. 5
`B.
`Bahadiroglu ........................................................................................... 6
`C.
`Petersen.................................................................................................. 6
`D.
`Rădulescu-WO ...................................................................................... 7
`LEVEL OF ORDINARY SKILL IN THE ART ........................................ 8
`V.
`VI. CLAIM CONSTRUCTION .......................................................................... 8
`VII. THE CHALLENGED CLAIMS ARE UNPATENTABLE ....................... 9
`A. Ground 1: Claims 1, 2, 4, 6, 8–12, 13, and 18–21 Are Rendered
`Obvious by Rădulescu in view of Bahadiroglu..................................... 9
`1. Motivation to Combine Rădulescu and Bahadiroglu .................. 9
`2.
`Claim 12 ....................................................................................13
`3.
`Claim 13 ....................................................................................35
`4.
`Claim 18 ....................................................................................36
`5.
`Claim 19 ....................................................................................37
`6.
`Claim 20 ....................................................................................38
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`B.
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`7.
`Claim 21 ....................................................................................39
`Claim 10 ....................................................................................39
`8.
`Claim 1 ......................................................................................41
`9.
`10. Claim 2 ......................................................................................42
`11. Claim 4 ......................................................................................43
`12. Claim 6 ......................................................................................43
`13. Claim 8 ......................................................................................44
`14. Claim 9 ......................................................................................45
`15. Claim 11 ....................................................................................46
`Ground 2: Claims 1, 2, 4, 6, 8–12, 13, and 18–21 Are Rendered
`Obvious by Rădulescu in view of Petersen .........................................47
`1. Motivation to Combine Rădulescu and Petersen ......................47
`2.
`Claim 12 ....................................................................................50
`3.
`Claim 13 ....................................................................................56
`4.
`Claim 18 ....................................................................................56
`5.
`Claim 19 ....................................................................................56
`6.
`Claim 20 ....................................................................................56
`7.
`Claim 21 ....................................................................................56
`8.
`Claim 10 ....................................................................................56
`9.
`Claim 1 ......................................................................................58
`10. Claim 2 ......................................................................................58
`11. Claim 4 ......................................................................................58
`12. Claim 6 ......................................................................................59
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`C.
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`13. Claim 8 ......................................................................................59
`14. Claim 9 ......................................................................................59
`15. Claim 11 ....................................................................................59
`Ground 3: Claims 1, 2, 4, 6, 8–12, 13, and 18–21 Are Rendered
`Obvious by Rădulescu in view of Bahadiroglu and Rădulescu-
`WO ......................................................................................................60
`1. Motivation to Combine Rădulescu, Bahadiroglu, and
`Rădulescu-WO ..........................................................................60
`Claim 12 ....................................................................................61
`2.
`Claim 13 ....................................................................................64
`3.
`Claim 18 ....................................................................................64
`4.
`Claim 19 ....................................................................................64
`5.
`Claim 20 ....................................................................................64
`6.
`Claim 21 ....................................................................................65
`7.
`Claim 10 ....................................................................................65
`8.
`Claim 1 ......................................................................................66
`9.
`10. Claim 2 ......................................................................................67
`11. Claim 4 ......................................................................................67
`12. Claim 6 ......................................................................................67
`13. Claim 8 ......................................................................................67
`14. Claim 9 ......................................................................................67
`15. Claim 11 ....................................................................................68
`D. Ground 4: Claims 1, 2, 4, 6, 8–12, 13, and 18–21 Are Rendered
`Obvious by Rădulescu in view of Petersen and Rădulescu-WO ........68
`
`iii
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`1. Motivation to Combine Rădulescu, Petersen, and
`Rădulescu-WO ..........................................................................68
`Claim 12 ....................................................................................69
`2.
`Claim 13 ....................................................................................70
`3.
`Claim 18 ....................................................................................70
`4.
`Claim 19 ....................................................................................70
`5.
`Claim 20 ....................................................................................70
`6.
`Claim 21 ....................................................................................70
`7.
`Claim 10 ....................................................................................70
`8.
`Claim 1 ......................................................................................72
`9.
`10. Claim 2 ......................................................................................72
`11. Claim 4 ......................................................................................72
`12. Claim 6 ......................................................................................72
`13. Claim 8 ......................................................................................72
`14. Claim 9 ......................................................................................73
`15. Claim 11 ....................................................................................73
`Secondary Considerations of Non-Obviousness .................................73
`E.
`VIII. PTAB DISCRETION SHOULD NOT PRECLUDE
`INSTITUTION .............................................................................................74
`A. Discretionary Denial Under 35 U.S.C. § 325(d) is Not
`Warranted ............................................................................................74
`Discretionary Denial Under 35 U.S.C. § 314(a) is Not
`Warranted ............................................................................................76
`IX. MANDATORY NOTICES .........................................................................77
`A.
`Real Party-In-Interest ..........................................................................77
`
`B.
`
`iv
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`B.
`Related Matters ....................................................................................78
`Counsel Information ............................................................................78
`C.
`Service Information .............................................................................79
`D.
`PAYMENT OF FEES .................................................................................79
`X.
`XI. CERTIFICATION .......................................................................................79
`XII. CONCLUSION ............................................................................................79
`Claims Listing Appendix .......................................................................................81
`
`
`
`
`
`v
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`TABLE OF AUTHORITIES
`
` Page(s)
`
`Cases
`Advanced Bionics, LLC v. Med-El Elektromedizinische Geräte GmbH,
`IPR2019-01469, Paper 6 (P.T.A.B. Feb. 13, 2020) ............................................ 74
`Apple Inc. v. Fintiv, Inc.,
`IPR2020-00019, Paper 11 (P.T.A.B. Mar. 20, 2020) ................................... 76, 77
`Becton, Dickinson, & Co. v. B. Braun Melsungen AG,
`IPR2017-01586, Paper 8 (P.T.A.B. Dec. 15, 2017) ........................................... 74
`Bowtech Inc. v. MCP IP, LLC,
`IPR2019-00383, Paper 14 (P.T.A.B. Aug. 6, 2019) ........................................... 75
`CommScope Techs. LLC v. Dali Wireless, Inc.,
`IPR2022-01242, Paper 23 (Feb. 27, 2023) ......................................................... 77
`Fasteners for Retail, Inc. v. RTC Indus., Inc.,
`IPR2019-00994, Paper 9 (P.T.A.B. Nov. 5, 2019) ............................................. 74
`Hulu, LLC v. Sound Innovations, LLC,
`IPR2018-01039, Paper 29 (P.T.A.B. Dec. 20, 2019) ........................................... 4
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) (en banc) ............................................................ 8
`Sotera Wireless, Inc. v. Masimo Corp.,
`IPR2020-01019, Paper 12 (P.T.A.B. Dec. 1, 2020) ........................................... 76
`Thryv, Inc v. Click-To-Call Techs., LP,
`140 S. Ct. 1367 (2020) ........................................................................................ 77
`Wyers v. Master Lock Co.,
`616 F.3d 1231 (Fed. Cir. 2010) .......................................................................... 73
`Statutes
`35 U.S.C.
`§ 102 ...................................................................................................................... 3
`§ 102(a) ............................................................................................................. 3, 4
`
`vi
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`§ 102(b) ............................................................................................................. 3, 4
`§ 102(e) ................................................................................................................. 4
`§ 103 .................................................................................................................. 3, 5
`§ 112 .................................................................................................................... 22
`§ 112(6) ............................................................................................................... 23
`§ 311(b) ................................................................................................................. 4
`§ 314(a) ............................................................................................................... 76
`§ 315(e)(1) .......................................................................................................... 79
`§ 325(d) ............................................................................................................... 74
`§ 371 ...................................................................................................................... 2
`
`Other Authorities
`37 C.F.R.
`§ 42.10(b) ............................................................................................................ 79
`§ 42.15(a)(1) ....................................................................................................... 79
`§ 42.100(b) ............................................................................................................ 8
`
`
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`vii
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`
`
`Exhibit No.
`1001
`1002
`
`1003
`1004
`1005
`
`1006
`
`1007
`1008
`
`1009
`1010
`
`1011
`
`1012
`
`1013
`
`1014
`
`LIST OF EXHIBITS
`Description
`U.S. Patent No. 8,086,800 (“the ’800 Patent”)
`Declaration of Todd Mowry in Support of Petition for Inter
`Partes Review of U.S. Patent No. 8,086,800
`Curriculum Vitae for Todd Mowry
`Prosecution History of U.S. Patent No. 8,086,800
`Andrei Rădulescu et al., An Efficient On-Chip Network Interface
`Offering Guaranteed Services, Shared-Memory Abstraction, and
`Flexible Network Configuration, 2 PROC. DESIGN, AUTOMATION
`AND TEST IN EUR. CONF. & EXHIBITION 878 (2004) (“Rădulescu”)
`U.S. Patent Application Publication No. 2002/0186660 to Murat I.
`Bahadiroglu et al. (“Bahadiroglu”)
`U.S. Patent No. 5,434,872 to Brian Petersen et al. (“Petersen”)
`International Patent Publication No. WO 2004/034176 A2 to
`Rădulescu et al. (“Rădulescu-WO”)
`Axel Jantsch and Hannu Tenhunen, Networks on Chip (2003)
`Kees Goossens et al., Chapter 4: Guaranteeing the Quality of
`Services in Networks on Chip, NETWORKS ON CHIP, at 61–82
`(2003)
`Defs.’ Joint Opening Claim Construction Br., Network Sys.
`Techs., LLC v. Qualcomm Inc., No. 1:22-cv-1331, Dkt. 77 (E.D.
`Tex. Oct. 12, 2023)
`Amit Goel & William R. Lee, Formal Verification of an IBM
`CoreConnect™ Processor Local Bus Arbiter Core, PROCEEDINGS
`OF THE 37TH ANNUAL DESIGN AUTOMATION CONFERENCE 196–
`200 (2000)
`Luca Benini & Giovanni De Micheli, Networks on Chips: A New
`SoC Paradigm, 35 COMPUTER 70–78 (2002)
`Erik Jan Marinissen, Wrapper Design for Embedded Core Test,
`IEEE INT’L TEST CONFERENCE (ITC) 1–10 (2000)
`
`viii
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
`
`1015
`
`1016
`
`1017
`1018
`1019
`
`1020
`
`1021
`
`1022
`
`1023
`
`1024
`
`1025
`
`1026
`
`1027
`
`Terry Tao Ye et al., Packetization and Routing Analysis of On-
`Chip Multiprocessor Networks, J. SYS. ARCHITECTURE, Vol. 50,
`Issues 2-3, pp 81-104 (2004)
`Zhonghai Lu et al., Network-on-Chip Assembler Language,
`RETRIEVED FROM INSTITUTE OF MICROELECTRONICS AND
`INFORMATION TECHNOLOGY, ROYAL INSTITUTE OF TECHNOLOGY
`(KTH) (2003); available at
`https://people.kth.se/~zhonghai/Archive/NoC-AL-V01.pdf
`Declaration of Gordon MacPherson
`David E. Culler et al., Parallel Computer Architecture (1998)
`John Heinlein et al., Coherent Block Data Transfer in the FLASH
`Multiprocessor, IEEE PROCEEDINGS 11TH INT’L PARALLEL
`PROCESSING SYMPOSIUM, Genva, Switzerland, pp. 18-27 (1997)
`Pl.’s Opening Claim Construction Br., Network Sys. Techs., LLC
`v. Tex. Instruments Inc., No. 2:22-cv-00482-RWS, Dkt. 98 (E.D.
`Tex. Sept. 27, 2023)
`Pl.’s Responsive Claim Construction Br., Network Sys. Techs.,
`LLC v. Qualcomm Inc., No. 1:22-cv-1331-DAE, Dkt. 81 (W.D.
`Tex. Nov. 16, 2023)
`Wael Badawy, System on Chip: The Challenge and Opportunities,
`SYSTEM ON CHIP FOR REAL-TIME APPLICATIONS, 3–16 (2003)
`Ahmed Amine Jerraya & Wayne Wolf, Multiprocessor Systems-
`on-Chips (2005)
`Ann Marie Rincorn et al., The Changing Landscape of System-on-
`a-Chip Design, IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONF.
`83–90 (1999)
`Shashi Kumar et al., A Network on Chip Architecture and Design
`Methodology, PROCEEDINGS OF THE IEEE COMPUTER SOC’Y ANN.
`SYMPOSIUM ON VLSI (ISVLSI’02) (2002)
`Luca Benini & Giovanni De Micheli, Chapter 16: Energy-
`Efficient System-Level Design, POWER AWARE DESIGN
`METHODOLOGIES 473–516 (2002)
`Rudolf F. Graf, MODERN DICTIONARY OF ELECTRONICS (7th ed.
`1999)
`
`ix
`
`
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`1028
`
`1029
`
`1030
`
`1031
`
`1032
`
`1033
`
`1034
`
`1035
`
`1036
`
`David Howard, THE PENGUIN DICTIONARY OF ELECTRONICS (4th
`ed. 2005)
`Douglas A. Downing et al., DICTIONARY OF COMPUTER AND
`INTERNET TERMS (8th ed. 2003)
`John Heinlein et al., Integration of Message Passing and Shared
`Memory in the Stanford FLASH Multiprocessor, ACM SIGOPS
`OPERATING SYSTEMS REVIEW, Vol. 28, Issue 5, pp 38–50 (1994)
`Hugo De Man, System-on-Chip Design: Impact on Education and
`Research, IEEE DESIGN & TEST OF COMPUTERS, Vol. 16, No. 3,
`pp. 11-19, (July-Sept. 1999)
`William J. Dally et al., Route Packets, Not Wires: On-Chip
`Interconnection Networks, PROCEEDINGS OF THE 38TH DESIGN
`AUTOMATION CONF. (IEEE Cat. No.01CH37232), Las Vegas, NV,
`USA, 2001, pp. 684-689 (2001)
`Andrei Rădulescu et al., Communication Services for Networks on
`Chip. SIGNAL PROCESSING AND COMMUNICATIONS (2000)
`Jose Duato et al., Interconnection Networks: An Engineering
`Approach, IEEE COMPUTER SOCIETY PRESS, Los Alamitos, CA
`(2002)
`Ahmed Hemani et al., Network on Chip: An Architecture for
`Billion Transistor Era (2001)
`Daniel Wiklund et al., Design of a System-on-Chip Switched
`Network and Its Design Support, IEEE 2002 INT’L CONF. ON
`COMMC’NS, CIRCUITS & SYS. & WEST SINO EXPOSITIONS,
`Chengdu, China, pp. 1279-1283 Vol.2 (2002)
`
`
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`x
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`Samsung Electronics Co., Ltd. (“Petitioner”) respectfully requests inter partes
`
`review of claims 1, 2, 4, 6, 8–12, 13, and 18–21 (“Challenged Claims”) of U.S.
`
`Patent No. 8,086,800 (the “ʼ800 Patent”) (Ex-1001).
`
`I.
`
`INTRODUCTION
`The ’800 Patent is directed to an integrated circuit having processing modules
`
`and a network in which data is buffered until it reaches an optimal amount and
`
`transmitted over the network at an optimal moment determined based on
`
`communication properties.
`
`But the claimed invention is unpatentable because such integrated circuits
`
`would have been obvious. Network on chip (“NoC”) structures connecting
`
`processing modules, buffering an optimal amount of data in a network interface, and
`
`transmitting data over a network at an optimal moment based on network conditions
`
`or communication properties were all known. Skilled artisans would have been
`
`motivated to combine these known network-related concepts and reasonably
`
`expected that combination to succeed. That is illustrated by the prior art grounds
`
`relied upon in this Petition, none of which was considered by the Examiner during
`
`prosecution of the ’800 Patent.
`
`II. BACKGROUND OF THE ’800 PATENT
`The ’800 Patent issued on December 27, 2011, from U.S. Application No.
`
`11/569,083 (Ex-1004, “the ’083 Application”), which was filed on Nov. 14, 2006.
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`1
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`The ’083 Application is a national stage application (under 35 U.S.C. § 371) of
`
`PCT/IB2005/051580, which was filed on May 13, 2005. The ’800 Patent claims
`
`priority to EP Application No. 04102189, which was filed on May 18, 2004.
`
`A. Claims
`The ’800 Patent has 21 claims. Claims 1, 2, 4, 6, 8–12, 13, and 18–21 are
`
`challenged here, four of which are independent.
`
`B. Overview of the ’800 Patent
`The ’800 Patent states it is “an object of the invention to provide an integrated
`
`circuit” and “a method for buffering” data in that circuit. Ex-1001 at 3:35–37, 4:29–
`
`36. The integrated circuit includes “a plurality of processing modules” called
`
`“intellectual property blocks” (or “IPs”) that communicate with one another via “a
`
`network on chip NOC.” Id., 3:38–41, 5:10–11, 5:51–55. Network interfaces “NI”
`
`connect master and slave IP modules and manage communication between them. Id.,
`
`5:39–47, 5:55–57.
`
`The ’800 Patent states that data from the IP blocks are buffered in the network
`
`interfaces “until the conditions for an optimal transfer are satisfied.” Id., 5:58–64,
`
`6:15–17; see id., 7:23–25. Data is transferred over the network interconnect “as a
`
`packet within a certain burst length” that is “adopted to suit the network N in order
`
`to improve the network utilization.” Id., 5:64–66, 6:4–6. The ’800 Patent states this
`
`2
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`is implemented using “determination units” in the network interfaces, which are also
`
`used to determine “the transmission moment.” Id., 6:47-53, 7:4–6; see id., 7:7–14.
`
`Prosecution History of the ’800 Patent
`C.
`The ’083 application was originally filed with fourteen claims directed to an
`
`integrated circuit, method of buffering data, and data processing system. Ex-1004 at
`
`8–13, 66. Throughout prosecution, the claims were repeatedly rejected as obvious
`
`over the prior art, id., 73–82, 119–34, 204–18, 258–74, 330–49, 410–29, leading
`
`some claims to be cancelled, others to be repeatedly narrowed through amendment,
`
`and others to be added. Id., 94–105, 147–57, 240–50, 308–19, 391–402, 475–87.
`
`After six rounds of rejections and narrowing amendments, the claims were allowed.
`
`Id., 497, 652.
`
`III.
`
`IDENTIFICATION AND BASIS OF CHALLENGE
`Petitioner’s challenge is based on the following prior art:
`
`• Rădulescu – Andrei Rădulescu et al., An Efficient On-Chip Network Interface
`
`Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible
`
`Network Configuration (Ex-1005), published no later than February 20, 2004, is
`
`prior art under 35 U.S.C. §§ 102(a) and (b).1
`
`
`Cites to 35 U.S.C. §§ 102 and 103 are to the pre-AIA version applicable here.
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`• Bahadiroglu – U.S. Patent Application Publication No. 2002/0186660 to
`
`Bahadiroglu et al. (Ex-1006), filed June 12, 2001 and published December 12,
`
`2002, is prior art under 35 U.S.C. §§ 102(a), (b), and (e).
`
`• Petersen – U.S. Patent No. 5,434,872 to Petersen et al. (Ex-1007), filed July
`
`1992 and issued July 18, 1995, is prior art under 35 U.S.C. §§ 102(a), (b), and
`
`(e).
`
`• Rădulescu-WO – International Patent Publication No. WO 2004/034176 to
`
`Rădulescu et al. (Ex-1008), filed October 7, 2003 and published April 22, 2004,
`
`is prior art under 35 U.S.C. §§ 102(a), (b), and (e).
`
`Rădulescu is a printed publication pursuant to 35 U.S.C. § 311(b) because it
`
`was published and publicly available before the ’800 Patent’s priority date. Ex-1005;
`
`Hulu, LLC v. Sound Innovations, LLC, IPR2018-01039, Paper 29 at 17-19 (P.T.A.B.
`
`Dec. 20, 2019) (precedential). Supporting documentation and testimonial evidence
`
`further demonstrate that it is a printed publication that was publicly available before
`
`the ’800 Patent’s priority date. Ex. 1017; Hulu, Paper 29 at 12-14, 17-21.
`
`Petitioner requests IPR and cancellation of the Challenged Claims on the
`
`following grounds:
`
`Ground
`1
`
`2
`
`Basis
`§ 103
`
`§ 103
`
`Challenged Claim(s)
`1, 2, 4, 6, 8–12, 13, 18–21
`
`Reference(s)
`Rădulescu, Bahadiroglu
`
`1, 2, 4, 6, 8–12, 13, 18–21
`
`Rădulescu, Petersen
`
`4
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`Ground
`
`Basis
`
`Challenged Claim(s)
`
`3
`
`4
`
`§ 103
`
`1, 2, 4, 6, 8–12, 13, 18–21
`
`§ 103
`
`1, 2, 4, 6, 8–12, 13, 18–21
`
`Reference(s)
`Rădulescu, Bahadiroglu,
`Rădulescu-WO
`
`Rădulescu, Petersen,
`Rădulescu-WO
`
`Section VII details the statutory grounds for unpatentability of the Challenged
`
`Claims. Additional evidence is provided in the accompanying Declaration of Dr.
`
`Todd Mowry (Ex-1002) and other supporting exhibits.
`
`IV. OVERVIEW OF THE ASSERTED PRIOR ART
`A. Rădulescu
`Rădulescu discloses “a network interface for an on-chip network”—the
`
`Æthereal NoC—that “is intended for systems on chip (SoC).” Ex-1005 at 1.
`
`Communication over the NoC “is performed using a transaction-based protocol,
`
`where master IP modules issue request messages … that are executed by the
`
`addressed slave modules, which may respond with a response message ….” Id., figs.
`
`8–9. Rădulescu discloses that data messages are buffered until “the amount of
`
`sendable data” satisfies “a configurable threshold,” at which point a “scheduler”
`
`determines the data can be transmitted over a router network. Id., 3–4, fig. 2. This
`
`mechanism is intended “[t]o optimize the NoC utilization.” Id., 4. Rădulescu’s NoC
`
`is depicted in Figure 8. Ex-1002 ¶52.
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`
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`Bahadiroglu
`B.
`Bahadiroglu discloses “[a]n adaptive packet mechanism and method for
`
`optimizing data packet transmission through a network connection between a
`
`sending node and a receiving node” based on real-time network conditions. Ex-1006
`
`at Abstract; [0047]–[0048]. Bahadiroglu describes measuring connection properties
`
`and network conditions, and determining “an optimum packet size and an optimum
`
`inter-packet interval for transmission of packet data between the sending node and
`
`the receiving node” of a network. Id., [0048]; Ex-1002 ¶53.
`
`Petersen
`C.
`Petersen discloses “an architecture for a network interface controller” that
`
`“optimize[s] performance” of a host by using “a dedicated transmit buffer.” Ex-1007
`
`at 2:14–16, 2:31–34, 2:56–61. It describes comparing “the amount of data” in the
`
`buffer to a “threshold value” to determine when a sufficient amount of data is present
`
`6
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`in the buffer to transmit it over the network. Id., 2:16–31, 2:49–53, 4:61–5:13; see
`
`id., Abstract. Petersen’s “threshold value” is “dynamically programmable” based on
`
`“status information”—such as “indications of underrun conditions”—to optimize
`
`the threshold value and thus “optimize performance” of the host. Id., 2:31–34, 4:40–
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`47, 4:56–60; Ex-1002 ¶54.
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`D. Rădulescu-WO
`Rădulescu-WO discloses “an integrated circuit comprising a plurality of
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`processing modules,” including “a network arranged for providing connections
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`between [master and slave] processing modules.” Ex-1008 at Abstract, 1:1–3, 12:5–
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`10. Those connections have a set of “properties” that may be used to efficiently adapt
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`the connections to their requirements. Id., 9:10–21, 11:5–22. An example of
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`Rădulescu-WO’s integrated circuit is depicted in Figure 3. Ex-1002 ¶55.
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`V. LEVEL OF ORDINARY SKILL IN THE ART
`As described by Dr. Mowry, a person of ordinary skill in the art (“POSITA”)
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`at the time of the alleged invention would have had at least a Bachelor’s degree in
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`computer science, electrical engineering, computer engineering, or an equivalent
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`technical degree, and two or more years of experience with system-on-chip,
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`interconnect, or networking technologies. Ex-1002 ¶¶48–50. Additional education
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`would compensate for less experience, and vice-versa. Id.
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`The result would be the same under the level of ordinary skill in the art that
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`PO has proposed in related district court proceedings: “a Bachelor of Science (or
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`equivalent) degree in electrical engineering, computer engineering, or a related field,
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`and 2-3 years of work experience in very large-scale integrated (‘VLSI’) systems,
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`such as application-specific integrated circuits (‘ASICs’), application-specific
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`standard parts (‘ASSPs’), system-on-chip (‘SoC’), or field-programmable gate
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`arrays (‘FPGAs’), and has an understanding of on-chip interconnection networks.”
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`Ex-1021 at 13; Ex-1002 ¶51.
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`VI. CLAIM CONSTRUCTION
`Claims in an IPR are construed under the claim construction principles set
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`forth in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) (en banc); 37 C.F.R.
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`§ 42.100(b). For the purposes of this proceeding only, Petitioner does not believe
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`any claim terms need to be construed to resolve the prior art issues presented in this
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`Petition for Inter Partes Review of U.S. Patent No. 8,086,800
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`Petition. Petitioner reserves the right to identify terms for construction in litigation
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`concerning the ’800 Patent, and to respond to any constructions that PO submits.
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`VII. THE CHALLENGED CLAIMS ARE UNPATENTABLE
`A. Ground 1: Claims 1, 2, 4, 6, 8–12, 13, and 18–21 Are Rendered
`Obvious by Rădulescu in view of Bahadiroglu
`1. Motivation to Combine Rădulescu and Bahadiroglu
`A POSITA would have been motivated to combine the teachings of Rădulescu
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`with those of Bahadiroglu in order to create a NoC with improved performance and
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`efficiency. Ex-1002 ¶¶56–63.
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`Rădulescu discloses “a network interface for an on-chip network,” which
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`supports data communication between “IP modules.” Ex-1005 at 1. Rădulescu
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`discloses a method of “optimiz[ing] the NoC utilization” using a “configurable
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`threshold mechanism” to determine when the “amount of sendable data” queued in
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`the network interface is sufficiently large. Ex-1005 at 4. This mechanism produces
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`longer packets that use the NoC more efficiently. Id.; Ex-1002 ¶58. Although
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`Rădulescu does not expressly specify how its configurable threshold mechanism is
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`implemented, a POSITA would have understood that this threshold could be set
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`either with a fixed value (e.g., programmed into a register) or with an adjustable
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`value that changes at runtime based on conditions in the NoC. Ex-1002 ¶58.
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`Indeed, Bahadiroglu discloses an example of a runtime-adjustable
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`implementation for a threshold mechanism. Ex-1002 ¶59. Bahadiroglu is directed to
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`the same goal of optimizing network utilization, and a POSITA would have been
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`motivated to combine Rădulescu’s disclosures with Bahadiroglu’s disclosures
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`regarding a runtime-adjustable
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`implementation
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`to obtain
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`the benefits of
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`Bahadiroglu’s known solution to network optimization. Id. In particular, a POSITA
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`would have looked to Bahadiroglu’s disclosure of “an adaptive packet mechanism”
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`as a means of setting the configurable threshold described by Rădulescu and
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`scheduling packet transmissions. Ex-1002 ¶¶59–60. Bahadiroglu describes that this
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`mechanism “periodically determine[s]” the “current network conditions” and uses
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`those conditions to “adjust[] the transmitted packet size … in real time to that
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`optimum for the current network and connection bandwidth” and/or other network
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`properties. Ex-1006, [0048], [0071]. Bahadiroglu’s mechanism also determines the
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`most optimal timing for the transmission of those packets, i.e., the “inter-packet
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`interval.” Id. Bahadiroglu describes determining the optimal packet size and
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`transmission timing based on various communication properties, including “the
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`amount and type of data to be transmitted” and “network conditions” that include
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`latency, jitter, available bandwidth, and traffic conditions. See id., [0048], [0071],
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`[0107], [0111]–[0114].
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`A POSITA would have understood that using Bahadiroglu’s mechanism
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`would improve the performance and efficiency of Rădulescu’s NoC by adjusting
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`both the packet size and transmission timing based on real-time network conditions,
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`Petit