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Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 1 of 34
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`EXHIBIT 12
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`Greenthread Ex 2006, p.1 of 34
`Cirrus Logic, et. al. v. Greenthread
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`

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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 2 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`[Claim 1, Preamble] A
`semiconductor device,
`comprising:
`
`To the extent the preamble is a limitation, the Dell-Sony Accused Products include a semiconductor device. Sony provides CMOS image
`sensors, and the Dell-Sony Accused Products include Sony CMOS image sensors, each of which is a semiconductor device.
`
`See https://www.sony-semicon.co.jp/e/news/2021/2021121601.html
`
`As an example, the Sony 12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor is found in an Apple iPhone 11, and
`upon information and belief, this image sensor has similar components and functionality as the Sony CMOS image sensor in the Dell-Sony
`Accused Products. Usage of a Sony CMOS image sensor in Dell products is shown below, for example:
`
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`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.2 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 3 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`See https://deals.dell.com/en-us/productdetail/dtvv
`
`This representative Sony image sensor has been analyzed via tear-down, as explained below. The above Sony image sensor is discussed in
`this claim chart and other infringement contention claim charts (e.g., Exhibits D-2 through D-6) as an example of a Sony image sensor used
`in Dell-Sony Accused products. Upon information and belief, such a Sony image sensor is representative of Sony image sensors used in the
`Dell-Sony Accused Products for purposes of this claim chart and the other infringement contention claim charts because, e.g., other Sony
`image sensors used in Dell-Sony Accused Products would have similarly been advantageously designed to move carriers and achieve the
`performance enhancements described and claimed in the ’842 patent (and the other asserted patents). For example, other Sony image
`sensors would similarly have been designed with a dopant gradient in order to improve performance characteristics such as on and off
`switching times and other performance enhancements described in the Abstract of the ’842 patent (and the other asserted patents).
`Therefore, upon information and belief, other Sony image sensors used in Dell-Sony Accused Products contain similar features as the Sony
`12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor, and function in a similar way with respect to the features
`claimed in the asserted claims.
`
`This claim chart is based on publicly available information, and additional information regarding these and other accused products is
`expected to be obtained through discovery.
`
`
`
`The Dell-Sony Accused Products meet this limitation. For example, the Sony CMOS image sensor discussed above for Claim 1, Preamble,
`was imaged using scanning electron microscopy (SEM) and scanning capacitance microscopy (SCM), at the cross-section indicated below:
`
`[Claim 1, Element 1] a
`substrate of a first doping type at
`a first doping level having first
`and second surfaces;
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.3 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 4 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`The SEM cross-sectional image below shows the image signal processor (ISP) / CMOS image sensor (CIS) die stack in the periphery region,
`with a direct bond interconnect (DBI) connecting the two wafers corresponding to the ISP and CIS, respectively:
`
`
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`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.4 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 5 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`The substrate has first and second surfaces, as shown in the following SEM cross-sectional image taken at the red dashed line labeled “A”
`and “SEM/SCM cross-section” in the first figure above:
`
`
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`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.5 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 6 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`Secondary ion mass spectroscopy (SIMS) was performed to analyze doping profiles. For example, a SIMS sample was used as shown
`below, with the location of SIMS craters annotated:
`
`
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`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.6 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 7 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`The sample was prepared by removing the back layers down to the back of the active silicon. The SIMS crater for boron (B) analysis is 100
`× 100 μm, and 80 × 80 μm for the remaining elements shown in the legend at the right side of the below graph.
`
`
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.7 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 8 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`As shown above, the substrate is p-type (a first doping type) and has a first doping level.
`
`
`
`The Dell-Sony Accused Products meet this limitation. For example, the following scanning electron microscope (SEM) bevel image shows
`two adjacent rows of shared pixels, and thus shows first and second active regions. Transistors are formed in the first active region as shown
`below. Upon information and belief, the first active region (shown below) is n-type (a second doping type opposite in conductivity to the
`first doping type).
`
`[Claim 1, Element 2] a first
`active region disposed adjacent
`the first surface of the substrate
`with a second doping type
`opposite in conductivity to the
`first doping type and within
`which transistors can be formed;
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.8 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 9 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`The first active region is disposed adjacent the first surface of the substrate, as shown in the following SEM cross-sectional image discussed
`above for Element 1:
`
`
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 8
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`Greenthread Ex 2006, p.9 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 10 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. For example, this is shown by the following SEM image of the Sony CMOS image
`sensor discussed above for Element 2. As discussed above for Element 2, the SEM image shows two adjacent rows of shared pixels, and
`thus shows first and second active regions.
`
`
`
`[Claim 1, Element 3] a second
`active region separate from the
`first active region disposed
`adjacent to the first active region
`and within which transistors can
`be formed;
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.10 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 11 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`[Claim 1, Element 4]
`transistors formed in at least one
`of the first active region or
`second active region; and
`
`[Claim 1, Element 5] at least a
`portion of at least one of the first
`and second active regions
`having at least one graded
`dopant concentration to aid
`carrier movement from the first
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Elements 2-3.
`
`
`
`The Dell-Sony Accused Products meet this limitation. For example, this is shown by the SEM and scanning microwave impedance
`microscopy (SMIM) images below and the SIMS graph below. The contrast in the SMIM image is proportional to the capacitance of the
`sample under inspection, so that brighter green corresponds to higher dopant concentration, and darker green/black corresponds to lower
`dopant concentration.
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 10
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`Greenthread Ex 2006, p.11 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 12 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`U.S. Patent No. 10,510,842
`
`surface to the second surface of
`the substrate.
`
`As shown by the slope of the blue plot (boron-11, which is p-type) and the dark purple plot (arsenic, which is n-type) in the SIMS graph
`below, at least a portion of at least one of the first and second active regions has at least one graded dopant concentration to aid carrier
`movement from the front surface (first surface) to the back surface (second surface) of the substrate.
`
`
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 11
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`Greenthread Ex 2006, p.12 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 13 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,510,842
`
`Accused Products
`
`For example, at least one downward sloped portion is shown in each of the boron-11 and arsenic plots above, viewed from right (more depth)
`to left (less depth).
`
`The substrate of the semiconductor device of the Dell-Sony Accused Products is a p-type substrate, as discussed above for Claim 1, Element
`1.
`
`
`
`The Dell-Sony Accused Products meet this limitation. Upon information and belief, the first active region and second active region contain
`NMOS transistors (n-channel devices) or PMOS transistors (p-channel devices).
`
`2. The semiconductor device of
`claim 1, wherein the substrate is
`a p-type substrate.
`
`5. The semiconductor device of
`claim 1, wherein the first active
`region and second active region
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 12
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`Greenthread Ex 2006, p.13 of 34
`Cirrus Logic, et. al. v. Greenthread
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`

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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 14 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. Upon information and belief, the first active region and second active region are each
`separated by at least one isolation region to avoid one pixel electrically interfering with an adjacent pixel. Information about isolation regions
`in Dell-Sony Accused Products is in the possession of the Dell Defendants and is expected to be obtained through discovery.
`
`Upon information and belief, for the Dell-Sony Accused Products, the graded dopant is fabricated with an ion implantation process. For
`example, ion implantation is the prevalent process for implementing doping in semiconductor devices, and is believed to be used for the Dell-
`Sony Accused Products. Information about the fabrication process for Dell-Sony Accused Products, including usage of an ion implantation
`process, is in the possession of the Dell Defendants and is expected to be obtained through discovery.
`
`To the extent the preamble is a limitation, the Dell-Sony Accused Products include a semiconductor device. See above at Claim 1, Preamble.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 1.
`
`
`
`
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 2. Upon information and belief, transistors can be
`formed in the surface of the first active region. Details regarding formation of transistors are in the possession of the Dell Defendants and are
`expected to be obtained through discovery.
`
`
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 3. Upon information and belief, transistors can be
`formed in the surface of the second active region. Details regarding formation of transistors are in the possession of the Dell Defendants and
`are expected to be obtained through discovery.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 4.
`
`U.S. Patent No. 10,510,842
`
`contain one of either p-channel
`and n-channel devices.
`
`7. The semiconductor device of
`claim 1, wherein the first active
`region and second active region
`are each separated by at least
`one isolation region.
`
`8. The semiconductor device of
`claim 1, wherein the graded
`dopant is fabricated with an ion
`implantation process.
`
`[Claim 9, Preamble] A
`semiconductor device,
`comprising:
`
`[Claim 9, Element 1] a
`substrate of a first doping type at
`a first doping level having first
`and second surfaces;
`
`[Claim 9, Element 2] a first
`active region disposed adjacent
`the first surface of the substrate
`with a second doping type
`opposite in conductivity to the
`first doping type and within
`which transistors can be formed
`in the surface thereof;
`
`[Claim 9, Element 3] a second
`active region separate from the
`first active region disposed
`adjacent to the first active region
`and within which transistors can
`be formed in the surface thereof;
`
`[Claim 9, Element 4]
`transistors formed in at least one
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 13
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`Greenthread Ex 2006, p.14 of 34
`Cirrus Logic, et. al. v. Greenthread
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`

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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 15 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 5.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 2.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 5.
`
`Upon information and belief, the Dell-Sony Accused Products meet this limitation. See above at Claim 7.
`
`Upon information and belief, the Dell-Sony Accused Products meet this limitation. See above at Claim 8.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Elements 2-3.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Preamble and Elements 2-3 (discussing CMOS). CMOS
`transistors require a source, a drain, a gate, and a channel region.
`
`U.S. Patent No. 10,510,842
`
`of the first active region or
`second active region; and
`
`[Claim 9, Element 5] at least a
`portion of at least one of the first
`and second active regions
`having at least one graded
`dopant concentration to aid
`carrier movement from the
`surface to the substrate.
`
`10. The semiconductor device of
`claim 9, wherein the substrate is
`a p-type substrate.
`
`13. The semiconductor device of
`claim 9, wherein the first active
`region and second active region
`contain at least one of either p-
`channel and n-channel devices.
`
`15. The semiconductor device of
`claim 9, wherein the first active
`region and second active region
`are each separated by at least
`one isolation region.
`
`16. The semiconductor device of
`claim 9, wherein the graded
`dopant is fabricated with an ion
`implantation process.
`
`17. The semiconductor device of
`claim 1, wherein the first and
`second active regions are
`formed adjacent the first surface
`of the substrate.
`
`18. The semiconductor device of
`claim 1, wherein the transistors
`which can be formed in the first
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 14
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`Greenthread Ex 2006, p.15 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 16 of 34
`Exhibit D-1 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`U.S. Patent No. 10,510,842
`
`and second active regions are
`CMOS transistors requiring a
`source, a drain, a gate and a
`channel region.
`
`
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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`Greenthread Ex 2006, p.16 of 34
`Cirrus Logic, et. al. v. Greenthread
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`

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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 17 of 34
`Exhibit D-2 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`To the extent the preamble is a limitation, the Dell-Sony Accused Products include a semiconductor device. See Exhibit D-1, Claim 1,
`Preamble. The Sony 12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor referenced in Exhibit D-1 for tear-
`down analysis is discussed in this claim chart and other infringement contention claim charts as an example of an image sensor
`representative of the Dell-Sony Accused Products. Upon information and belief, such a Sony image sensor is representative of image
`sensors used in the Dell-Sony Accused Products for purposes of this claim chart and the other infringement contention claim charts
`because, e.g., other image sensors used in Dell-Sony Accused Products would have similarly been advantageously designed to move
`carriers and achieve the performance enhancements described and claimed in the ’481 patent (and the other asserted patents). For
`example, other image sensors would similarly have been designed with a dopant gradient in order to improve performance characteristics
`such as on and off switching times and other performance enhancements described in the Abstract of the ’481 patent (and the other
`asserted patents). Therefore, upon information and belief, other image sensors used in Dell-Sony Accused Products contain similar
`features as the Sony 12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor, and function in a similar way, with
`respect to the features claimed in the asserted claims.
`
`This claim chart is based on publicly available information, and additional information regarding these and other accused products is
`expected to be obtained through discovery.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 1.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 3.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 4.
`
`U.S. Patent No. 10,734,481
`
`[Claim 1, Preamble] A
`semiconductor device, comprising:
`
`[Claim 1, Element 1] a substrate of
`a first doping type at a first doping
`level having first and second
`surfaces;
`
`[Claim 1, Element 2] a first active
`region disposed adjacent the first
`surface of the substrate with a
`second doping type opposite in
`conductivity to the first doping type
`and within which transistors can be
`formed;
`
`[Claim 1, Element 3] a second
`active region separate from the first
`active region disposed adjacent to
`the first active region and within
`which transistors can be formed;
`
`[Claim 1, Element 4] transistors
`formed in at least one of the first
`active region or second active
`region;
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 1
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`Greenthread Ex 2006, p.17 of 34
`Cirrus Logic, et. al. v. Greenthread
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`

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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 18 of 34
`Exhibit D-2 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`U.S. Patent No. 10,734,481
`
`Accused Products
`
`[Claim 1, Element 5] at least a
`portion of at least one of the first
`and second active regions having at
`least one graded dopant
`concentration to aid carrier
`movement from the first surface to
`the second surface of the substrate;
`and
`
`[Claim 1, Element 6] at least one
`well region adjacent to the first or
`second active region containing at
`least one graded dopant region, the
`graded dopant region to aid carrier
`movement from the first surface to
`the second surface of the substrate.
`
`2. The semiconductor device of
`claim 1, wherein the substrate is a p-
`type substrate.
`
`4. The semiconductor device of
`claim 1, wherein the first active
`region and second active region
`contain one of either p-channel and
`n-channel devices.
`
`6. The semiconductor device of
`claim 1, wherein the first active
`region and second active region are
`each separated by at least one
`isolation region.
`
`7. The semiconductor device of
`claim 1, wherein the graded dopant
`is fabricated with an ion
`implantation process.
`
`8. The semiconductor device of
`claim 1, wherein the first and second
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 5.
`
`Upon information and belief, the Dell-Sony Accused Products meet this limitation. Information about well regions and doping in such
`regions is in the possession of the Dell Defendants, and is expected to be obtained through discovery.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 5.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 7.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 8.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Elements 1-3.
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 2
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`Greenthread Ex 2006, p.18 of 34
`Cirrus Logic, et. al. v. Greenthread
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`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 19 of 34
`Exhibit D-2 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 5 (SIMS graph showing p-type boron-11
`doping).
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 18.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Preamble.
`
`To the extent the preamble is a limitation, the Dell-Sony Accused Products meet include a semiconductor device. See above at Claim 1,
`Preamble.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 1.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 9, Element 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 9, Element 3.
`
`U.S. Patent No. 10,734,481
`
`active regions are formed adjacent
`the first surface of the substrate.
`
`9. The semiconductor device of
`claim 1, wherein dopants of the
`graded dopant concentration in the
`first active region or the second
`active region are either p-type or n-
`type.
`
`13. The semiconductor device of
`claim 1, wherein the transistors
`which can be formed in the first and
`second active regions are CMOS
`transistors requiring at least a
`source, a drain, a gate and a channel.
`
`19. The semiconductor device of
`claim 1, wherein the device is an
`image sensor.
`
`[Claim 20, Preamble] A
`semiconductor device, comprising:
`
`[Claim 20, Element 1] a substrate
`of a first doping type at a first
`doping level having first and second
`surfaces;
`
`[Claim 20, Element 2] a first active
`region disposed adjacent the first
`surface of the substrate with a
`second doping type opposite in
`conductivity to the first doping type
`and within which transistors can be
`formed in the surface thereof;
`
`[Claim 20, Element 3] a second
`active region separate from the first
`active region disposed adjacent to
`the first active region and within
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
`
`
`
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`
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`
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` Page 3
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`Greenthread Ex 2006, p.19 of 34
`Cirrus Logic, et. al. v. Greenthread
`
`

`

`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 20 of 34
`Exhibit D-2 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 4.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 5.
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 1, Element 6.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 5.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 7.
`
`U.S. Patent No. 10,734,481
`
`which transistors can be formed in
`the surface thereof;
`
`[Claim 20, Element 4] transistors
`formed in at least one of the first
`active region or second active
`region;
`
`[Claim 20, Element 5] at least a
`portion of at least one of the first
`and second active regions having at
`least one graded dopant
`concentration to aid carrier
`movement from the surface to the
`substrate; and
`
`[Claim 20, Element 6] at least one
`well region adjacent to the first or
`second active region containing at
`least one graded dopant region, the
`graded dopant region to aid carrier
`movement from the first surface to
`the second surface of the substrate.
`
`22. The semiconductor device of
`claim 20, wherein the substrate is a
`p-type substrate.
`
`24. The semiconductor device of
`claim 20, wherein the first active
`region and second active region
`contain at least one of either p-
`channel and n-channel devices.
`
`26. The semiconductor device of
`claim 20, wherein the first active
`region and second active region are
`each separated by at least one
`isolation region.
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
`
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` Page 4
`
`Greenthread Ex 2006, p.20 of 34
`Cirrus Logic, et. al. v. Greenthread
`
`

`

`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 21 of 34
`Exhibit D-2 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`The Dell-Sony Accused Products meet this limitation. See above at Claim 9.
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 8.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Preamble.
`
`U.S. Patent No. 10,734,481
`
`27. The semiconductor device of
`claim 20, wherein dopants of the
`graded dopant concentration in the
`first active region or the second
`active region are either p-type or n-
`type.
`
`31. The semiconductor device of
`claim 20, wherein the graded dopant
`is fabricated with an ion
`implantation process.
`
`36. The semiconductor device of
`claim 20, wherein the device is an
`image sensor.
`
`
`
`
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
`
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` Page 5
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`Greenthread Ex 2006, p.21 of 34
`Cirrus Logic, et. al. v. Greenthread
`
`

`

`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 22 of 34
`Exhibit D-3 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`To the extent the preamble is a limitation, the Dell-Sony Accused Products include a VLSI semiconductor device. The Sony image sensor
`discussed for claim 1 of Exhibit D-1 is a semiconductor device (see Exhibit D-1, Claim 1, Preamble) and is a VLSI semiconductor device upon
`information and belief. Details regarding transistor count are in the possession of the Dell Defendants and are expected to be obtained through
`discovery.
`
`The Sony 12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor referenced in Exhibit D-1 is discussed in this claim chart
`and other infringement contention claim charts as an example of an image sensor representative of the Dell-Sony Accused Products. Upon
`information and belief, such a Sony image sensor is representative of image sensors used in the Dell-Sony Accused Products for purposes of
`this claim chart and the other infringement contention claim charts because, e.g., other image sensors used in Dell-Sony Accused Products
`would have similarly been advantageously designed to move carriers and achieve the performance enhancements described and claimed in the
`’222 patent (and the other asserted patents). For example, other image sensors would similarly have been designed with a dopant gradient in
`order to improve performance characteristics such as on and off switching times and other performance enhancements described in the Abstract
`of the ’222 patent (and the other asserted patents). Therefore, upon information and belief, other image sensors used in Dell-Sony Accused
`Products contain similar features as the Sony 12 MP 1.0 µm Pixel Pitch, Stacked Back-Illumination CMOS Image Sensor, and function in a
`similar way with respect to the features claimed in the asserted claims.
`
`This claim chart is based on publicly available information, and additional information regarding these and other accused products is expected
`to be obtained through discovery.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 1.
`
`
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 3.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 4.
`
`U.S. Patent No. 11,121,222
`
`[Claim 1, Preamble] A VLSI
`semiconductor device,
`comprising:
`
`[Claim 1, Element 1] a
`substrate of a first doping type at
`a first doping level having a
`surface;
`
`[Claim 1, Element 2] a first
`active region disposed adjacent
`the surface with a second doping
`type opposite in conductivity to
`the first doping type and within
`which transistors can be formed;
`
`[Claim 1, Element 3] a second
`active region separate from the
`first active region disposed
`adjacent to the first active region
`and within which transistors can
`be formed;
`
`[Claim 1, Element 4] transistors
`formed in at least one of the first
`
`Greenthread, LLC v. Intel Corp. et al., Case No. 6:22-cv-00105-ADA
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` Page 1
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`Greenthread Ex 2006, p.22 of 34
`Cirrus Logic, et. al. v. Greenthread
`
`

`

`Case 6:22-cv-00105-ADA Document 38-12 Filed 04/29/22 Page 23 of 34
`Exhibit D-3 to Greenthread’s Preliminary Infringement Contentions (4/29/2022)
`
`Accused Products
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 1, Element 5. For example, referencing the SIMS graph
`discussed at Exhibit D-1, Claim 1, Element 5 and shown below, there are no active regions at the left side of the graph, e.g., at depths of less
`than about 1500 nm.
`
`Upon information and belief, the Dell-Sony Accused Products meet this limitation. Details regarding well regions and transistors of the Dell-
`Sony Accused Products are in the possession of the Dell Defendants and are expected to be obtained through discovery.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 2.
`
`The Dell-Sony Accused Products meet this limitation. See Exhibit D-1, Claim 5; Exhibit D-2, Claim 4. Upon information and belief, the first
`and second active regions contain digital logic as claimed. See above at Claim 1,

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