UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_________________________________
`MERCEDES-BENZ USA, LLC,
`
`Petitioner,
`v.
`DAEDALUS PRIME LLC,
`Patent Owner.
`_________________________________
`Case No.: IPR2023-01333
`
`U.S. Patent No. 10,049,080
`_________________________________
`
`
`PATENT OWNER’S RESPONSE
`
`
`
`
`
`
`
`
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_________________________________
`MERCEDES-BENZ USA, LLC,
`
`Petitioner,
`v.
`DAEDALUS PRIME LLC,
`Patent Owner.
`_________________________________
`Case No.: IPR2023-01333
`
`U.S. Patent No. 10,049,080
`_________________________________
`
`
`PATENT OWNER’S RESPONSE
`
`
`
`
`
`
`
`
`
`
`
`
`
`I.
`II.
`
`III.
`
`TABLE OF CONTENTS
`
`BACKGROUND, THE ’080 PATENT, AND CLAIM
`
`THE PETITION FAILS TO DEMONSTRATE THAT
`
`Sutardja Fails to Teach or Suggest the Invention Recited in
`
`INTRODUCTION AND SUMMARY OF ARGUMENTS .. 1
`CONSTRUCTION ................................................................... 4
`Background .............................................................................. 4
`A.
`The ’080 Patent ........................................................................ 6
`B.
`The Challenged Claims ........................................................... 9
`C.
`D. Claim Construction and the Level of Ordinary Skill in the
`Art ........................................................................................... 10
`1.
`Operating System .......................................................... 12
`E.
`The IPR Petition ..................................................................... 13
`ANY CHALLENGED CLAIM IS UNPATENTABLE ...... 14
`A.
`the Challenged Independent Claims .................................... 17
`1.
`Sutardja ’748 .................................................................. 17
`2.
`Sutardja ’785 .................................................................. 19
`3.
` ....................................................................................... 20
`B.
`Obvious in View of Sutardja ................................................. 28
`C.
`Primary Reference Likewise Fail ......................................... 29
`D. Mathieson-Sutardja Fails to Teach or Suggest the Invention
`Recited in the Challenged Independent Claims .................. 31
`
`Sutardja does not teach or suggest an operating system
`executing on a multi-core processor to monitor a demand
`for the multi-core processor and control power
`management hardware based on the demand, as claimed
`
`Claims Depending from Claims 1, 9, and 17 are Not
`
`The Remaining Challenges that Rely on Sutardja as a
`
`
`
`ii
`
`
`
`
`
`
`E.
`
`IV.
`
`
`
`operating system executing on a multi-core processor to
`monitor a demand for the multi-core processor and
`control power management hardware based on the
`
`plurality of cores and a second plurality of cores that
`support a same instruction set, wherein the second
`plurality of cores consume less power, for a same applied
`operating frequency and supply voltage, than the first
`
`Overview of Mathieson ................................................. 31
`1.
`2. Mathieson-Sutardja does not teach or suggest an
`demand, as claimed ........................................................ 34
`3. Mathieson-Sutardja does not teach or suggest a first
`plurality of cores, as claimed ......................................... 38
`4.
`unpatentable in View of Mathieson-Sutardja ................ 43
`Sutardja Likewise Fail ........................................................... 43
`CONCLUSION ...................................................................... 44
`
`The Challenged Dependent Claims are Also Not
`
`The Remaining Challenges that Rely on Mathieson-
`
`
`
`
`
`iii
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`
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`
`
`TABLE OF AUTHORITIES
`
`
`CASES
`
`ACTV, Inc. v. Walt Disney Co.,
`346 F.3d 1082 (Fed. Cir. 2003) ................................................................. 11
`
`
`Arendi S.A.R.L. v. Apple Inc.,
`832 F.3d 1355 (Fed. Cir. 2016) ................................................................. 21
`
`
`CFMT, Inc. v. Yieldup Intern. Corp.,
`349 F.3d 1333 (Fed. Cir. 2003) .......................................................... passim
`
`
`Dynamic Drinkware, LLC v. Nat’l Graphics, Inc.,
`800 F.3d 1375 (Fed. Cir. 2015) ................................................................. 45
`
`
`Harmonic Inc. v. Avid Tech., Inc.,
`815 F.3d 1356 (Fed. Cir. 2016) ................................................................. 44
`
`
`Hartness Int’l. Inc. v. Simplimatic Engineering Co.,
`819 F.2d 1100 (Fed. Cir. 1987) ............................................... 29, 30, 43, 44
`
`
`In re Gordon,
`733 F.2d 900 (Fed. Cir. 1984) ................................................................... 16
`
`
`In re Magnum Oil Tools Int’l, Ltd.,
`829 F.3d 1364 (Fed. Cir. 2016) ................................................................. 45
`
`
`In re Peterson,
`315 F.3d 1325 (Fed. Cir. 2003) ................................................................. 16
`
`
`In re Ratti,
`270 F.2d 810 (CCPA 1959) ...................................................................... 15
`
`
`In re Warner,
`379 F.2d 1011 (CCPA 1967) .................................................................... 15
`
`
`Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd.,
`821 F.3d 1359 (Fed. Cir. 2016) ................................................................. 15
`
`
`
`
`
`
`iv
`
`
`
`
`
`KSR Int’l v. Teleflex Inc.,
`550 U.S. 398 (2007) ...................................................................... 15, 16, 20
`
`
`Nidec Motor Corp. v. Zhongshan Broad Ocean Motor Co. Ltd.,
`868 F.3d 1013 (Fed. Cir. 2017) ................................................................. 11
`
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) ........................................................... 10, 11
`
`
`SAS Inst. Inc. v. Iancu,
`138 S. Ct. 1348 (2018) ........................................................................ 14, 15
`
`
`Takeda Chem. Indus., Ltd. v. Alphapharm Pty, Ltd.,
`492 F.3d 1350 (Fed. Cir. 2007) ................................................................. 20
`
`
`Vitronics Corp. v. Conceptronics, Inc.,
`90 F.3d 1576 (Fed. Cir. 1996) ................................................................... 11
`
`
`
`
`
`
`REGULATIONS
`OTHER AUTHORITIES
`
`37 C.F.R. § 42.104(b)(4) ........................................................................ 28, 38
`
`
`
`Changes to the Claim Construction Standard for Interpreting Claims in
`Trial Proceedings Before the Patent Trial and Appeal Board, 83 Fed. Reg.
`51,340 (Oct. 11, 2018) .............................................................................. 10
`
`
`
`
`
`
`
`
`
`v
`
`
`
`
`
`
`EXHIBIT LIST
`
`
`EXHIBIT NO. DESCRIPTION
`
`2001
`2002
`2003
`
`US PGPUB 2008/0263324 A1 Sutardja et al.
`Transcript of Deposition of Dr. Horst
`US Patent 5,889,679 Henry et al.
`
`2004
`2005
`2006
`2007
`
`
`
`
`
`
`
`
`US Patent 8,892,931 Kruglick
`US Patent 9,086,883 Thomson et al.
`Declaration of Michael C. Brogioli, Ph.D.
`Excerpts from Microsoft Computer Dictionary, Fifth
`Edition (2002), pp. 378 (“operating system”), 518
`(“thread”)
`
`
`
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`
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`
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`
`
`vi
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`
`
`I.
`
`INTRODUCTION AND SUMMARY OF ARGUMENTS
`Mercedes-Benz USA, LLC’s (“MB USA” or “Petitioner”) challenges
`
`to the claims of U.S. Patent No. 10,049,080 (the “’080 patent”) fail to
`
`demonstrate that any challenged claim is unpatentable.
`
`Sutardja does not teach or suggest an operating system executing on a
`
`multi-core processor to monitor a demand for the multi-core processor and
`
`control power management hardware based on the demand, as required by
`
`all of the challenged claims, and the petition fails to provide any reasoned
`
`analysis that explains why a person of ordinary skill in the art would have
`
`modified Sutardja to provide such an operating system. Indeed, MB USA is
`
`inconsistent in defining where exactly the claimed “power management
`
`hardware” can be found in Sutardja. Initially, the petition alleges, “The
`
`hardware controlled by the core switching module corresponds to the
`
`claimed power management hardware.” Pet. at 32-33. But later it claims, “A
`
`POSITA would have understood that the hardware on which the disclosed
`
`hypervisor is installed corresponds to the claimed power management
`
`hardware.” Id. at 33-34. Still later we are told, “the operating system (kernel
`
`module and PMS module) controls the power management hardware (core
`
`switching module) based on the demand.” Id. at 35. Regardless, MB USA’s
`
`argument for unpatentability fails no matter whether one considers the core
`
`
`
`1
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`
`
`
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`switching module, the hardware controlled by the core switching module, or
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`the hardware on which the hypervisor is installed as the claimed core
`
`switching module.
`
`First, Sutardja’s core switching module is not “power management
`
`hardware.” Indeed, it is not “hardware” at all as Sutardja advises the core
`
`switching module, whether it is integrated in the hypervisor module or not,
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`is loaded into high-speed memory from RAM or other storage after bootup.
`
`Hardware cannot be “loaded into high speed memory from RAM;” thus, the
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`core switching module of Sutardja is software, not hardware.
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`Second, the petition itself relies on Sutardja’s hypervisor “operat[ing]
`
`below the kernel.” Hence, if one considers the recited “power management
`
`hardware” as Sutardja’s the hardware on which the hypervisor is installed,
`
`then it cannot be that Sutardja’s operating system controls this hardware.
`
`Instead, because the hypervisor operates “below the kernel” the hypervisor,
`
`not the operating system, controls this hardware. This is, in fact, the whole
`
`point of a so-called “bare metal hypervisor.”
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`Third, if the recited “power management hardware” is the hardware
`
`controlled by Sutardja’s core switching module, Sutardja is clear that, the
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`kernel and the PMS module (the alleged “operating system”) do not
`
`“control” this hardware and instead only make system calls to the core
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`
`
`2
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`
`
`
`
`switching module which actually effects the control. Accordingly, all of MB
`
`USA’s challenges that depend on Sutardja as a primary reference fail.
`
`The same is true of MB USA’s challenges based on the combined
`
`teachings of Mathieson and Sutardja. For these challenges, MB USA relies
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`on Mathieson for teachings concerning the power management hardware and
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`operating system limitations of independent claims 1, 9, and 17. In
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`particular, the petition alleges that Mathieson describes a controller within a
`
`CPU that monitors demand and that a POSITA would recognize such a
`
`controller performs the functions of an operating system and therefore meets
`
`the requirements of the claims.
`
`Not so. If anything, the POSITA would understand that because
`
`Mathieson directly states that transitions between modes, which involve the
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`controller transferring processor state from one set of cores to the other set
`
`of cores, are done transparently to the operating system. That is, it is not the
`
`operating system that is effecting the transition. Instead, for such
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`transparency to exist, the transition between modes must be provided by a
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`mechanism at a layer below the operating system. Accordingly, and contrary
`
`to the allegation in the petition, the controller does not perform the functions
`
`of an operating system and instead operates below the operating system
`
`when controlling any power management hardware.
`
`
`
`3
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`
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`Moreover, while Mathieson might discuss power consumption of
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`cores on the basis of operating frequency, nothing is said concerning such
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`power consumption on the basis of an applied supply voltage. Hence, the
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`petition fails to demonstrate that Mathieson-Sutardja, teaches or suggests,
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`“wherein the second plurality of cores consume less power, for a same
`
`applied operating frequency and supply voltage, than the first plurality of
`
`cores.”
`
`For these and further reasons as discussed in this Patent Owner
`
`Response, the Board should not find any of the challenged claims
`
`unpatentable.
`
`
`
`II. BACKGROUND, THE ’080 PATENT, AND CLAIM
`CONSTRUCTION
`A. Background
`Modern computing devices can make use of multi-core processors
`
`that combine a plurality of processor cores on a single semiconductor die.
`
`Ex. 1001 at 1:22-25. The different processor cores are the functional units
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`that read and execute instructions contained in a computer program. The
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`presence of multiple cores on a single die means a multi-core processor can
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`execute multiple such instructions simultaneously. Ex. 2006 at ¶ 28.
`
`
`
`4
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`
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`The amount of power consumed by a processor is strongly correlated
`
`with its performance capabilities. Ex. 1001 at 2:26-29. Because decreasing
`
`the processing performance of the system corresponds to power savings,
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`processor power management typically scales up the performance of the
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`system as the system’s workload increases, and scales down the performance
`
`as workload decreases. Id. at 2:22-27. A typical way to scale processing
`
`performance and power consumption with workload is to enable or disable
`
`entire cores and raise or lower their supply voltages and operating
`
`frequencies (and thereby their power consumption) in response to system
`
`workload. Id. at 2:30-34.
`
`But solutions such as these have limitations. For example, merely
`
`adjusting the operating frequency (also called “clock”) and/or voltage at
`
`which a core operates to adjust its power consumption/processing capability
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`balance presents core management difficulties. Ex. 2006 at ¶ 30. So too do
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`other approaches to power management, such as the use of low-power states,
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`have drawbacks, including latencies due to the required time to raise the
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`cores out of the low power state when needed. See Ex. 1033 at 1:26-33
`
`(“One approach to reducing power in a computing platform when there is
`
`relatively little activity, is to place the processor in a low-power state.
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`However, placing a processor in a low-power state or returning a processor
`
`
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`5
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`
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`
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`from a low-power state may require a non-trivial amount of time. Therefore,
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`it may or may not be worth the time required to place a processor in a low-
`
`power state or to return the processor from a low-power state.”).
`
`
`
`B.
`The ’080 Patent
`The ’080 patent proposes a different approach to processor power
`
`management. Rather than simply relying on adjustments to operating
`
`frequency and/or voltage or employing low power states when a core is
`
`inactive, the ’080 patent describes a multi-core processor that makes use of
`
`different types of processor cores that consume different amounts of power
`
`and offer different performance capabilities (for a given operating frequency
`
`and/or voltage), yet which support the same instruction set. Ex. 2006 at ¶ 32
`
`(citing Ex. 1001 at 3:50-62). To achieve this, the different types of processor
`
`cores can employ different power consumption design features, such as
`
`different transistor technologies. Id. Consequently, while the different types
`
`of processor cores can each execute the same instructions, “low power”
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`cores will “exhibit inherently lower power consumption (and processing
`
`performance) than the higher power core(s),” even when the low power core
`
`is operated at the same clock frequency as a higher power core. Id. (citing
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`Ex. 1001 at 3:53 – 4:16).
`
`
`
`6
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`
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`Because the two sets of cores consume different amounts of power
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`and offer different performance capabilities by virtue of their power
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`consumption design features, the cores are referred to as “asymmetric.” Id.
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`(citing Ex. 1001 at 1:17-20). The use of such asymmetric cores allows a
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`single processor to “scale up [it]s processing performance … as the system’s
`
`workload increases, and scale down [it]s processing performance … as the
`
`system’s workload decreases,”’ just as prior multicore processors did, but
`
`because processors designed according to the teachings of the ’080 patent
`
`incorporate inherently low power cores, such processors are able to “achieve
`
`an even lower power consumption in the lower/lowest performance/power
`
`states.” Ex. 1001 at 2:19-29, 3:50-62, 4:20-46.
`
`One power management strategy for processors that employ
`
`asymmetric cores in accordance with the teachings of the ’080 patent is
`
`described with reference to the patent’s Fig. 6, reproduced below. The
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`process begins with a multi-core processor in which multiple high power
`
`cores and at least one low power core are operating. Id. at Fig. 6 (601), 4:47–
`
`59. As demand on the processor decreases, the various high power cores are
`
`disabled one at a time, until all are disabled. Id. at 4:54 – 5:6. If all of the
`
`high power cores are disabled and the demand on the processor continues to
`
`drop, then in a similar fashion the low power cores are disabled one by one
`
`
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`7
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`
`
`
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`until only one low power core remains enabled and the processor’s lowest
`
`power state is reached. Id. at 5:25–35. During this process, before a core
`
`(high power or low power) is disabled, its individual operating frequency
`
`and/or supply voltage, or the operating frequencies and/or supply voltages of
`
`some or all of the enabled cores, may be reduced in response to the drop in
`
`demand. And, if only one low power core is operating, its operating
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`frequency and/or supply voltage may similarly be reduced until a lowest
`
`power consumption state is reached. Id. at 5:7-24, 28-49.
`
`
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`
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`8
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`
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`C. The Challenged Claims
`In keeping with the above-described teachings, claim 1 of the ’080
`
`patent recites:
`
`A multi-core processor comprising:
`a first plurality of cores and a second plurality of
`cores that support a same instruction set, wherein the
`second plurality of cores consume less power, for a same
`applied operating frequency and supply voltage, than the
`first plurality of cores; and
`power management hardware to, from a state
`where the first plurality of cores and the second plurality
`of cores are enabled, disable all of the first plurality of
`cores for a drop in demand below a threshold without
`disabling any of the second plurality of cores, wherein an
`operating system to execute on the multi-core processor
`is to monitor a demand for the multi-core processor and
`control the power management hardware based on the
`demand.
`
`Id. at 7:56 – 8:3.
`
`Independent claim 9 recites a method that includes operating a multi-
`
`core processor such that a first plurality of cores and a second plurality of
`
`cores execute a same instruction set, wherein the second plurality of cores
`
`consume less power, for a same applied operating frequency and supply
`
`voltage, than the first plurality of cores; and disabling with power
`
`
`
`9
`
`
`
`
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`management hardware, from a state where the first plurality of cores and the
`
`second plurality of cores are enabled, all of the first plurality of cores for a
`
`drop in demand below a threshold without disabling any of the second
`
`plurality of cores, wherein an operating system executing on the multi-core
`
`processor monitors a demand for the multi-core processor and controls the
`
`power management hardware based on the demand. Id. at 8:38-53.
`
`Independent claim 17 recites a non-transitory machine-readable medium
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`containing program code that, when processed by a machine, causes a
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`method as recited in claim 9 to be performed. Id. at 9:24-41.
`
`
`
`D. Claim Construction and the Level of Ordinary Skill in the
`Art
`In inter partes reviews such as this one, the Board applies the same
`
`claim construction standard used to construe a claim in a civil action under
`
`35 U.S.C. § 282(b). Changes to the Claim Construction Standard for
`
`Interpreting Claims in Trial Proceedings Before the Patent Trial and Appeal
`
`Board, 83 Fed. Reg. 51,340 (Oct. 11, 2018). Accordingly, the claims should
`
`be construed consistent with their plain and ordinary meaning as understood
`
`by a person of ordinary skill in the art as considered in the context in which
`
`the terms of the claims are used. Phillips v. AWH Corp., 415 F.3d 1303,
`
`1312-17 (Fed. Cir. 2005); Vitronics Corp. v. Conceptronics, Inc., 90 F.3d
`
`
`
`10
`
`
`
`
`
`1576, 1582 (Fed. Cir. 1996); see also ACTV, Inc. v. Walt Disney Co., 346
`
`F.3d 1082, 1088 (Fed. Cir. 2003) (“the context of the surrounding words of
`
`the claim also must be considered in determining the ordinary and customary
`
`meaning of those terms”). “The ordinary and customary meaning of a claim
`
`term is the meaning that the term would have to a person of ordinary skill in
`
`the art in question at the time of the invention.” Phillips, 415 F.3d at 1313.
`
`Furthermore, constructions are needed only to the extent necessary to
`
`resolve any asserted ground in the petition. Nidec Motor Corp. v. Zhongshan
`
`Broad Ocean Motor Co. Ltd., 868 F.3d 1013, 1017 (Fed. Cir. 2017) (only
`
`“terms ‘that are in controversy, and only to the extent necessary to resolve
`
`the controversy’” need be construed) (quoting Vivid Techs., Inc. c. Am. Sci,
`
`& Eng’g, Inc., 200 F.3d 795, 803 (Fed. Cir. 1999)).
`
`In its Institution Decision, the Board assessed MB USA’s proposed
`
`level of ordinary skill in the art as being “consistent with the prior art.”
`
`Paper 10 at 15. That proposed level of ordinary skill is: a person with “a
`
`bachelor’s degree in electrical engineering, computer science, computer
`
`engineering, material science, physics, applied physics, or a related field”
`
`who would have had “at least two years of experience in the research,
`
`design, development, or testing of electronic circuits or components or
`
`software for controlling electronic circuits or components, or the equivalent,
`
`
`
`11
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`
`
`
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`with additional education substituting for experience and vice versa.” Pet.
`
`14–15. The proposed definition is flawed insofar as it encompasses people
`
`with more than ordinary skill in the art—that is, by encompassing people
`
`with “at least” two years of experience in the designated field, it includes
`
`persons with far greater levels of experience and, therefore, is not limited to
`
`just persons of ordinary skill in the art. Patent Owner therefore uses the
`
`proffered definition of a person of ordinary skill in the art, but limits such
`
`individuals to those with two years of experience in the designated field in
`
`the analysis below. See Ex. 2006 at ¶ 25.
`
`Although the Board did not make any claim constructions as part of
`
`its Institution decision, see Paper 10 at 15, certain terms of the claims will be
`
`important for understanding distinctions from the prior art cited by
`
`Petitioner:
`
`
`
`1. Operating System
`All of the challenged independent claims recite “an operating system”
`
`that executes on a multi-core processor to monitor demand for the multi-core
`
`processor and control power management hardware based on the demand.
`
`Ex. 1001 at 7:66 – 8:3 (claim 1); 8:49-53 (claim 9); 9:37-41 (claim 17). The
`
`’080 patent cites examples of “operating systems,” including Apple’s
`
`
`
`12
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`
`
`
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`MacOS, Microsoft’s Windows, UNIX, and others. Id. at 7:31-35. A person
`
`of ordinary skill in the art would thus understand that the term “operating
`
`system” is used in the ’080 patent in its conventional sense. Ex. 2006 at ¶ 40.
`
`An ”operating system” is, and would be understood by a person of ordinary
`
`skill in the art to be, “The software that controls the allocation and usage of
`
`hardware resources such as memory, central processing unit (CPU) time,
`
`disk space, and peripheral devices.” Id. (citing Ex. 2007 at 378 (Microsoft
`
`Computer Dictionary); and see Ex. 2002 at 32:1 – 34:19.
`
`
`
`E.
`The IPR Petition
`In its petition, MB USA presents multiple grounds for the alleged
`
`unpatentability of the claims of the ’080 patent. Pet. at 5-6. In particular,
`
`Claims Challenged
`1–4, 7–12, 15–20, 23, 24
`
`35 U.S.C. § References
`103
`Sutardja1
`
`
`1 With respect to the grounds based on “Sutardja,” MB USA alleges Sutardja
`
`US PGPUB 2008/0288748 A1 (referred to as Sutardja ’748) incorporates by
`
`reference the disclosure of Sutardja US PGPUB 2008/0288748 A1 (referred
`
`to as Sutardja ’785) in its entirety and refers to the combined disclosures of
`
`Sutardja ’748 and Sutardja ’785 as “combined Sutardja” or just “Sutardja,”
`
`
`
`13
`
`
`
`
`
`
`5, 6, 13, 14, 21, 22
`7, 15, 23
`1–4, 7–12, 15–20, 23, 24
`5, 6, 13, 14, 21, 22
`
`103
`103
`103
`103
`
`Sutardja, Rychlik2
`Sutardja, Carmack3
`Mathieson,4 Sutardja
`Mathieson, Sutardja, Rychlik
`
`Id.
`
`
`
`III. THE PETITION FAILS TO DEMONSTRATE THAT ANY
`CHALLENGED CLAIM IS UNPATENTABLE
`A petition must be judged as it is written. The Board may not
`
`overlook flaws in the petition or reformulate its challenges to enhance their
`
`suitability. See SAS Inst. Inc. v. Iancu, 138 S. Ct. 1348, 1355 (2018) (“[I]t’s
`
`the petitioner, not the Director, who gets to define the contours of the
`
`
`in support of its asserted “single reference obviousness ground.” Pet. at 5
`
`n.2.
`
`2 US PGPUB 2011/0145615 A1.
`
`3 US PGPUB 2009/0309243 A1.
`
`4 US PGPUB 2011/0213950 A1. MB USA contends that Mathieson
`
`incorporates by reference the disclosure of Carmack in its entirety. Pet. 5
`
`n.5.
`
`
`
`14
`
`
`
`
`
`proceeding.”); see also id. (“[T]he petitioner is master of its complaint . . .”);
`
`see also id. at 1353 (forbidding the Board from “curat[ing]” the petition).
`
`Furthermore, because all of the challenges in the petition rely on conclusions
`
`of obviousness, the analyses set forth in the petition must include “some
`
`articulated reasoning with some rational underpinning to support the legal
`
`conclusion of obviousness.” KSR Int’l v. Teleflex Inc., 550 U.S. 398, 418
`
`(2007) (quoting In re Kahn, 441 F.3d 977, 988 (Fed. Cir. 2006)). The
`
`challenger must supply the factual basis for the challenge and “may not
`
`resort to speculation, unfounded assumptions or hindsight reconstruction to
`
`supply deficiencies in its factual basis.” In re Warner, 379 F.2d 1011, 1017
`
`(CCPA 1967). Additionally, in cases such as the present, where the
`
`obviousness challenges involve a modification or combination of teachings,
`
`the Petitioner must also establish that one skilled in the art would have had a
`
`reasonable expectation of success to make the modification or combination.
`
`Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd., 821 F.3d 1359, 1367-
`
`68 (Fed. Cir. 2016). The modification or combination must not “require a
`
`substantial reconstruction and redesign of the elements” in a reference or “a
`
`change in the basic principles under which [a reference] was designed to
`
`operate.” In re Ratti, 270 F.2d 810, 813 (CCPA 1959). Nor can the
`
`
`
`15
`
`
`
`
`
`modification or combination render a reference unsatisfactory or “inoperable
`
`for its intended purpose.” In re Gordon, 733 F.2d 900, 902 (Fed. Cir. 1984).
`
`Also, the prior art must be considered for all that it teaches, and a
`
`prima facie case of obviousness may be rebutted “by showing that prior art
`
`teaches away from claimed invention in any material respect.” In re
`
`Peterson, 315 F.3d 1325, 1331 (Fed. Cir. 2003).
`
`
`
`Last but not least, obviousness cannot be established by hindsight
`
`combination to produce the claimed invention, as the Supreme Court has
`
`emphasized:
`
`A factfinder should be aware, of course, of the
`distortion caused by hindsight bias and must be
`cautious of arguments reliant upon ex post
`reasoning. See Graham [v. John Deere Co.], 383
`U.S. [1,] 36, 86 S. Ct. 684, 15 L. Ed. 2d 545
`[(1966)] (warning against a “temptation to read
`into the prior art the teachings of the invention in
`issue” and instructing courts to “‘guard against
`slipping into use of hindsight’” (quoting Monroe
`Auto Equip. Co. v. Heckethorn Mfg. & Supply Co.,
`332 F.2d 406, 412 (6th Cir. 1964)).
`
`KSR, 550 U.S. at 421.
`
`As explained below, the petition’s challenge fails to demonstrate that
`
`any challenged claim is unpatentable.
`
`
`
`16
`
`
`
`
`
`
`
`A.
`
`Sutardja Fails to Teach or Suggest the Invention Recited in
`the Challenged Independent Claims
`MB USA’s first set of challenges are based on the teachings of
`
`Sutardja. Pet. at 21 et seq. As noted above, MB USA alleges that “Sutardja”
`
`encompasses the disclosures of both Sutardja ’748 and Sutardja ’785
`
`combined. Pet. at 5 n.2. Accordingly, in this Patent Owner Response,
`
`references to and arguments concerning “Sutardja” are directed to Sutardja
`
`’748 incorporating the disclosure of Sutardja ’785.
`
`
`
`1.
`Sutardja ’748
`Sutardja ’748 is a reference that was considered by the Examiner
`
`during prosecution of the application that became the ‘080 patent. Ex. 1004
`
`at 84. So too was the parent Sutardja application, U.S. PGPUB
`
`2008/0263324 (“Sutardja ’324”) (Ex. 2001), cited by the Examiner., id. at
`
`78, and even used in connection with rejections of the claims of the then-
`
`pending ’080 patent. Id. at 070-072. This is significant because Sutardja
`
`’324 contains the identical disclosure as Sutardja ’748, now relied upon by
`
`MB USA.5
`
`
`5 Under Petitioner’s logic, the disclosure of Sutardja’785 was considered
`
`during prosecution of the ’080 patent. Petitioner asserts that “Sutardja ’748
`
`
`
`17
`
`
`
`
`
`
`Sutardja ’748 relates to “dynamically switching cores of multi-core
`
`processing systems of mobile computing devices.” Ex. 1007 at [0002]. In
`
`particular, Sutardja ’748 describes so-called “core morphing,” in which
`
`“cores are dynamically enabled (i.e., activated) or disabled (i.e., deactivated)
`
`based on the system load,” id. at [0218], in the context of a multi-core
`
`
`incorporates by reference the disclosure of Sutardja ’785 and that therefore it
`
`is proper to treat “Sutardja combined” as a single reference. Pet. at 5 n.4
`
`Indeed, Petitioner repeatedly and throughout the Petition treats the two
`
`Sutardja references as a single reference because of this alleged
`
`incorporation. See, e.g., Pet. at 5 (identifying Ground 1 as based on
`
`“Sutardja alone (Ex-1007, incorporating Ex-1008”); 21 et seq. (applying the
`
`combined Sutardja (Ex. 1007, Ex. 1008) references as one vis-à-vis the
`
`challenged claims. Since Sutardja ’324 is identical to Sutardja’785 and
`
`likewise incorporates by reference Sutardja’785, see Ex. 2001 at p. 1 (63)
`
`(identifying Sutardja as a continuation-in-part of the application that became
`
`Sutardja ’785), then by considering the disclosure of Sutardja ’324, the
`
`Examiner also considered the disclosure of Sutardja ’785 in connection with
`
`the prosecution of the ’080 patent.
`
`
`
`
`
`18
`
`
`
`
`
`processing system with a low-speed, low-power (LP) core and a high-speed,
`
`high-power (HP) core. Id. at [0212]. When one core is active, other cores
`
`may be disabled (i.e., deactivated), for example, by being put in a standby
`
`mode or completely shut down, to save power. Id. at [0218]. In the HP
`
`mode, the HP core is in the active state and processes threads. The LP core
`
`may also operate during the HP mode. In other words, the LP core may be in
`
`the active state during all or part of the HP mode. Id. at [0223]. “When
`
`applications demand still higher performance than that provided by one HP
`
`core, multiple HP cores may be used.” Id. at [0219].
`
`
`
`2.
`Sutardja ’785
`Sutardja ’785 is the grandparent (through a continuation and
`
`continuation in part) of the application for Sutardja ’748. See Ex. 1007 at p.
`
`1 (63) (identifying U.S. Patent Application No. 12/215,760, as a
`
`continuation of U.S. Patent Application No. 12/145,160, which is a
`
`continuation-in-part of U.S. Patent Application No. 11/523,996, Sutardja
`
`’785). Sutardja ’785 describes a system on chip (“SOC”) that includes first
`
`and second processors, which each have active and inactive states, with the
`
`second processor consuming less power when operating in its active state
`
`than the first processor when operating in its active state. Ex. 1008 at [0009].
`
`
`
`19
`
`
`
`
`
`The SOC also includes a control module that communicates with the first
`
`and second processors and selectively transfers threads6 from the first
`
`processor to the second processor and selects the inactive state of the first
`
`processor. Id.
`
`
`
`3.
`
`Sutardja does not teach or suggest an operating
`system executing on a multi-core processor to monitor
`a demand for the multi-core processor and control
`power management hardware based on the demand,
`as claimed
`To find a claim unpatentable for obviousness, even “single reference
`
`obviousness” as advanced by MB USA in its petition, see Pet. at 5 n.4, it is
`
`necessary to show that “‘the differences between the subject matter sought to
`
`be patented and the prior art are such that the subject matter as a whole
`
`would have been obvious at the time the invention was made to a person
`
`having ordinary skill in the art.” Takeda Chem. Indus., Ltd. v. Alphapharm
`
`Pty, Ltd., 492 F.3d 1350, 1354-1355 (Fed. Cir. 2007) (quoting 35 U.S.C.
`
`§103(a)). This necessarily requires, among other things,
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