`Atalla et al.
`
`3,938,091
`11)
`(45) Feb. 10, 1976
`
`54 PERSONAL VERIFICATION SYSTEM
`75) Inventors: Martin M. Atalla, Portola Valley;
`Alexander F. Liu, San Jose, both of
`Calif.
`73) Assignee: Atalla Technovations Company,
`Sunnyvale, Calif.
`July 19, 1974
`(22) Filed:
`21 Appl. No.: 490,179
`Related U.S. Application Data
`63 Continuation of Ser. No. 235,641, March 17, 1972,
`abandoned.
`
`52 U.S. Cl...... 340/149 A; 340/152 R; 235/61.7 B
`(5ll Int. Cl............................................ G06K 9/00
`58 Field of Search.................... 340/149 A, 152 R;
`235/61.7 B, 61.6 R; 70/277; 17912 DP
`
`(56)
`
`3,457,39
`3,761,683
`
`References Cited
`UNITED STATES PATENTS
`7/1969 Yamamoto..................... 235/6.6 R
`9/1973 Rogers........................ 340/149 A X
`
`3,786,420
`3,794,813
`
`. 1/1974, Stambler......................... 340/149 A
`2/1974 Spetz .......................... 340/149 A X
`
`Primary Examiner-Harold I. Pitts
`Attorney, Agent, or Firm-A. C. Smith
`
`ABSTRACT
`(57)
`A customer code word issuing machine is provided
`wherein a customer manually inputs to the machine
`his secret password. The machine encodes the pass
`word and displays his corresponding issued code word.
`A verification machine is provided which includes a
`dial or keyboard for manually inputting the customer's
`password and the issued code word. The verification
`machine encodes the inputted password to derive an
`output for comparison with the manually inputted
`code word to derive an output indicative of the truth
`or falseness of the match of the code word with the
`respective password. The verification machine may be
`employed to open a lock, to allow use of a credit card
`for a telephone call, purchase of goods, etc.
`7. Claims, 21 Drawing Figures
`
`TELEPHONE CENTRAL OFFICE SYSTEM:
`
`REGISTERS
`
`7 DIGIT
`TELEPHONE No.
`
`CODING NO + PASSWORD
`
`
`
`
`
`
`THE
`VERIFICATION
`MACHINE
`
`
`
`
`
`
`
`
`
`IS
`THEREA TRUE
`MATCH7
`
`ISSUE NO GO"
`SIGNAL TO THE
`SUBSCRIBER
`
`ISSUESIGNAL SUCH AS HIGH
`PITCH TONE TO AUTHORIZE
`THE CALL MEANWHILE CONNECT
`THE SUBSCRIBER's LINE TO
`COMMUNICATION SYSTEM FOR
`PROPER OPERATION AND BILING
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 1 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 1 of 19
`
`3,938,091
`
`2
`
`3
`
`T
`MANUAL INPU
`
`DER
`ENCO
`
`l
`
`CODE
`"WORD DISPLAY"
`
`FIGURE 1.
`
`MANUAL
`INPUT
`
`
`
`
`
`SIGNAL
`ROUTING
`CONTROL
`
`
`
`
`
`ENCODER
`
`COMPARATOR
`
`
`
`TRUE OR FALSE
`INDICATOR
`
`FIGURE 6
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 2 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 2 of 19
`
`3,938,091
`
`
`
`12-POSITION AN KEYBOARD
`
`- - - - - - - - -
`
`MINC
`PROGRA's
`
`3-1N
`
`
`
`
`
`
`
`
`
`KEY TO CLOCK PUSE
`TRANSLATOR
`
`MULTI-NUMERIC DIGIT
`7-SEG. DISPLAYS
`
`a
`
`FEEDBACK (STATIC)
`SHIFT REGISTER
`
`7-SEGMENT DECODER
`
`a g
`
`8
`
`f
`EXCLUSIVE 'OR" GATES
`
`OCTAL CODE
`t
`PROGRAMMERS
`
`|
`
`PROGRAMMING
`--------------------------- -
`
`FIGURE 2
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 3 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 3 of 19
`
`3,938,091
`
`E75
`
`TT
`
`C O D E
`
`N U M B E R
`
`D I S P L A Y
`
`l
`
`
`
`ISSUING
`MACHINE
`
`ALPHA-NUMERIC KEYBOARD
`
`6
`
`o
`
`()
`
`INTERROGATE
`
`FIGURE 3
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 4 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 4 of 19
`
`3,938,091
`
`
`
`PRESS
`"INTERROGATE" BUTTON
`
`
`
`
`
`
`
`
`
`
`
`FIGURE l;
`
`
`
`
`
`
`
`
`
`
`
`
`
`IS
`"READY" STATUS
`LIGHT OFF
`2
`
`
`
`YES
`ENTER THE St LETTER
`OF THE n-LETTER PASS
`WORD WIA KEYBOARD
`
`ENTER THE NEXT LETTER
`OF THE PASS WORD
`
`ARE
`ALL in LETTERS
`ENTERED
`?
`
`YES
`
`DEPRESS
`"INTERROGATE SWITCH
`
`8 DIGIT CODE NUMBER
`APPEARS ON
`"CODE NUMERIC DISPLAY"
`
`PRESS
`"INTERROGATE" BUTTON
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 5 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 5 of 19
`
`3,938,091
`
`
`
`| | | |
`
`| | |
`
`Zo
`
`
`
`|31\!9 T-10{||||||||||||
`
`- -, m- - - - - - - - - - - -
`
`SENIT 8
`
`--------------------
`
`OO
`
`
`
`
`
`
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 6 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 6 of 19
`
`3,938,091
`
`-------------------------
`
`O
`
`
`
`I LTD WONOW
`
`
`
`(LOHS HN0)
`
`
`
`(LOHS 3N0)
`
`H01 WO IONI CIET
`
`AQW38 10N
`
`AG 1+
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 7 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 7 of 19
`
`3,938,091
`
`
`
`L5
`
`PROGRAMMING
`
`
`
`
`
`
`
`
`
`
`
`12 POSITION
`ALPHA-NUMERIC KEYBOARD
`
`SIGNAL ROUTING CONTROL
`
`KEY TO CLOCK
`TRANSLATOR
`
`
`
`
`
`"TRUE OR "FALSE MATCH
`
`FEEDBACK (STATIC)
`SHIFT REGISTERS
`
`
`
`PARALLEL BINARY
`COMPARATOR
`
`EXCLUSIVE "OR" GATES
`
`BUFFER SHIFT REGISTERS
`
`FIGURE 7
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 8 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 8 of 19
`
`3,938,091
`
`
`
`WERIFICATION
`MACHINE
`
`NOT READY
`
`INTERROGATE
`
`65
`
`67
`
`FIGURE 8
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 9 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 9 of 19
`
`3,938,091
`
`
`
`CLERK ENTERS
`CUSTOMER'S CODE NO.
`ON THE CARD OR CHECK
`WIA KEYBOARD
`
`PRESS
`"INTERROGATE
`SWITCH
`
`OBSERVE "TRUE" AND
`"FALSE" STATUS LIGHTS,
`ONE OF THEM SHOULD BE ON
`
`
`
`"READY" LIGHT OFF
`
`
`
`
`
`PRESS
`"INTERO"
`BUTTON
`
`IS
`"READY" STATUS
`LIGHT OFF
`?
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`CUSTOMER ENTERS THE 1ST
`LETTER OF THE N-LETTER
`PASS WORD VIA THE
`KEYBOARD
`
`ENTER THE NEXT LETTER
`OF THE PASS WORD
`
`ARE
`ALL N LETTERS
`ENTERED
`?
`
`IS
`"READY" STATUS
`LIGHT ON
`?
`
`
`
`YES
`
`
`
`PRESS
`"INTERROGATE"
`SWITCH
`
`FIGURE 9
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 10 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 11 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 12 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 13 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 13 of 19
`
`3,938,091
`
`I, TOUCH - TONE TELEPHONE
`
`PICK UP HAND SE
`
`HANG UP
`HAND SET
`
`KEY - IN
`SYSTEM PHONE it
`
`LISTEN TO
`PHONE RECEIVER
`
`IF
`HIGH PITCH
`TONE PRESENT FOR A
`FEW SECONDS
`
`
`
`
`
`
`
`
`
`
`
`NOTE:
`. BEGINING SYNC CHARACTER
`PRESS a UWW is KEY
`MORE THAN 2 SECONDS
`
`2. END ING SYNC CHARACTER
`PRESS e XYZ is KEY
`MORE THAN 2 SECONDS
`
`* AN OVERLAY OF A KEYBOARD
`FORMAT SUCH AS FIGURE 8
`TO BE PUT ON THE TOUCH
`ONE PHONE KEYBOARD
`
`CLERK ENTERS
`CUSTOMER'S
`CODING NO.
`
`ENER e UWW is KEY FOR
`MORE THAN 2 SECONDS
`
`PRESS
`INTERROGATE"
`SWITCH
`
`OBSERVE "TRUE"
`OR "FALSE"
`OUTPUTS
`
`THEN ENTER PASS WORD
`
`KEY FOR
`PRESS - XYZ
`MORE THAN 2 SECONDS
`
`FIGURE 12
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 14 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 14 of 19
`
`3,938,091
`
`
`
`7 DIGIT
`TELEPHONE NUMBER
`
`PASS WORD OF
`WARIOUS LENGTH
`
`238-0769
`
`BLUE SKY
`
`TELEPHONE CREDIT CARD
`
`
`
`MR., JOHN DOE
`7346
`
`2380769BLUESKY
`
`KEY CODE
`
`THE ISSUING
`MACHINE
`
`4. DIGIT
`CODING NUMBERS
`
`7346
`
`
`
`PRINTED ON THE
`TELEPHONE CARD.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`FIGURE 13
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 15 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 15 of 19
`
`3,938,091
`
`PICK UP HAND SET
`
`HANG UP
`HAND SET
`
`KEY IN SYSTEM
`PHONE NUMBER
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`IF
`HIGH PITCH TONE
`PRESENT FOR A FEW
`SECONDS?
`
`ENTERe UWW cle KEY
`FOR MORE THAN 2 SECONDS
`
`ENTER KEY CODE
`PLUS CODING NO
`23807697346 BLUE SKY"
`
`KEY
`PRESS WYZ
`FOR MORE THAN 2 SECONDS
`
`HIGH PITCH
`TONE PRESENT FOR
`A FEW SECONDS
`
`YES
`
`
`
`
`
`G0 AHEAD PRESS
`THE NUMBER HE WANTS
`
`FIGURE 14
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 16 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 16 of 19
`
`3,938,091
`
`TELEPHONE CENTRAL OFFICE SYSTEM
`
`REGISTERS
`
`7 DIGIT
`TELEPHONE NO + CODING NO + PASS WORD
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`THE
`WERIFICATION
`MACHINE
`
`IS
`THERE A TRUE
`MATCH
`
`
`
`ISSUE SIGNAL SUCH AS HIGH
`PITCH TONE TO AUTHORIZE
`THE CALL MEANWHILE CONNECT
`THE SUBSCRIBER'S LINE TO
`COMMUNICATION SYSTEM FOR
`PROPER OPERATION AND BILLING
`
`FIGURE 15
`
`ISSUE NO GO"
`SIGNAL TO THE
`SUBSCRIBER
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 17 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 17 of 19
`
`3,938,091
`
`EXTERNAL
`PROGRAMMER
`
`
`
`THE VERIFICATION
`MACHINE
`
`SIGNAL
`
`DRIVER
`
`5
`
`71
`
`FIGURE 16
`
`
`
`
`
`SOENOID OF LOCK
`MECHANISM
`
`72
`
`
`
`
`
`
`
`OPERATION
`
`KEY se AB 1 a
`FOR MORE THAN 3 SECONDS
`
`ENTER PASSWORD
`(WIA KEYBOARD)
`
`KEY is CD2 is
`FOR MORE THAN 3 SECONDS
`
`ENTER WIA KEYBOARD
`CODE WORD
`
`
`
`
`
`
`
`
`
`
`
`SYNC KEYS CAN BE PICKED,
`2 OUT IF 12 COMBINATION.
`- ADDITIONAL PROGRAMMER
`
`IF THERE IS A MATCH,
`THE LOCK SHOULD OPEN
`
`FIGURE 17
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 18 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 18 of 19
`
`3,938,091
`
`
`
`GO OR TELEPHONE
`POLICE STATION TO
`PROVIDE YOUR PASS
`WORD
`
`VIA THE ISSUING MACHINE,
`THE PASS WORD IS
`ENCODED INTO 8 DIGIT
`CODING NO.
`
`ANY WALUABLE PERSONAL
`PROPERTY IS PRINTED
`WITH THE CODING NO FOR
`OWNERSHIP IDENTIFICATION
`
`FIGURE 18
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 19 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`U.S. Patent Feb. 10, 1976
`
`Sheet 19 of 19
`
`3,938,091
`
`
`
`
`
`
`
`
`
`
`
`
`
`ASSUME THERE IS A
`CODING NO, PRINTED
`ON THE TW SET
`
`THROUGH THE
`WERIFICATION MACHINE,
`ENTER YOUR PASS WORD
`
`THE POLICE ENTER
`THE CODING NO.
`APPEARED ON THE TW
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`THE TW SET MAY
`NOT BE YOURS
`
`NO
`
`IS
`THERE A
`?
`
`MATCH"
`
`
`
`YOU PROWE THAT
`THE LOST TV SET
`IS YOURS
`
`FIGURE 19
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 20 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`1
`
`encoder.
`
`-
`
`- -
`
`5
`
`40
`
`45
`
`55
`
`60
`
`. .
`
`.
`
`65
`
`20
`
`25
`
`30
`
`35
`
`PERSONAL VERIFICATION SYSTEM
`CROSS REFERENCE TO RELATED APPLICATION
`This is a continuation of application Ser. No.
`235,641, filed Mar. 17, 1972 now abandoned.
`DESCRIPTION OF THE PRIOR ART
`Heretofore, systems for identifying the bearer of an
`identification card have been provided wherein crypto
`10
`graphically encoded information on the card is com
`pared to a randomly scrambled representation of a
`number privately known to the card bearer. Compari
`son is made by insertion of the identification card into
`a card reading means, and by manual insertion of the
`privately known number into a number receiving
`means such as a keyboard. The two numbers may be
`sent to a comparator on a digital basis. Should the
`comparison be exact the card holder will be positively
`identified. Such a system is disclosed and claimed in
`U.S. Pat. No. 3,609,690 issued Sept. 28, 1971 and
`another similar system for dispensing money from a
`bank is disclosed and claimed in U.S. Pat. No.
`3,588499 issued June 28, 1971.
`The problem with these prior art personal verifica
`tion systems is that they are relatively complex requir
`ing a card reader to read a code number embossed or
`otherwise formed in a card. Card readers are relatively
`expensive devices. As a result, the prior systems have
`been too costly to implement, especially when a rela
`tively large number of verifiers are required such as
`would be contemplated by widespread use of credit
`cards. That is, each merchant, filling station operator,
`or the like would be required to have a number of such
`units. Therefore, the cost of the prior art devices has
`heretofore been considered prohibitive.
`SUMMARY OF THE PRESENT INVENTION .
`The principal object of the present invention is the
`provision of an improved personal verification system.
`In one feature of the present invention, a code word
`issue machine is provided which includes means for
`manually inputting a first word to an encoder means to
`produce a second word corresponding to an encoded
`version of the first word. A display means is responsive
`to the output of the encoder for displaying the second
`or code word, whereby the customer may issue to him
`self the code number corresponding to this privately
`known and self devised password, such password being
`easily remembered because it is of his own choosing.
`50
`In another feature of the present invention, an en
`coder is provided which includes a number of program
`mable stages for changing the code of the encoder,
`whereby a universal encoder design may be readily
`programmed to provide any one of a number of differ
`ent codes by merely inserting an appropriate program
`ming plug into the encoder which hard wires the uni
`versal encoding circuit in a certain manner to provide a
`certain code. A number of such programming plugs
`may be readily inserted for changing the code of the
`In another feature of the present invention, a verifi
`cation machine is provided which includes means for
`manually inputting first and second words, one of said
`words purporting to be an encoded version of the
`other. The verification machine includes an encoder
`which encodes the inputted password and compares, it
`with the inputted code word to derive an output deter
`
`3,938,091
`2
`minative of the truth of a match between the two com
`pared words.
`In another feature of the present invention, a verifi
`cation machine includes a common manual inputting
`means, such as a keyboard or dial, for inputting the
`password and the purported code word with signal
`routing means for routing one of the inputted code
`words around an encoder which receives the password,
`whereby a time share of the common input terminal is
`obtained with an attendant reduction in size and cost of
`the verification machine.
`In another feature of the present invention, a verifi
`cation machine employs a telephone as a manual input
`ting terminal which is connected over a telephone link
`to an encoder and comparator portion of the verifica
`tion machine at a remote location, whereby long dis
`tance verification is obtainable utilizing existing equip
`nent,
`In another feature of the present invention, a tele
`phone credit card call is verified by having the sub
`scriber input over the telephone to a central verifying
`machine his telephone number, password and code
`word. At the central verifier, the telephone number and
`password are encoded and the code word is compared
`with the encoded words to derive an output determina
`tive of the truth or falsity of the match of the compared
`words. A truth output, in one embodiment, is employed
`for completing a circuit to enable the subscriber to dial
`his call.
`In another feature of the present invention, the out
`put of a verification machine of the present invention is
`employed for releasing a lock to permit access to a
`secure area or region upon proper verification of a
`manually inputted password and code word.
`In another feature of the present invention, a re
`corder is provided in conjunction with a verifying ma
`chine of the present invention for recording the code
`word of a successful verification such that a log is ob
`tained of those persons obtaining verification of a pass
`word and code word.
`Other features and advantages of the present inven
`tion will become apparent upon a perusal of the follow
`ing specification taken in connection with the accom
`panying drawings wherein:
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a schematic block diagram of a code word
`issuing machine of the present invention,
`FIG. 2 is a more detailed schematic block diagram of
`the issuing machine of FIG. 1,
`FIG. 3 is a plan view of the housing of a code issuing
`machine of the present invention,
`FIG. 4 is a logic flow chart for the code word issue
`machine of FIGS. 1-3,
`FIGS. 5a and 5b are a simplified circuit diagram,
`partly in block diagram form, depicting the logic cir
`cuitry of the code word issue machine of FIGS. 1-4,
`FIG. 6 is a schematic block diagram of a verification
`machine of the present invention,
`FIG. 7 is a schematic block diagram of the verifying
`machine of FIG. 6 but shown in more detail,
`FIG. 8 is a plant view of the housing of a verifying
`machine of FIGS. 6 and 7.
`FIG. 9 is a logic program flow diagram for the verify
`ing machine of FIGS. 6-8,
`FIGS. 10a and 10b are a simplified logic circuit dia
`gram, partly in block diagram form, for the verification
`machine of FIGS. 6-9,
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 21 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`O
`
`5
`
`20
`
`30
`
`3,938,091
`3
`4
`FIG. 11 is a schematic diagram for the comparator
`to the input of a 24 bit feedback static shift register 6.
`circuit of FIG. 10,
`The feedback shift register 6 is programmed by a plu
`FIG. 12 is a logic program flow chart for a telephone
`rality of exclusive OR gates 7 for generating a 24 bit
`operated verification machine of FIGS. 6-11,
`output in response to each of the inputted characters.
`FIG. 13 is a schematic block diagram of a code word
`Each of the characters inputted to the feedback shift
`issue machine for issuing a code word for a telephone
`register 6 causes the state of the shift register 6 to be
`credit card user,
`shifted by the predetermined number of positions ac
`FIG. 14 is a logic program flow chart for verifying a
`cording to the number of pulses inputted for the corre
`telephone credit card call and employing a verification
`sponding key.
`machine of FIGS. 6-11,
`After the word has been completely inputted to the
`FIG. 15 is a logic program flow chart for caller verifi
`shift register 6, the output state of the feedback shift
`cation at the central telephone office,
`register 6 is read-out to a multi-numeric digit 7-seg
`FIG. 16 is a schematic diagram, in block diagram
`ment display via the intermediary of an octal-code
`form, of a lock incorporating the verification machine
`programmer 8 and a 7-segment decoder 9. The de
`of the present invention,
`coder 9 decodes the octal-code to 7-segment code for
`FIG. 17 is a logic program flow chart for the lock of
`display by the multi-numeric display 4.
`FIG. 16,
`Referring now to FIG. 5a and b there is shown a
`FIG. 18 is a logic program flow chart for a scheme for
`simplified logic functional block diagram for the code
`identification of property with a code word, and
`issue machine 1. The individual keys 11 of the key
`FIG. 19 is a logic program flow chart for verifying
`board 2 are individually connectable to a grounded bus
`ownership of property marked with an issued code
`12 by depressing or actuating the key. One output from
`number.
`each of the keys 11 is fed to the corresponding input of
`an NAND gate 13 for generating an output which trig
`gers a one-shot 14 to produce a negative pulse on line
`15. Each of the individual keys 11 is also connected to
`a corresponding input of a 12-bit latch 16, such 12-bit
`latch 16 being formed, for example, by three model
`9322 integrated circuits. Thus, whenever a key 11 is
`depressed, one of the lines connected with the key
`provides a 0 (low) signal to both the 12-bit latch 16 and
`the NAND gate 13.
`The output of the NAND gate 13 fires the one-shot
`14 to generate a negative going pulse to the parallel
`enable input 15 of a 12-bit UP binary counter 17 to
`load the twelve bit latch contents into the 12-bit UP
`binary counter 17. Initially, the 12-bit UP binary
`counter 17 is resting at an all 1 state, i.e. the terminal
`count output is a “high' which when inverted through
`an inverter 18 provides a "low' to the count enable
`pulse input terminal of the 12-bit binary counter 17 to
`disable the binary counter 17. The binary counter 17
`comprises, for example, three model 9316 integrated
`circuits.
`As soon as a key 11 is depressed, a set of twelve bits
`is loaded from the latch 16 into the binary counter 17
`and the terminal count on the binary counter 17 drops
`to a low which when inverted by inverter 18 produces
`a high count enable pulse causing the binary counter 17
`to count from the loaded state up to an all 1 state which
`makes the terminal count high. The high is inverted by
`inverter 18 to a low which disables the binary counter
`17 to terminate the counting function. Thus, the output
`of the inverter 18 is a high pulse of a duration corre
`sponding to the time it takes the binary counter 17 to
`count clock pulses from the state loaded into the binary
`counter to a terminal all 1 state. Thus, the operating
`time of the counter 17 is a function of the bit state
`loaded into the binary counter 17, which in turn de
`pends upon which one of the individual key 11 was
`depressed.
`The output of the inverter 18 is also fed to one input
`of a NAND gate 19 to which the output of the clock
`generator 21 is also connected. Thus, the NAND gate
`19 serves to gate the clock pulses to the input of a
`24-bit shift register 22. The number of clock pulses
`which are gated to the shift register 22 is dependent
`upon the duration of the count of the binary counter
`17. The 24-bit shift register 22 may comprise, for ex
`
`DESCRIPTION OF THE PREFERRED
`EMBODEMENTS
`Referring now to FIG. 1, there is shown, in schematic
`block diagram form, the code word issue machine 1 of
`the present invention to be employed in the personal
`verification system of the present invention. The code
`word issue machine 1 includes a manual input terminal
`2, such as a keyboard, telephone dial or the like. The
`person, wishing to have issued to himself a code word
`in acccordance with his preconceived secret password,
`manually inputs the password on the keyboard 2. The
`password is fed to the input of an encoder 3 which
`encodes the password into an output coded word which
`is fed to a code word display 4. Thus, in its simplest
`terms, the code word issue machine 1 includes means
`for manually inputting a first word to produce a code
`word input corresponding to the inputted word.
`40
`As used herein, the terms "word' and "number' are
`interchangeable and the word or number may include
`all numerical characters, all alphabetic characters or a
`mixture of alphabetic and numeric characters. Also the
`term "encoder' may be interchanged with the term
`“decoder' since all that is required in the code word
`issue machine 1 is that there be a first word related to
`a second word or output word by means of a code.
`Either the first or second word may be employed as a
`secret password to be matched with the other word
`through the intermediary of a code.
`Referring now to FIG. 2, there is shown in greater
`detail a functional block diagram of a preferred em
`bodiment of a code word issue machine 1. In this em
`bodiment, the manual input terminal 2 includes a 12
`55
`key alpha-numeric keyboard 2, such as a Chromeric's
`Model ER20070 keyboard. The keyboard 2 preferably
`has an alphanumeric format as shown in FIG. 3. By
`grouping two letters and one numeral on each of the
`first 10 keys, and by grouping three letters on each of
`the 11th and 12th keys, all of the letters of the alphabet
`and ten numerals may be accommodated on 12 keys.
`The output of the alpha-numeric keyboard 2 is fed to
`a key-to-clock pulse translator 5 for generating a train
`of pulses. Each pulse train having a different predeter
`mined number of pulses corresponding to a respective
`different one of each of the 12 keys of the keyboard.
`The output of the key-to-clock pulse translator 5 is fed
`
`35
`
`45
`
`50
`
`60
`
`65
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 22 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`5
`
`10
`
`15
`
`S
`ample, six model 9300 integrated circuits.
`Thus, the NAND gate 13, one-shot 14, latch 16,
`binary counter 17, clock generator 21, inverter 18 and
`gate 19 serves to form the key-to-clock pulse translator
`5 as described above with regard to FIG. 2. The output
`of the key-to-clock pulse translator 5 is a train of pulses
`with the number of pulses in each train corresponding
`to the particular key actuated on the alpha-numeric
`keyboard 2.
`A plurality of exclusive OR gates 23 are hard wired
`into the 24-bit shift register 22 in the conventional
`manner to provide a plurality of feedback paths to the
`input of the 24-bit feedback shift register 22 for pseu
`do-randomizing the states of the register 22. The 24-bit
`shift register 22 is initialized to an all 0 starting state by
`depressing an interrogate switch 25 (see FIG. 3) which
`grounds the input of a one-shot. multi-vibrator 26,
`which in turn toggles a flip-flop. 27. The Q output of
`flip-flop. 27 is toggled from a low to a “high". The
`"high' fires a second one-shot multi-vibrator 28, the
`20
`negative output pulse of which is fed to the MR termi
`nal of the shift register 22 to reset the shift register 22
`to an all 0 state.
`The Q corresponding low output of the flip-flop. 27 is
`connected via lead 31 to the high side of a light emit
`25
`ting diode 32 for grounding the high side of the light
`emitting diode 32, thereby extinguishing the diode 32
`which is a NOT READY indicator on the front panel of
`the issue machine 1 (see FIG. 3). Thus, when the NOT
`READY light is extinguished this gives a ready indica
`30
`tion to the customer or operator to start entering his
`password on the keyboard 2.
`As the individual keys 11 are depressed the corre
`sponding numbers of pulses are generated and fed to
`the 24-bit shift register 22 for encoding. Thus, upon
`entering all the letters of the password the 24-bit shift
`register 22 will be in a final state corresponding to the
`encoded version of the particular password that has
`been entered.
`The output of the 24-bit shift register 22 is wired into
`40
`the input of a 24-bit input multiplexer 35 by means of
`a hard wire program that may be changed as desired, as
`more fully described below. In a typical example, the
`24-bit input multiplexer 35 comprises three model
`9312 integrated circuits. An output of the clock gener
`45
`ator 21 is fed to one input a binary counter 36, such as
`a model 9356 I.C. for generating three binary outputs
`on terminals Q1, Q2 & Q3. The three outputs of the
`binary counter 36 are fed to the three control input
`50
`terminals of the multiplexer 35. The three outputs of
`the binary counter 36 are also fed to the input of a
`one-of-10 decoder 37, such as a 9301 integrated cir
`cuit. Eight of the outputs of the one-of-10 decoder 37
`are fed to an eight character strobing driver 38 which
`55
`serves to drive the eight character numeric display 4.
`The output of the 24-bit shift register 22 is grouped
`into eight octal number three bit groups wherein each
`octal number is derived from each three bit group out
`put of the shift register 22. There are a minimum of
`60
`6,072 combinations available. Each different combina
`tion can be implemented as one unique code. The three
`bit octal code group output of shift register 22 and
`multiplexer 35 is adapted to eliminate any ambiguity in
`a 7-segment numerical display 4. The digit octal code
`groups are multiplexed to a 7-segment decoder 39 from
`the output of the twenty four input multiplexer 35. The
`output of the 7-segment decoder 39 is fed to the input
`of a 7-segment driver 41 such as a 9307 integrated
`
`3,938,091
`6
`circuit. And the output of the 7-segment driver 41 is
`fed to the input of the eight character numeric display
`4.
`When the interrogate switch 25 was initially operated
`to extinguish the NOT READY light 32 and to reset the
`24-bit shift register 22 to an all 0 state, a high output
`from the flip-flop. 27 was fed through an inverter 42 to
`the RBO control terminal of the 7-segment decoder 39
`to disable the decoder and to disable the eight charac
`ter numeric display 4 during the time the operator is
`inputting the password into the 24-bit shift register 22.
`After the password has been inputted, the operator
`again actuates the interrogate switch 25 which ener
`gizes the one-shot 26 to change the state of the flip-flop
`to a low on terminal Q and a high on terminal Q. The
`high on terminal O energizes the NOT READY light.
`The low on terminal Q is passed through the invertor
`42 to the RBO input of the 7-segment decoder 39
`thereby enabling the decoder 39 to cause the output of
`the multiplexer 35 to be strobed by the binary counter
`35 into the eight character numeric display 4 for dis
`playing the code word corresponding to the inputted
`password.
`After the password has been issued or read from the
`display 4, the interrogate switch 25 is again actuated
`which causes the flip-flop. 27 to shift to a high on termi
`nal Q and a low on terminal Q, thereby turning out the
`NOT READY light 32 and resetting the shift register
`22 to all 0's. Code issue machine 1 is then again in a
`condition to have a new password inputted to the key
`board 2.
`There are a number of places in the encoder circuitry
`of FIG. 5 where insertion of a programming plug will
`serve to hard wire different elements together in a
`different pattern to result in changing the code of the
`encoder. More particularly, such a programming plug
`may be inserted between the 12-bit latch 16 and the
`12-bit UP binary counter 17 to effectuate a change in
`the code of the encoder. A second place where a pro
`gramming plug may be inserted for changing the code
`is in the hard wire program between the 24-bit shift
`register 22 and the 24-bit input multiplexer 35. The
`code may also be changed by a programming plug
`inserted between the 24-bit shift register 22 and the
`exclusive OR gates 23 for changing the connections
`therebetween and the program of the feedback shift
`register 22. The program of the encoder may also be
`changed by a programming plug inserted between the
`multiplexer 35 and the 7-segment decoder 39 or be
`tween the 7-segment decoder 39 and the 7-segment
`driver 41. Thus, it is seen that the code of the encoder
`of FIG. 5 may be changed by substitution of a different
`programming plug serving to change the hard wire
`connections at five different stages in the encoder. A
`logic flow chart for the code word issue machine of
`FIG. 5 is shown in FIG. 4.
`Referring now to FIG. 6, there is shown a verification
`machine 45 incorporating features of the present in
`vention. The verification machine 45 includes a manual
`input terminal 2 the output of which is fed to a signal
`routing control 46 for routing the manually inputted
`password to the encoder 3 to derive a corresponding
`code word. The actually encoded code word is fed to
`one input of a comparator 47 for comparison with the
`manually inputted code word routed by signal routing
`control 46 around the encoder 3 to the other input of
`the comparator 47.
`
`35
`
`65
`
`UNIFIED PATENTS EXHIBIT 1010
`Page 23 of 27
`
`JPMORGAN EXHIBIT 1010
`
`
`
`3,938,091
`7
`8
`In the comparator 47, the code word is compared
`translator 5 for gating the output of the latches 16 into
`with the encoded password to derive an output indica
`the 12-bit UP binary counter 17. Thus, in the first oper
`ating state (customer entry mode), actuation of the
`tive of the truth or falsity of the match between the
`password and the purported code word. The truth out
`keys 11 causes the corresponding password to be en
`put of comparator 47 is fed to a true or false indicator
`tered into the feedback shift register 6, as previously
`48, thereby verifying or not verifying that the operator
`described with regard to FIG. 5.
`is in possession of a valid password and corresponding
`After the customer has entered his password, he
`code word.
`depresses the interrogate switch 25 to cause the
`Referring now to FIG. 7, there is shown a block dia
`counter 53 to count to the next higher count and the
`gram similar to that of FIG. 6 but in slightly greater
`decoder 54 to decode that count for actuation of the
`detail. Verifier machine 45 is similar in many respects
`second output line to put the verifier in the second or
`clerk entry operating state. This state also produces a
`to the code word issue machine 1 of FIG. 2. More
`particularly, the same identifying numbers have ben
`low on the first output line of the decoder 54 which
`employed to identify the same elements in both ma
`when inverted by inverter 50 excites the NOT READY
`chines. Thus, the output of the twelve position alpha
`15
`indicator light 32 and disables the translator gate 55
`numeric keyboard 2 is fed to the signal routing control
`such that keying of the keyboard does not transfer
`46. When the password is being manually inputted the
`information into the feedback shift register 6.
`signal routing control 46 feeds the password to the
`Each of the keys 11 of the keyboard 2 is also con
`key-to-clock pulse translator 5 for generating a train of
`nected to a respective input of a 12 key position-to
`pulses. Each pulse train has a certain number of pulses
`20
`octal converter 56 (see FIG. 10b), such as a model
`corresponding to the