PTO/SB/122 (11-08)
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`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unlessit displays a valid OMB control number.
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`
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`Application Number
`!
`
`herewit
`Steven Morein
`
`
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`
`
`
`
`
`
`
`CHANGE OF
`CORRESPONDENCE ADDRESS
`
`
`Application
`
`
`
` Art Unit
`
`
`Addressto:
`Commissioner for Patents
`
`
`P.O. Box 1450
`Examiner Name
`
`
`
`Alexandria, VA 22313-1450
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` Attorney Docket Number 00100.36.0001
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`Telephone
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`Please change the Correspondence Addressforthe above-identified patent application to:
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`data associated with an existing Customer Numberuse “Request for Customer Number Data Change” (PTO/SB/124).
`
`| am the:
`J Applicant/Inventor
`C] Assignee ofrecord of the entire interest.
`Statement under 37 CFR 3.73(b) is enclosed. (Form PTO/SB/96).
`
`Attorney or agent of record. Registration Number 34,414
`
`C Registered practitioner named in the application transmittal letter in an application without an
`executed oath or declaration. See 37 CFR 1.33(a)(1). Registration Number.
`
`.
`
`/Christopher J. Reckamp/
`Signature
`Ghristopher J. Reckamp
`Typed or Print
`Name
`
`Date May 17, 2011
`
`312-609-7599
`
`NOTE: Signaturesofall the inventors or assignees of record of the entire interest or their representative(s) are required. Submit multiple
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`PTO/SB/14 (11-08)
`Approved for use through 09/30/2010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Under the Paperwork Reduction Act of 1995, no persons are required to respond to a collection ofinformation unless it contains a valid OMB control number.
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`Attorney Docket Number|00100.36.0001
`Application Data Sheet 37 CFR 1.76
`—
`Application Number
`
`
`
`Title of Invention|GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`
`
`
`
`
`
`The application data sheetis part of the provisional or nonprovisional application for whichit is being submitted. The following form contains the
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`This document may be completed electronically and submitted to the Office in electronic format using the Electronic Filing System (EFS) or the
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`
`Secrecy Order 37 CFR 5.2
`[_] Portions orall of the application associated with this Application Data Sheet mayfall under a Secrecy Order pursuantto
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`Applicant Information:
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`Applicant 1
`Applicant Authority @Inventor | ©)Legal Representative under 35 U.S.C. 117
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`Prefix) Given Name
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`Middle Name
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`Family Name
`
`Suffix
`
`|Party ofInterest under 35 U.S.C. 118
`
`
`
`
`Stephen
`
`Residence Information (Select One)
`(@) US Residency
`©) NonUS Residency
`() Active US Military Service
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`
`City|Cambridge State/Province|MA Country of Residencei|US
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`
`Citizenship under 37 CFR 1.41(b)i
`
`US
`
`Mailing Address of Applicant:
`
`Address 1
`
`Address 2
`
`10 Magazine
`
`Apt. 801
`
`
`Applicant 2
`
`
`Applicant Authority (#)Inventor|()Legal Representative under 35 U.S.C. 117 ©Party of Interest under 35 U.S.C. 118
`
`
`
`
`aweie
`Residence Information (Select One) () US Residency
`(@) NonUS Residency
`() Active US Military Service
`
`Citizenship under 37 CFR 1.41(b)i
`
`Mailing Address of Applicant:
`Address 1
`124 Parenchere
`
`Address 2
`
`Postal Code
`
`JOW 6A5
`
`CA
`
`Applicant 3
`
`
`
`|Party of Interest under 35 U.S.C. 118
`Applicant Authority @!nventor | (Legal Representative under 35 U.S.C. 117
` Er
`
`Prefix)GivenName= Middle Name Family Name Suffix
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`
`
`() Active US Military Service
`©) NonUSResidency
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`Residence Information (Select One)
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`Arlington Country of Residencei|USState/Province Realtek Ex. 1002
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`PTO/SB/14 (11-08)
`Approved for use through 09/30/2010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Underthe Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`
`Attorney Docket Number|00100.36.0001
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`
`Application Data Sheet 37 CFR 1.76
`
`
`
`
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`Title of Invention
`
`
`Application Number
`
`Citizenship under 37 CFR 1.41(b)i
`Mailing Address of Applicant:
`Address 1
`215 Pleasant Street
`
`US
`
`Address 2
`
`City
`
`Arlington
`
`Postal Code
`
`02476
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`State/Province
`
`MA
`
`us
`
`
`
`Applicant 4
`
`
`
`
`
`
`
`Applicant Authority @!nventor|(Legal Representative under 35 U.S.C. 117 C)Party of Interest under 35 U.S.C. 118
`Prefix)GivenName Middle Name
`Family Name
`Suffix
`
`
`
`
`Skende
`
`Residence Information (Select One)
`(} US Residency
`©) NonUS Residency
`(©) Active US Military Service
`State/Province
`Country of Residencei
`
`
`
`Citizenship under 37 CFR 1.41(b)i
`
`Mailing Address of Applicant:
`
`Address 1
`
`Address 2
`
`49 Sheridan Drive, #11
`
`Postal Code
`
`01545
`
`US
`
`
`
`
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`
`
`All
`Inventors Must Be Listed - Additional
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`CorrespondenceInformation:
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`Enter either Customer Number or complete the CorrespondenceInformation section below.
`For further information see 37 CFR 1.33({a}.
`
`[] An Addressis being provided for the correspondenceInformation of this application.
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`
`Customer Number
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`Email Address
`
`creckamp@vedderprice.com
`
`Add Email
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`Application Information:
`
`Title of the Invention
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Attorney Docket Number] 00100.36.0001 Small Entity Status Claimed [|
`Application Type
`Nonprovisional
`
`Subject Matter
`
`Utility
`
`
`
`Suggested Class(if any) Sub Class(if any)
`
`Suggested Technology Center(if any)
`
`Total Numberof Drawing Sheets (if any)
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`Suggested Figure for Publication (if any)
`
`EFS Web 2.2.2
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`PTO/SB/14 (11-08)
`Approved for use through 09/30/2010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Underthe Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`
`Attorney Docket Number|00100.36.0001
`
`Application Data Sheet 37 CFR 1.76
`
`
`
`
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`Title of Invention
`
`
`Application Number
`
`Publication Information:
`[_] Request Early Publication (Fee required at time of Request 37 CFR 1.219)
`Req uest Not to Publish. | hereby request that the attached application not be published under 35 U.S.
`[-] ©. 122(b) and certify that the invention disclosedin the attached application has not and will not be the subject of
`an application filed in ancther country, or under a multilateral international agreement, that requires publication at
`eighteen monthsafterfiling.
`
`Representative Information:
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`Representative information should be provided for all practitioners having a power of attorney in the application. Providing
`this information in the Application Data Sheet does not constitute a power of attorney in the application (see 37 CFR 1.32).
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`
`Enter Representative Name_sectioneither Customer Number or complete the below. If both sections
`
`
`are completed the Customer Numberwill be used for the Representative Information during processing.
`
`Please Select One:
`(#) Customer Number
`(©) US PatentPractitioner
`C) Limited Recognition (37 CFR 11.9}
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`Customer Number
`
`29153
`
`Domestic Benefit/National Stage Information:
`
`This section allows for the applicant to either claim benefit under 35 U.S.C. 119(e), 120, 121, or 365(c) or indicate National Stage
`entry from a PCT application. Providing this information in the application data sheet constitutes the specific reference required by
`35 U.S.C. 119(e) or 120, and 37 CFR 1.78{a)(2) or CFR 1.78(a}(4), and need not otherwise be made part of the specification.
`
`
`Prior Application Status|Pending
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`Application Number
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`Continuity Type
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`not claimed. Providing this information in the application data sheet constitutes the claim for priority as required by 35 U.S.C. 119(b)
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`Add button.
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`Assignee Information:
`Providing this information in the application data sheet does not substitute for compliance with any requirementof part 3 of Title 37
`of the CFR to have an assignmentrecorded in the Office.
`.
`Assignee 1
`
`Ex1002
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`PTO/SB/14 (11-08)
`Approved for use through 09/30/2010. OMB 0651-0032
`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
`Underthe Paperwork Reduction Act of 1995, no persons are required to respond to a collection of information unless it contains a valid OMB control number.
`
`Attorney Docket Number|00100.36.0001
`
`
`
`
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`Title of Invention
`
`
` Application Data Sheet 37 CFR 1.76
`
`Application Number
`
`If the Assignee is an Organization check here.
`
`Organization Name
`
`ATI Technologies ULC
`
`Mailing Address Information:
`
`Address 1
`
`Address 2
`
`1 Commerce Valley Drive East
`
`Email Address
`
`Additional Assignee Data may be generated within this form by selecting the Add
`button.
`
`Aad
`
`Signature:
`
`A signature of the applicant or representative is required in accordance with 37 CFR 1.33 and 10.18. Please see 37
`CFR 1.4(d) for the form of the signature.
`
`
`
`
`
`
`
`
`
`
`
`Signature=|/Christopher J. Reckamp/ Date (YYYY-MM-DD}| 2011-05-17
`
`
`
`First Name|Christopher Registration Number|34414
`
`This collection of information is required by 37 CFR 1.76. The information is required to obtain or retain a benefit by the public which
`is to file (and by the USPTOto process) an application. Confidentiality is governed by 35 U.S.C. 122 and 37 CFR 1.14. This
`collection is estimated to take 23 minutes to complete, including gathering, preparing, and submitting the completed application data
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`complete this form and/or suggestions for reducing this burden, should be sent to the Chief Information Officer, U.S. Patent and
`Trademark Office, U.S. Department of Commerce, P.O. Box 1450, Alexandria, VA 22313-1450. DO NOT SEND FEES OR
`COMPLETED FORMS TO THIS ADDRESS. SEND TO: Commissionerfor Patents, P.O. Box 1450, Alexandria, VA 22313-1450.
`
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`Electronic Patent Application Fee Transmittal
`
`omen
`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`Quantity
`
`First Named Inventor/Applicant Name:
`
`Stephen L. Morein
`
`Filed as Large Entity
`
`Utility under 35 USC 111(a) Filing Fees
`
`Description
`
`Fee Code
`
`Sub-Total in
`USD(S$)
`
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`wigs
`
`.
`
`Sub-Total in
`
`Patent-Appeals-and-Interference:
`
`Post-Allowance-and-Post-Issuance:
`
`Extension-of-Time:
`
`1970
`
`Total in USD (S$)
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`a e
`
`ee
`
`a
`
`Paymentinformation:
`
`Submitted with Payment
`
`yes
`
`Deposit Account
`
`Authorized User
`
`220259
`
`TheDirector of the USPTO is hereby authorized to charge indicated fees and credit any overpaymentas follows: Charge any Additional Fees required under 37 C.F.R. Section 1.16 (National application filing, search, and examination fees)
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.17 (Patent application and reexamination processingA
`ase No-TP
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`Page 9 of 509
`
`Electronic AcknowledgementReceipt
`
`ine
`
`Title of Invention:
`
`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
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`Charge any Additional Fees required under 37 C.F.R. Section 1.19 (Document supply fees)
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.20 (Post Issuance fees)
`
`Charge any Additional Fees required under 37 C.F.R. Section 1.21 (Miscellaneous fees and charges)
`
`File Listing:
`
`Pages
`Multi
`File Size(Bytes)/
`DocumentDescription
`Document
`
`
`
`Number Message Digest|Part/.zip|P (if appl.)
`
`360001_Application.pdf
`
`5a2195ef350dfe96b37393d43d086ca74d1
`5a3al
`
`ee
`
`Multipart Description/PDF files in .zip description
`
`Specification
`
`Warnings
`
`Information:
`
`Drawings-only black and white line
`drawings
`
`360001_Drawings.pdf
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`100418
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`Fee Worksheet (PTO-875)
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`fee-info.pdf
`
`9542301 783d22714df47e76295ef00c9373
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`This AcknowledgementReceipt evidences receipt on the noted date by the USPTOofthe indicated documents,
`characterized by the applicant, and including page counts, where applicable. It serves as evidence of receipt similar to a
`Post Card, as described in MPEP 503.
`
`the application.
`
`New International Application Filed with the USPTO as a Receiving Office
`If a new international application is being filed and the international application includes the necessary components for
`an international filing date (see PCT Article 11 and MPEP 1810), a Notification of the International Application Number
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`GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER
`
`RELATED APPLICATIONS
`
`[0001]
`
`This application is a continuation of co-pending U.S. Application Serial No.
`
`12/791,597,
`
`filed June 1, 2010, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`EMPLOYING A UNIFIED SHADER”, having as inventors Steven Morein et al., owned by
`
`instant assignee and is incorporated herein by reference, which is a continuation of co-pending
`
`U.S. Application Serial No. 11/842,256,
`
`filed August 21, 2007, entitled “GRAPHICS
`
`PROCESSING ARCHITECTURE EMPLOYING A UNIFIED SHADER’, having as inventors
`
`Steven Morein et al., owned byinstant assignee andis incorporated herein by reference, which is
`
`a continuation of U.S. Application Serial No. 11/117,863, filed April 29, 2005, which has issued
`
`into U.S. Patent No. 7,327,369, entitled “GRAPHICS PROCESSING ARCHITECTURE
`
`EMPLOYING A UNIFIED SHADER’, having as inventors Steven Morein et al., and owned by
`
`instant assignee and is incorporated herein by reference which is a continuation of U.S.
`
`Application Serial No. 10/718,318, filed on November 20, 2003, which has issued into U.S.
`
`Patent No. 6,897,871, entitled “GRAPHICS PROCESSING ARCHITECTURE EMPLOYING A
`
`UNIFIED SHADER’, having as inventors Steven Morein et al., and ownedby instant assignee
`
`and is incorporated herein by reference.
`
`FIELD OF THE INVENTION
`
`[0002]
`
`The present
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`invention generally relates
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`to graphics processors and, more
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`particularly, to a graphics processor architecture employing a single shader.
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`BACKGROUND OF THE INVENTION
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`[0003]
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`In computer graphics applications, complex shapes and structures are formed
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`through the sampling,
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`interconnection and rendering of more simple objects, referred to as
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`primitives. An example of such a primitive is a triangle, or other suitable polygon. These
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`primitives, in turn, are formed by the interconnection of individual pixels. Color and texture are
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`then applied to the individual pixels that comprise the shape based on their location within the
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`primitive and the primitives orientation with respect to the generated shape; thereby generating
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`the object that is rendered to a corresponding display for subsequent viewing.
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`[0004]
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`The interconnection of primitives and the application of color and textures to
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`generated shapes are generally performed by a graphics processor. Conventional graphics
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`processors include a series of shaders that specify how and with what correspondingattributes, a
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`final
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`image is drawn on a screen, or suitable display device. As illustrated in FIG. 1, a
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`conventional shader 10 can be represented as a processing block 12 that accepts a plurality of
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`bits of input data, such as, for example, object shape data (14) in object space (x,y,z); material
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`properties of the object, such as color (16); texture information (18); luminance information (20);
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`and viewing angle information (22) and provides output data (28) representing the object with
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`texture and other appearance properties applied thereto (x’, y’, z’).
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`[0005]
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`In exemplary fashion,as illustrated in FIGS. 2A-2B, the shader accepts the vertex
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`coordinate data representing cube 30 (FIG. 2A) as inputs and provides data representing, for
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`example, a perspectively corrected view of the cube 30° (FIG. 2B) as an output. The corrected
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`view maybe provided, for example, by applying an appropriate transformation matrix to the data
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`representing the initial cube 30. More specifically, the representation illustrated in FIG. 2B is
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`provided by a vertex shader that accepts as inputs the data representing, for example, vertices
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`Vx, Vy and Vz, among others of cube 30 and providing angularly oriented vertices Vx-,Vy- and
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`Vz, including any appearanceattributes of corresponding cube 30”.
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`[0006]
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`In addition to the vertex shader discussed above, a shader processing block that
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`operates on the pixel level, referred to as a pixel shader is also used when generating an object
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`for display. Generally, the pixel shader provides the color value associated with each pixel of a
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`rendered object.
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`Conventionally, both the vertex shader and pixel shader are separate
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`components that are configured to perform only a single transformation or operation. Thus, in
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`order to perform a position and a texture transformation of an input, at least two shading
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`operations and hence, at
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`least
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`two shaders, need to be employed. Conventional graphics
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`processors require the use of both a vertex shader and a pixel shader in order to generate an
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`object. Because both types of shaders are required, known graphics processors are relatively
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`large in size, with mostof the real estate being taken up by the vertex and pixel shaders.
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`[0007]
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`In addition to the real estate penalty associated with conventional graphics
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`processors,
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`there is also a corresponding performance penalty associated therewith.
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`In
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`conventional graphics processors, the vertex shader and the pixel shader are juxtaposed in a
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`sequential, pipelined fashion, with the vertex shader being positioned before and operating on
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`vertex data before the pixel shader can operate on individual pixel data.
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`[0008]
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`Thus, there is a need for an improved graphics processor employing a shaderthat
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`is both space efficient and computationally effective.
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`[0009]
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`The present invention and the associated advantages and features thereof, will
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`becomebetter understood and appreciated upon review of the following detailed description of
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`the invention, taken in conjunction with the following drawings, where like numerals represent
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`like elements, in which:
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`[0010]
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`FIG. 1 is a schematic block diagram of a conventional shader;
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`[0011]
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`FIGS. 2A-2B are graphical representations of the operations performed by the
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`shaderillustrated in FIG. 1;
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`[0012]
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`FIG. 3 is a schematic block diagram of a conventional graphics processor
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`architecture;
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`[0013]
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`FIG. 4A is a schematic block diagram of a graphics processor architecture
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`according to the present invention;
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`[0014]
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`FIG. 4B is a schematic block diagram of an optional input component to the
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`graphics processor according to an alternate embodimentof the present invention; and
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`[0015]
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`FIG. 5 is an exploded schematic block diagram of the unified shader employed in
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`the graphics processorillustrated in FIG. 4A.
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`DETAILED DESCRIPTION OF THE INVENTION
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`[0016]
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`Briefly stated,
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`the present invention is directed to a graphics processor that
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`employs a unified shader that is capable of performing both the vertex operations and the pixel
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`operations
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`in a space saving and computationally efficient manner.
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`In an exemplary
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`embodiment, a graphics processor according to the present invention includes an arbiter circuit
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`for selecting one of a plurality of inputs for processing in response to a control signal; and a
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`shader, coupled to the arbiter, operative to process the selected one of the plurality of inputs, the
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`shader including means for performing vertex operations and pixel operations, and wherein the
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`shader performs oneof the vertex operations or pixel operations based on the selected one of the
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`plurality of inputs.
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`[0017]
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`The shader includes a general purpose register block for storing at least the
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`plurality of selected inputs, a sequencer for storing logical and arithmetic instructions that are
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`used to perform vertex and pixel manipulation operations and a processor capable of executing
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`both floating point arithmetic and logical operations on the selected inputs according to the
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`instructions maintained in the sequencer. The shader of the present invention is referred to as a
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`“unified” shader because it is configured to perform both vertex and pixel operations. By
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`employing the unified shader of the present invention, the associated graphics processor is more
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`space efficient than conventional graphics processors because the unified shader takes up less
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`real estate than the conventional multi-shader processor architecture.
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`[0018]
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`In addition, according to the present
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`invention,
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`the unified shader is more
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`computationally efficient because it allows the shader to be flexibly allocated to pixels or
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`vertices based on workload.
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`[0019]
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`Referring now to FIG. 3, illustrated therein is a graphics processor incorporating a
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`conventional pipeline architecture. As shown, the graphics processor 40 includes a vertex fetch
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`block 42 which receives vertex information relating to a primitive to be rendered from an off-
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`chip memory 55 on line 41. The fetched vertex data is then transmitted to a vertex cache 44 for
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`storage on line 43. Upon request,
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`the vertex data maintained in the vertex cache 44 is
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`transmitted to a vertex shader 46 on line 45. As discussed above, an example of the information
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`that is requested by and transmitted to the vertex shader 46 includes the object shape, material
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`properties (e.g. color), texture information, and viewing angle. Generally, the vertex shader 46is
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`a programmable mechanism whichapplies a transformation position matrix to the input position
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`information (obtained from the vertex cache 44),
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`thereby providing data representing a
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`perspectively corrected image of the object to be rendered, along with any texture or color
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`coordinates thereof.
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`[0020]
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`After performing the transformation operation,
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`the data representing the
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`transformedvertices are then provided to a vertex store 48 on line 47. The vertex store 48 then
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`transmits the modified vertex information contained therein to a primitive assembly block 50 on
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`line 49. The primitive assembly block 50 assembles, or converts, the input vertex information
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`into a plurality of primitives to be subsequently processed. Suitable methods of assembling the
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`input vertex information into primitives is knownin the art and will not be discussed in greater
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`detail here. The assembled primitives are then transmitted to a rasterization engine 52, which
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`converts the previously assembled primitives into pixel data through a process referred to as
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`walking. The resulting pixel data is then transmitted to a pixel shader 54 on line 53.
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`[0021]
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`The pixel shader 54 generates the color and additional appearance attributes that
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`are to be applied to a given pixel, and applies the appearanceattributes to the respective pixels.
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`In addition, the pixel shader 54 is capable of fetching texture data from a texture map 57 as
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`indexed by the pixel data from the rasterization engine 52 by transmitting such information on
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`line 55 to the texture map. The requested texture data is then transmitted back from the texture
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`map 57 on line 57° and stored in a texture cache 56 before being routed to the pixel shader on
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`line 58. Once the texture data has been received, the pixel shader 54 then performs specified
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`logical or arithmetic operations on the received texture data to generate the pixel color or other
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`appearance attribute of interest. The generated pixel appearance attribute is then combined with
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`a base color, as provided by the rasterization engine on line 53, to thereby provide a pixel color
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`to the pixel corresponding at the position of interest. The pixel appearanceattribute prese