`_________________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_________________________
`
`REALTEK SEMICONDUCTOR CORP.,
`Petitioner,
`v.
`
`ATI TECHNOLOGIES ULC
`Patent Owner.
`_________________________
`Case No. IPR2023-00922
`U.S. Patent No. 8,760,454
`_________________________
`
`PATENT OWNER’S SUR-REPLY TO PETITIONER
`REALTEK SEMICONDUCTOR CORP.’S REPLY TO PATENT OWNER’S
`PRELIMINARY RESPONSE
`
`
`
`
`
`TABLE OF CONTENTS
`
`Page
`INTRODUCTION ........................................................................................... 1
`ARGUMENT ................................................................................................... 3
`A. ATI Demonstrated Conception and Diligent Reduction to
`Practice, Which Realtek Ignores ........................................................... 3
`If Realtek Is Correct That The Claims Require Dynamic
`Register Allocation, Its Petition Fails For Failure of Proof .................. 6
`Dynamic Resource Allocation Was Conceived Of And
`Diligently Reduced To Practice in the R400 Project ............................ 7
`Realtek’s Reply Mischaracterizes Mr. Gruber’s Testimony ................. 8
`The 932 Investigation Is Irrelevant ....................................................... 8
`
`B.
`
`C.
`
`D.
`E.
`
`i
`
`
`I.
`II.
`
`
`
`
`
`
`
`
`
`TABLE OF EXHIBITS
`
`Reference Name
`Declaration of William Mangione-Smith and CV
`IPR2015-00325, Declaration of Dr Wolfe, Sept. 9, 2015
`IPR2015-00325, Declaration of Calvin Watson, Sept. 9, 2015
`IPR2015-00325, Declaration of Lefebvre, Sept. 9, 2015
`IPR2015-00325,-00326, and-00330, Deposition Transcript of
`Calvin Watson, November 4, 2015
`IPR2015-00325, -00326, and -00330, Deposition Transcript of
`Dr. Wolfe, Nov. 10, 2015
`IPR2015-00325,-00326, and -00330, Deposition Transcript of
`Laurent Lefebvre, Nov.13, 2015
`Gruber et al, R400 Shader Processor 2001, Oct. 9, 2015
`R400 Document Library Folder History, November 1, 2000
`through April 8, 2005
`R400 Sequencer Specification (Version 0 4), August 14, 2001
`R400 Sequencer Specification (Version 2 0), September 24,
`2001
`R400 Shader Processor (Version 0 1), Jan. 23, 2001
`R400 Top Level Specification (Version 0 2), March 11, 2001
`R400 Program Logs
`Microsoft Site Visit (Feb. 2003)
`Log of Exhibits and File Location
`R400 Program Review Documentation (Feb. 2003)
`R400 MM Software Status (Feb. 2003)
`R400 I/O Presentation (Feb. 2003)
`R400 I/O Presentation (Feb. 2003)
`R400 August Program Review
`Executive Review - R400 (Oct. 2002)
`R400 Area Estimate
`R400 Executive Review (Sept. 2002)
`GFIXIP 9x SX Micro-Architecture Specification
`WD/IA VGT Micro-Architecture Specification
`GX9 SPI Specification
`
`Ex. No
`EX 2001
`EX 2002
`EX 2003
`EX 2004
`EX 2005
`
`EX 2006
`
`EX 2007
`
`EX 2008
`EX 2009
`
`EX 2010
`EX 2011
`
`EX 2012
`EX 2013
`EX 2014
`EX 2015
`EX 2016
`EX 2017
`EX 2018
`EX 2019
`EX 2020
`EX 2021
`EX 2022
`EX 2023
`EX 2024
`EX 2025
`EX 2026
`EX 2027
`
`
`
`ii
`
`
`
`Ex. No
`EX 2028
`EX 2029
`EX 2030
`EX 2031
`EX 2032
`EX 2033
`EX 2034
`EX 2035
`EX 2036
`EX 2037
`EX 2038
`EX 2039
`EX 2040
`EX 2041
`EX 2042
`EX 2043
`EX 2044
`EX 2045
`EX 2046
`EX 2047
`EX 2048
`EX 2049
`EX 2050
`EX 2051
`EX 2052
`EX 2053
`EX 2054
`EX 2055
`EX 2056
`EX 2057
`EX 2058
`EX 2059
`
`Reference Name
`R400 Top Level Specification (Version 0.2)
`R400 Folder History Log
`R400 Folder History Log
`R400 Folder History Log
`R400 Review PowerPoint
`R400 Review PowerPoint
`R400 Development and Documentation
`Xenos GFX Change History July 2003 - Dec. 2003 Log
`R400 GFX Change History March 2003 - Dec. 2003
`R400 Primitive Assembly
`R400 Primitive Assembly
`Development Documentation
`Development Documentation
`Development Documentation
`R400 Performance Verification
`Development Documentation
`R400 PAD Program Review (Dec. 2002)
`R400 EMU Test Regress History Log
`R400 EMU Test Regress Statistics Log
`R400 Program Review (Dec. 2002)
`R400 Program Review (Dec. 2002)
`Device Development Progress
`Device Development Progress
`Device Development Progress
`Device Development Progress
`R400 Review Status PowerPoint
`TV Specification
`R400 Program Review PowerPoint and Test Results
`Development Documentation
`R400 PowerPoint
`R400 Program Review PowerPoint
`R400 Program Review
`
`
`
`iii
`
`
`
`Ex. No
`EX 2060
`EX 2061
`EX 2062
`EX 2063
`EX 2064
`EX 2065
`EX 2066
`EX 2067
`EX 2068
`
`EX 2069
`EX 2070
`EX 2071
`EX 2072
`EX 2073
`EX 2074
`EX 2075
`EX 2076
`EX 2077
`EX 2078
`EX 2079
`EX 2080
`EX 2081
`EX 2082
`EX 2083
`EX 2084
`EX 2085
`EX 2086
`EX 2087
`EX 2088
`EX 2089
`EX 2090
`EX 2091
`
`Reference Name
`Block Development Progress
`R400 Program Review (Dec. 11, 2002)
`R400 Program Review (Dec. 12, 2002)
`Development Documentation
`Development Documentation
`Development Documentation
`R400 Technical Documentation
`R400 Technical Documentation
`R400 GFX Change History March 2003 to December 2003
`Log
`Ikos 2002 Spreadsheet
`R400 - Program Review (Oct. 2002)
`Sqsp Regress Report
`Xenos Sq Change Log
`R400 Regress Testing
`Virtual Logic 3.1 User's Guide
`Virtual Logic 3.5.5 User's Guide
`IKOS Virtual Logic 2.1
`IKON Screenshots
`IKON Screenshots
`GFX9 User's Guide
`US Patent No. 6,897,871
`Samsung Exynos 5430 Octa SoC
`Samsung Exynos 3 Quad 3470 Processor Database
`HW Emulator First Triangle
`HW Simulator First Triangle
`R400 Regress Testing Logs
`R400 Regress Testing Logs
`R400 IKOS Status
`R400 Program Review
`R400 Program Review Documentation
`PA Check-in History Log
`RB Check-in History Log
`
`
`
`iv
`
`
`
`Ex. No
`EX 2092
`EX 2093
`EX 2094
`EX 2095
`EX 2096
`EX 2097
`EX 2098
`EX 2099
`EX 2100
`EX 2101
`EX 2102
`
`EX 2103
`EX 2104
`EX 2105
`EX 2106
`EX 2107
`EX 2108
`EX 2109
`EX 2110
`EX 2111
`EX 2112
`EX 2113
`EX 2114
`EX 2115
`EX 2116
`EX 2117
`EX 2118
`EX 2119
`EX 2120
`
`
`
`
`
`
`
`Reference Name
`SC Check-in History Log
`SPI Check-in History Log
`SP Check-in History Log
`SQ Check-in History Log
`SX Check-in History Log
`VGT Check-in History Log
`R400 File Logs 10/1/2002 – 4/17/2003
`Netlist Area Sheets
`IKOS Schematic
`Stephen Morein Depo Transcript (AMD v. LG) May 25, 2017
`Laurent Lefebvre Depo Transcript (337-TA-1044) June 28,
`2017
`IPR2015-00325, Declaration of Laurent Lefebvre
`Development Documentation
`Development Documentation
`Development Documentation
`Development Documentation
`Development Documentation
`Development Documentation
`IPR2015-00325, EX 2018 - EX. 2056
`IPR2015-00325, EX 2057 - EX 2071
`Block Change Logs
`Andrew Gruber Depo Transcript (AMD v. LG) July 27, 2017
`IPR2015-00326, EX 2001 - EX2002
`IPR2015-00326, EX 2003
`IPR2015-00326, EX 2004
`IPR2015-00326, EX 2005
`IPR2015-00326, EX 2006
`IPR2015-00326, EX 2007 - EX 2072
`IPR2015-00326, EX 2073 - EX 2118
`
`v
`
`
`
`I.
`
`INTRODUCTION
`Far from being “irrelevan[t]” (Reply at 1), the Federal Circuit holding in ATI
`
`Techs. ULC v. Iancu that (1) “the record is clear that ATI exercised the requisite
`
`reasonably continuous diligence” regarding the R400 project at issue here, and (2)
`
`the R400 project establishes conception and reduction to practice by ATI before the
`
`critical date of the Lindholm ’913 patent, June 27, 2003, is controlling here. Id., 920
`
`F.3d 1362, 1374 (Fed. Cir. 2019).
`
`Realtek’s argument is that the Federal Circuit ruling does not apply to the ’454
`
`patent because the ’454 patent contains additional claim limitations not present in
`
`the ’871, ’369, or ’053 patents that the Federal Circuit held were invented before
`
`Lindholm ’913 (the first two being parents of the ’454 patent). Reply at 1. Realtek
`
`argues that (1) a feature called dynamic register allocation is required to show
`
`conception and reduction to practice of the claims of the ’454 patent, and (2) that
`
`feature was not conceived of or reduced to practice during the R400 project. Id.
`
`Realtek’s arguments fail for at least three reasons. First, Realtek ignores the
`
`evidence put forth by ATI and Dr. Mangione-Smith, which establishes invention of
`
`the ’454 patent claims before the date of the Lindholm patents, and instead alleges
`
`something else is required, without supporting its allegation or explaining why ATI’s
`
`evidence is insufficient. Second, if Realtek were correct that dynamic register
`
`allocation is required to meet the claims of the ’454 patent, Realtek’s petition fails,
`
`
`
`1
`
`
`
`because it does not allege, much less prove, that that functionality is in its asserted
`
`references. Third, Realtek’s own evidence—which it goes to great lengths to argue
`
`ATI maliciously suppressed from the Board—demonstrates conception and
`
`reduction to practice of dynamic register allocation in the R400 project, under
`
`questioning from Realtek’s counsel in this case that sought leave to file a reply brief:
`
`
`
`Ex. 1017 (932 Inv. Gruber Depo. Tr.) at 103:5-21.
`
`Realtek’s other argument, that Judge Pender in the 337-TA-932 investigation
`
`found that ’454 patent was not owed a priority date before the Linholm references,
`
`is erroneous. The ’454 patent was not at issue in that case, nor was conception and
`
`reduction to practice of its claims analyzed or discussed in any way.
`
`
`
`2
`
`
`
`ATI has proven, consistent with Federal Circuit ruling, that the claims of the
`
`’454 patent were invented before the Lindholm patents’ critical dates.
`
`II. ARGUMENT
`A. ATI Demonstrated Conception and Diligent Reduction to
`Practice, Which Realtek Ignores
`Realtek argues the limitations “performing vertex operations on the vertex
`
`data by a processor within the unified shader unless the general purpose register
`
`block does not have enough available space therein to store incoming vertex data”
`
`and “continuing pixel calculation operations that are to be or are currently being
`
`performed by the processor based on instructions maintained in an instruction store
`
`until enough registers within the general purpose register block become available,”
`
`claim 1 of the ’454 patent were not conceived of or reduced to practice in the R400.
`
`Realtek ignores the evidence from ATI and Dr. Mangione-Smith, including
`
`technical specifications starting August 2001 stating that the sequencer of the R400
`
`“arbitrates between Pixel FIFO and Vertex FIFO – when there are no vertices
`
`pending OR there is no space left in the register files for vertices, the Pixel FIFO is
`
`selected.” Ex. 2010 (Aug. 24, 2001) at 18; id. at 4 (“The sequencer will not start the
`
`next vector until the needed space is available.”), 17 (“[T]he arbiter is not going to
`
`select a vector to be transformed if the parameter cache is full.”); Ex. 2011 (April
`
`19, 2022) at 26 (“There are actually two sets of arbitration -- one for pixels and one
`
`for vertices. . . . ALU arbitration is a little more complicated. . . .these threads are
`
`
`
`3
`
`
`
`further filtered based on whether space is available.”); Ex. 2119 (Sequencer Spec,
`
`ver. 2.11, Aug. 29, 2003) at 1281-82 (same); Ex. 2001 (M-S Decl.) at ¶¶ 83, 127,
`
`139; Ex. 2003 (Watson Decl.) at ¶¶ 33-35, 85-87, 118-120. These documents and
`
`others in the expert declaration show that ATI conceived of and developed in the
`
`R400 project features that meet the challenged claim limitations in the ’454 patent.
`
`Substantial evidence from the Preliminary Response and expert declaration
`
`also demonstrate diligence regarding the R400 sequencer. Mr. Lefebvre, the
`
`architectural lead of the sequencer, testified that he “updated the R400 Sequencer
`
`Specification approximately every two to three weeks.” Ex. 2118 (Lefebvre Decl.)
`
`¶ 36. He and his colleagues also “continuously developed, tested, and debugged
`
`emulation code and RTL code for the R400 . . . between late 2001 and the end of
`
`2003.” Id. ¶¶ 38-43. Updates to program reviews and the testing and emulation of
`
`source code show the same. See, e.g., Ex. 2001 ¶¶ 195-210, 227-244. ATI thus
`
`established diligence from conception in August 2001 until constructive reduction
`
`to practice, on November 20, 2003, with the filing of the parent ’871 patent.
`
`The Federal Circuit also held that “the record is clear that ATI exercised the
`
`requisite ‘reasonably continuous diligence’” regarding the R400. ATI Techs., 920
`
`F.3d at 1370. It found compelling the activities described by Mr. Lefebvre,
`
`including his declaration, Ex. 2118, “describ[ing] his and the other inventors’ and
`
`other ATI employees’ activities on th[e R400] project . . . accompanied by ‘almost
`
`
`
`4
`
`
`
`1300’ pages of documentary records showing the work done and by whom and
`
`when, including metadata, document logs, and folder histories.” Id. at 1370. “ATI
`
`assigned over one hundred project managers/designers to implement and test the
`
`R400 and at least one person on the R400 project team worked on the R400 design
`
`every non-holiday business day.” Id. These activities spanned from October 9, 2001
`
`to at least November 20, 2003. Id. The same documents and activities found by the
`
`Federal Circuit to establish diligence, in addition to numerous other documents, are
`
`relied on to support diligence here.
`
`Realtek argues that Dr. Mangione-Smith did not analyze RTL code. Reply at
`
`4. But the Federal Circuit did not rely on any code analysis in finding prior invention
`
`and none is required here, especially when the documentary evidence is so extensive.
`
`ATI Techs., 920 F.3d at 1370-72 (relying on inventor declaration and documents,
`
`including metadata to conclude diligence). Nor does proving conception or
`
`diligence require a taping out to the actual “GPU,” as Realtek implies. See id.
`
`Realtek also mistakenly claims there were “‘substantial changes’ in the R500 and
`
`R600,” i.e., between the R400 and the later projects—Mr. Gruber testified there were
`
`“substantial changes from the R500 to the R600.” Ex. 1017 at 8:5-11. Mr. Gruber
`
`testified on the very same page that “the internals [of Xenos and the R600] were
`
`largely based on the R400 unchanged.” Id. at 7:23-8:4, 7:13-19 (“The R400 project
`
`was remained [sic: renamed] the R500 project.”). And Realtek does not identify any
`
`
`
`5
`
`
`
`changes, whether they are relevant to the ’454 patent, or why any alleged change
`
`from one product to another refutes conception and diligent reduction to practice.
`
`
`
`Lastly, Realtek argues without citation that the Wolfe declaration in the ’871
`
`patent proceeding concluded that the R400 has a fixed priority vertex scheme. Reply
`
`at 5-6. Even if true, it does not negate the evidence above. Indeed, claim 1 of the
`
`’454 patent recites “performing vertex operations . . . unless the general purpose
`
`register block does not have enough available space,” in which case “continuing
`
`pixel operations . . . until enough registers . . . become available” for vertex
`
`processing, indicating that a fixed vertex priority is compatible with the ’454 patent.
`
`B.
`
`If Realtek Is Correct That The Claims Require Dynamic Register
`Allocation, Its Petition Fails For Failure of Proof
`Realtek does not explain what it means by the term “dynamic register
`
`allocation.” What it appears to mean is the ability to change, during runtime, what
`
`portion of storage is dedicated to one type of data (e.g., vertex) versus another (e.g.,
`
`pixel). Reply at 7 (“[A] fixed register system . . . is not the dynamic method in the
`
`Challenged Claims.”). Whether or not Realtek is correct that that is a claim
`
`requirement, its petition does not allege it to be a requirement, nor does the petition
`
`identify where in the prior art such functionality is found. Thus, if Realtek is correct
`
`regarding what the claims require, its petition should be denied for failure of proof.
`
`
`
`6
`
`
`
`C. Dynamic Resource Allocation Was Conceived Of and Diligently
`Reduced To Practice in the R400 Project
`For all Realtek’s allegations that ATI hid information from the Board, Realtek
`
`is proven wrong by the exhibit it alleges ATI suppressed. Realtek’s core argument
`
`is that ATI neither conceived nor reduced to practice dynamic register allocation in
`
`the R400. Reply at 2 (“the failure of ATI to conceive of or reduce to practice the
`
`‘dynamic register allocation’ in the R400”). But the transcript of inventor Andrew
`
`Gruber’s deposition that Realtek bases its arguments on says the opposite.
`
`On the very preceding page to the quote that Realtek relies on, Mr. Gruber
`
`testified the “dynamic mode of the register file allocation method” was “basically
`
`functional” and “the basic design was proven to work” in the R400. Ex. 1017 at
`
`103:5-21. This shows conception and actual reduction to practice. How Realtek can
`
`ignore that key testimony and simultaneously accuse ATI of misleading the Board
`
`is unclear. And the sequencer specification confirms Mr. Gruber’s testimony. Ex.
`
`2010 at 3 (“Added the dynamic allocation method for register file and an example
`
`. . . of the flow of pixels/vertices in the sequencer.”), 13; Ex. 2001 at ¶ 73; Ex. 2119
`
`at 1284; Ex. 2003 at ¶ 120. Realtek argues that only a 50-50 resource split was in
`
`the code for the R400. Reply at 7. But that is irrelevant, as that relates to the “default
`
`hardware setting” applied before system startup that he was questioned about. Ex.
`
`1017 at 106:14-107:1. Dynamic register allocation, as Realtek apparently argues,
`
`relates to changing the allocation during runtime, not the initial setup. And so the
`
`
`
`7
`
`
`
`fact that the inventors had not yet found the optimal starting conditions is irrelevant.
`
`D. Realtek’s Reply Mischaracterizes Mr. Gruber’s Testimony
`Mr. Gruber did not testify that he “cannot provide a date” of conception of the
`
`dynamic register allocation. Reply at 7-8. Mr. Gruber was asked when the “entirety
`
`of the invention” was conceived of. Ex. 1017 at 116:3-8 (emphasis added). That
`
`Mr. Gruber could not provide a specific date for the entirety of an invention nearly
`
`15 years prior and for which he was one of four inventors is unsurprising and
`
`irrelevant. Mr. Gruber actually testified that the “fundamental aspects,” which by
`
`Realtek’s own arguments would include dynamic file allocation, “were designed
`
`prior to 2002 certainly,” consistent with the above discussion. Id. at 115:19-116:2.
`
`E.
`
`The 932 Investigation Is Irrelevant
`
`The question addressed in 337-TA-932, a case that did not involve ATI or any
`
`related entity, was whether “under Section 102(g)(2) the ATI Unified Shader
`
`anticipates claims l and 15 of the [Lindholm] ’685 patent.” Ex. 1015 (Inv. 932 Init.
`
`Det.) at 142. That case came before the Federal Circuit decision and did not address
`
`conception and diligent reduction to practice of the ’454 patent or the ’871 patent.
`
`Judge Pender found requirements of Lindholm ’685—that are not present in the ’454
`
`patent—were not shown in the ATI product prior to the relevant date, largely
`
`because the evidence was from 2002 onward and respondents sought a conception
`
`date in 2000. Id. at 141-145. The evidence here does not suffer from that flaw.
`
`
`
`8
`
`
`
`Dated: October 20, 2023
`
`
`
`
`
`
`
`Respectfully submitted,
`
`/William A. Meunier/
`William A. Meunier (Reg. No. 41,193)
`Michael T. Renaud (Reg. No. 44,299)
`Adam S. Rizk (Reg. No. 66,867)
`MINTZ, LEVIN, COHN, FERRIS,
`GLOVSKY AND POPEO, P.C.
`One Financial Center
`Boston, MA 02111
`Telephone: 617-542-6000
`Facsimile: 617-542-2241
`WAMeunier@mintz.com;
`MTRenaud@mintz.com
`ARizk@mintz.com
`
`Reza Dokhanchy (Reg. No. 62,795)
`MINTZ, LEVIN, COHN, FERRIS,
`GLOVSKY AND POPEO, P.C.
`3580 Carmel Mountain Road, Suite 300
`San Diego, CA 92130
`Telephone: 858-314-1596
`RDokhanchy@mintz.com
`
`
`
`
`9
`
`
`
`CERTIFICATE OF SERVICE
`I certify that a copy of Patent Owner’s Sur-Reply to Petitioner’s Reply to
`
`Patent Owner’s Preliminary Response is being served by electronic mail on the
`
`following counsel of record:
`
`Lead Counsel
`Jeffrey Johnson
`Reg. No. 53,078
`ORRICK, HERRINGTON &
`SUTCLIFFE, LLP
`609 Main Street, 40th Floor
`Houston, TX 77002-3106
`Telephone: (713) 658-6400
`Facsimile: (713) 658-6401
`Email: 3J6PTABDocket@orrick.com;
`Realtek-AMD_OHS@orrick.com
`
`
`
`
`Dated: October 20, 2023
`
`
`
`
`Backup Counsel
`Christopher J. Higgins
`Reg. No. 66,422
`ORRICK, HERRINGTON &
`SUTCLIFFE, LLP
`1152 15th Street, N.W.
`Washington, DC 20005-1706
`Telephone: (202) 339-8400
`Facsimile: (202) 339-8500
`Email: OCHPTABDocket@orrick.com;
`Realtek-AMD_OHS@orrick.com
`
`
`Steve Baik
`Reg. No. 42,281
`WHITE HAT LEGAL
`P. O. Box 382
`San Jose, CA 95002
`Telephone: (650) 618-5282
`Email: sbaik@whitehat.legal
`
`/William A. Meunier/
`William A. Meunier (Reg. No. 41,193)
`
`
`
`10
`
`