`
`Generated with version 1.6 of genperfcode--syntax issues possibly causing unknowns in
`
`gate sims are fixed
`
`Change 91513 on 2003/03/21 by rramsey@rramsey_crayola_linux_orl
`
`connect sc_rtr up to signal
`
`from SC when not running pa_block_sim
`
`Change 91060 on 2003/03/19 by dclifton@dclifton_r400
`
`Reverted width of IOPAscan and PAIOscan back to 15 bits.
`
`Change 91059 on 2003/03/19 by dclifton@dclifton_r400
`
`Reverted width of IO_PA_scan and PA_IO_scan back to 15 bits.
`
`Change 91037 on 2003/03/19 by dclifton@dclifton_r400
`
`Changed width of IOPAscan and PA_IOscan to 14 bits.
`
`Change 91033 on 2003/03/19 by dclifton@dclifton_r400
`
`Changed number of IOPA_scan and PA_IOscan pins to 14 each.
`
`Change 90895 on 2003/03/19 by bhankins@fl_bhankins_r400win
`
`add test signals
`
`Change 90862 on 2003/03/19 by bhankins@fl_bhankins_r400win
`
`add common_dft test ports
`
`Change 88160 on 2003/03/03 by jbrady@jbradyr400win
`
`gate build for pa using structural macros
`
`Change 87606 on 2003/02/28 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`Change 85884 on 2003/02/21 by bhankins@flbhankins r400win
`
`uncomment CLIPSA=1
`
`Change 85882 on 2003/02/21 by bhankins@fl_bhankins_r400win
`
`add blockbusyextender module to pa.v
`
`AMD1044_0253941
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`ATI Ex. 2090
`IPR2023-00922
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`
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`Change 85595 on 2003/02/20 by scamlin@scamlin_crayola_unix_orl
`
`added testreg
`
`Change 85363 on 2003/02/19 by dclifton@dclifton_r400
`
`Controlled writes to CIDO to prevent real time streams from corrupting non-real time
`
`state by writing state without initial cpy.
`
`Change 84980 on 2003/02/18 by dclifton@dclifton_r400
`
`Disabled performance trackers for gate sims.
`
`Change 83805 on 2003/02/12 by scamlin@scamlin_crayola_unixorl
`
`no longer useD
`
`Change 82200 on 2003/02/05 by scamlin@scamlin_crayola_unix_orl
`
`forgot these fuseboxes
`
`Change 81803 on 2003/02/04 by dclifton@dclifton_r400
`
`Turned off fuse_box157 and removed dependencies.
`
`Change 80297 on 2003/01/29 by scamlin@scamlin_crayola_unixorl
`
`latest synthesis result
`
`Change 80293 on 2003/01/29 by bhankins@fl_bhankins_r400win
`
`1.
`
`remove some old commented code2.
`
`remove some unused signals to reduce lint
`
`warningsno functional change
`
`Change 80002 on 2003/01/28 by viviana@viviana_crayola_linux_orl
`
`Added a t+tdefine+ definition for pa_block_sim,
`
`to use the tbtrk_pa_scan and tbtrk_pasx.
`
`Change 80001 on 2003/01/28 by viviana@viviana_crayola_linuzorl
`
`Used for the trackers in the testbench.
`
`Change 80000 on 2003/01/28 by viviana@viviana_crayola_linux_orl
`
`Added pa_defines.v to use a “define for block/GC/chip use of tbtrk_pa_scan and
`tbtrkpasx.
`
`AMD1044_0253942
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`ATI Ex. 2090
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`Change 79879 on 2003/01/28 by
`
`bhankins@fl_bhankins_r400win
`
`fix lint warning
`
`Change 79695 on 2003/01/27 by
`
`bhankins@fl_bhankins_r400win
`
`fix lint warning
`
`Change 79680 on 2003/01/27 by
`
`bhankins@fl_bhankins_r400win
`
`updates to try and improve on
`
`timing.
`
`no functional changes.
`
`Change 79159 on 2003/01/24 by
`
`bhankins@fl_bhankins r400win
`
`remove some unused signals to
`
`reduce lint warnings
`
`Change 79141 on 2003/01/24 by
`
`smoss@smoss_crayola_linuxorlregress
`
`changed atipli to tbutils
`
`Change 78887 on 2003/01/23 by
`
`bhankins@fl_bhankins_r400win
`
`(no functional
`1. add changes
`synopsys lint warnings.
`
`difference) to try and improve on timing.2. clean up some
`
`Change 78808 on 2003/01/23 by
`
`bhankins@fl_bhankins r400_win
`
`remove unused inputs
`
`Change 78800 on 2003/01/23 by
`
`smoss@smoss_crayola_linux_orl_regress
`
`added omitted memory
`
`Change 78389 on 2003/01/21 by
`
`scamlin@scamlin_crayola_unix_orl
`
`mod for a04
`
`Change 78387 on 2003/01/21 by
`
`scamlin@scamlin_crayola_unix_orl
`
`mod for a04
`
`Change 78204 on 2003/01/21 by
`
`bhankins@fl_bhankins_r400_win
`
`reduce size of clip_to_clipga_clip_to_outsm_cnt to 3 bits to try to improve on timing.
`
`Change 78009 on 2003/01/20 by scamlin@scamlin_crayola_win
`
`AMD1044_0253943
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`ATI Ex. 2090
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`
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`mod for a04
`
`Change 77985 on 2003/01/20 by dclifton@dclifton_r400
`
`Changed ram in vgt_to_clips fifo
`
`Change 77978 on 2003/01/20 by scamlin@scamlin_crayola_unixorl
`
`mod for a04
`
`Change 77972 on 2003/01/20 by scamlin@scamlin_crayola_win
`
`mod for a04
`
`Change 77884 on 2003/01/20 by bhankins@fl_bhankins_r400_win
`
`look ahead on
`tweak double buffer code to re-add clipto_outsm write register, but
`
`clip to clipga clip to outsm cnt==0 detect to get to 2 clks/prim with 1 clipsm.
`
`Change 77867 on 2003/01/20 by bhankins@fl_bhankins_ r400win
`
`experimental.
`
`double buffer added, and removed clip_to_outsm input register.
`
`Change 77422 on 2003/01/17 by scamlin@scamlin_crayola_unix_orl
`
`Updated with A0d4
`
`Change 77377 on 2003/01/17 by bhankins@fl_bhankins_r400_win
`
`remove reset of max_sequencer bits in cl_enhance reg
`
`Change 77077 on 2003/01/16 by delifton@dclifton_r400
`
`Updated clsu tracker to work with gate sims.
`
`Change 76810 on 2003/01/15 by fhsien@fhsien_r400_linux_marlboro
`
`Change MESALL parameter to OFF
`
`Change 76802 on 2003/01/15 by scamlin@fl_regressp4j_ crayolawin
`
`Change 76778 on 2003/01/15 by dclifton@dclifton_r400
`
`Disable draw_init for prim_type 'NONE'
`
`Change 76771 on 2003/01/15 by bhankins@fl_bhankins r400win
`
`AMD1044_0253944
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`
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`sensitivity list fix
`
`Change 76767 on 2003/01/15 by bhankins@fl_bhankins r400win
`
`Bug fix
`
`Change 76539 on 2003/01/14 by bhankins@fl_bhankins_r400_win
`
`fix read of cl_enhance
`
`Change 76489 on 2003/01/14 by bhankins@flbhankins r400win
`
`fix to previous change
`
`Change 76486 on 2003/01/14 by bhankins@fl_bhankins_r400win
`
`add 4 spare bits to cl_enhance register
`
`Change 76484 on 2003/01/14 by dclifton@dclifton_r400
`
`Fixed soft reset implementation.
`
`Change 76218 on 2003/01/13 by smoss@smoss_crayola_linux_orl_regress
`
`increased idle_clocks timeout
`
`Change 76202 on 2003/01/13 by scamlin@scamlin_crayola_win
`
`update memory order of patch chain
`
`Change 76160 on 2003/01/13 by delifton@dclifton_r400
`
`Made sure last rbbm action was completed. Extended regclk_active to make sure clock
`was active for last rbbm action
`
`Change 75919 on 2003/01/10 by smoss@smoss_crayola_linux_orl
`
`added ccgensv dump to csim
`
`Change 75881 on 2003/01/10 by dclifton@dclifton_r400
`
`Compiled with ver. 1.5 of genperfcode.
`
`Change 75818 on 2003/01/10 by dclifton@dclifton_r400
`
`New ram models generated with the latest virage ram compiler.
`seems to be fixed.
`
`The bit-write problem
`
`AMD1044_0253945
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`Change 75769 on 2003/01/10 by scamlin@scamlin_crayola_win
`
`virage star unit test
`
`Change 75304 on 2003/01/08 by dclifton@dclifton_r400
`
`Removed screening of non-pa rbbm accesses from simulations.
`
`Change 74916 on 2003/01/07 by bhankins@fl_bhankins_r400_win
`
`Increased sxrequest _indx to seven bits to fix a bug that could occur when both even or
`both odd pipelines were disabled.
`
`Change 74755 on 2003/01/06 by dclifton@dclifton_r400
`
`Fixed problem with test bench not waiting for flush on soft reset. Still getting
`mismatches on attr indx.
`
`Change 74728 on 2003/01/06 by dclifton@dclifton_r400
`
`Caused read-through of ccgensv.dmp file so test would not report incomplete.
`
`Change 74702 on 2003/01/06 by dclifton@dclifton_r400
`
`Returned to using ccgensv.dmp file to set ROM_SP_disablevtx bits when in clip stand-
`alone
`
`Change 74678 on 2003/01/06 by dclifton@dclifton_r400
`
`Added soft reset capability.
`
`Setting ROM disablevtx bits by write to ROM register.
`
`Change 74660 on 2003/01/06 by bhankins@fl_bhankins r400win
`
`Fix bug in sxifsm request side that shows up when disable_sp is non-zero.
`
`Change 74195 on 2003/01/02 by smoss@smoss_crayola_linux_orl_regress
`
`or not
`
`Change 74192 on 2003/01/02 by smoss@smoss_crayolalinuxorlregress
`
`allowed reading of ccgensv dumpfile in normal mode
`
`Change 72825 on 2002/12/20 by dclifton@dclifton_r400
`
`Ditto
`
`AMD1044_0253946
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`ATI Ex. 2090
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`
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`Change 72803 on 2002/12/20 by dclifton@dclifton_r400
`
`Fixed state write conditional on context id used.
`
`Change 72758 on 2002/12/20 by dclifton@dclifton_r400
`
`Added disablevtx setup from ccgensv.dmp file
`
`Change 72728 on 2002/12/20 by bhankins@fl_bhankins_r400_win
`
`1. use sclk_ag to clock clipper registers that get reset when writes are done to
`
`pa_cl_enhance register to ensure register is clocked.2. add some test logic for soft
`reset
`(for test only; commented out).3.
`removed reset from pa_cl_enhance register
`
`Change 72494 on 2002/12/19 by dclifton@dclifton_r400
`
`Fixed makefile to compile cot gate netlist.
`
`Added flush for writes to cl_enhance reg.
`Added daisy chain reads.
`
`Put state variable poiinter logic in pa_ag on hard reset.
`Put perfmon on hard reset.
`
`Change 72380 on 2002/12/19 by bhankins@fl_bhankins_r400win
`
`1.
`
`remove reset from clipper_enhance register to make it more like other state
`
`registers.2. reset clip priority sequence counters when the clipperenhance register is
`written to.
`
`Change 72120 on 2002/12/18 by dclifton@dclifton_r400
`
`Disabled tbtrkperfent unless clipper stand alone and added some initialization to test
`signals.
`
`Change 72042 on 2002/12/18 by bhankins@fl_bhankins_r400win
`
`wire the correct clock (clk_reg)
`
`to the clipper enhance register
`
`Change 72020 on 2002/12/18 by bhankins@fl_bhankins_r400win
`
`undo previous checkin
`
`Change 72018 on 2002/12/18 by bhankins@fl_bhankins_r400_win
`
`enable vertex reordering by default
`
`Change 72015 on 2002/12/18 by bhankins@fl_bhankins_r400win
`
`AMD1044_0253947
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`
`
`remove commented lines
`
`Change 71983 on 2002/12/17 by
`
`dclifton@dclifton_r400
`
`Added random daisy chain reads
`
`Change 71769 on 2002/12/17 by
`
`bhankins@fl_bhankins_r400win
`
`1. update some non state-based perf signals to more closely match csim.2.
`commented lines.
`
`remove some
`
`Change 71658 on 2002/12/17 by
`
`bhankins@flbhankins r400win
`
`enable edge flag anding fix
`
`Change 71343 on 2002/12/16 by
`
`bhankins@fl_bhankins_r400win
`
`remove lint warning
`
`Change
`
`71085 on 2002/12/13 by ctaylor@fl_ctaylorr400dtwin_marlboro
`
`Removed unused class member fr
`
`om previous checkin.
`
`Change 70756 on 2002/12/12 by
`
`scamlin@scamlin_crayola_unix_orl
`
`latest synthesis
`
`Change 70385 on 2002/12/11 by
`
`bhankins@fl_bhankins_r400_win
`
`fix leda warning
`
`Change 70383 on 2002/12/11 by
`
`bhankins@flbhankins r400win
`
`try to improve on timing.
`
`no
`
`functional change.
`
`Change 70366 on 2002/12/11 by
`
`bhankins@fl_bhankins_r400win
`
`add edge flag anding fix, but
`lines and comment the line abo
`
`comment out.to enable, search
`ve.
`
`on //fix.
`
`uncomment those
`
`Change 70340 on 2002/12/11 by
`
`bhankins@fl_bhankins_r400_win
`
`try to improve on timing.
`
`no
`
`functional change.
`
`Change 70339 on 2002/12/11 by
`
`bhankins@fl_bhankins r400win
`
`change code to remove synopsys
`
`warning.
`
`no functional change
`
`AMD1044_0253948
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`ATI Ex. 2090
`IPR2023-00922
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`
`
`Change 70338 on 2002/12/11 by bhankins@fl_bhankins_r400win
`
`init function variable to remove synopsys warning
`
`Change 69928 on 2002/12/10 by dclifton@dclifton_r400
`
`Added take_input_gl to event count_enables
`
`Change 69694 on 2002/12/09 by dclifton@dclifton_r400
`
`Compiled rtl rams for rtl simulation.
`
`Change 69631 on 2002/12/09 by bhankins@fl_bhankins_r400_win
`
`support gate level memories
`
`Change 69630 on 2002/12/09 by bhankins@fl_bhankins_r400win
`
`gate level memories
`
`Change 69574 on 2002/12/09 by dclifton@dclifton_r400
`
`Made comment out of clsu tracker dependant on GATES variable
`
`Change 69455 on 2002/12/07 by smoss@smoss_crayolalinuxorlregress
`
`or not
`
`Change 69454 on 2002/12/07 by smoss@smoss_crayola_linux_orl_regress
`
`remove tbtrk_clsu due to cross link errors
`
`Change 69259 on 2002/12/06 by dclifton@dclifton_r400
`
`Eliminated ground nets in setup_debug buses.
`
`Change 69201 on 2002/12/06 by dclifton@dclifton_r400
`
`Made changes to compile gate version.
`
`Change 69170 on 2002/12/06 by bhankins@fl_bhankins_r400_win
`
`changes to remove Synopsys lint warnings.
`
`no functional change
`
`Change 69149 on 2002/12/06 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`AMD1044_0253949
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`ATI Ex. 2090
`IPR2023-00922
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`
`
`
`Change 69136 on 2002/12/06 by dclifton@dclifton_r400
`
`attached registered reset to pa_perfmon
`
`Change 69101 on 2002/12/06 by bhankins@fl_bhankins_r400win
`
`try to improve on timing.
`
`no functional change
`
`Change 69092 on 2002/12/06 by bhankins@fl_bhankins_r400win
`
`fix typo in depth of clipcodefifo
`
`Change 69079 on 2002/12/06 by bhankins@fl_bhankins_r400_win
`
`uncomment u0/1_pa_sx_wake_up_call signals
`
`Change 69067 on 2002/12/06 by bhankins@fl_bhankins_r400win
`
`added pa-sx wake_up_call signals.
`
`currently commented out
`
`Change 69061 on 2002/12/06 by bhankins@fl_bhankins_r400win
`
`change wake up to use pasx_req_cnt
`
`Change 68842 on 2002/12/05 by bhankins@fl_bhankins_r400win
`
`include write of sx_pendingfifo
`
`Change 68824 on 2002/12/05 by smoss@smoss_crayola_linux_orl
`
`update for linux
`
`Change 68808 on 2002/12/05 by dclifton@dclifton_r400
`
`Changed arrays to discrete registers to allow clock gating.
`
`Change 68807 on 2002/12/05 by dclifton@dclifton_r400
`
`Added event enable for non-state enabled perf counters
`
`Change 68753 on 2002/12/05 by dclifton@dclifton_r400
`
`Fixed bug with zero length fetch size in vgt_aux file
`
`Change 68747 on 2002/12/05 by smoss@smoss_crayola_linux_orl
`
`pa csim on linux
`
`AMD1044_0253950
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`ATI Ex. 2090
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`
`
`
`Change 68717 on 2002/12/05 by bhankins@fl_bhankins_r400win
`
`add logic for pa to sx wake up call.
`
`commented out in pa.v
`
`Change 68581 on 2002/12/04 by smoss@smoss_crayolalinuxorlregress
`
`mem on
`
`Change 68543 on 2002/12/04 by smoss@smoss_crayola_linux_orl_regress
`
`added more files
`
`Change 68418 on 2002/12/04 by dclifton@dclifton_r400
`
`Fixed problem with multiple draw_inits associated with same packet.
`
`Change 68412 on 2002/12/04 by bhankins@fl_bhankins_r400win
`
`remove some 2d arrays for power
`
`Change 68212 on 2002/12/03 by dclifton@dclifton_r400
`
`Added two new rams
`
`Change 68177 on 2002/12/03 by scamlin@scamlin_crayola_unixorl
`
`updated memory sizes
`
`Change 68127 on 2002/12/03 by bhankins@fl_bhankins_r400win
`
`1. add vertex reordering bits from cliper to su2. add clipped_prim_seq_stall logic and
`bit to clip enhance reg3. add some non-state perf counter signals
`
`Change 68118 on 2002/12/03 by dclifton@dclifton_r400
`
`Fixed bugs with vertex reording in clipper
`
`Change 68115 on 2002/12/03 by dclifton@dclifton_r400
`
`Increased time limit
`
`Change 68068 on 2002/12/03 by delifton@dcliftonr400
`
`Fixed pointsizepresent state variable loading
`
`Change 67973 on 2002/12/02 by dclifton@dclifton_r400
`
`More changes for vertex reordering in clipper
`
`AMD1044_0253951
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`
`
`
`Change 67858 on 2002/12/02 by dclifton@dclifton_r400
`
`added clipsu_reordervtx input and expanded fifo to hold it. Changed provoking vertex
`
`logic in pa_su_geomprep block
`
`Change 67786 on 2002/12/02 by dclifton@dclifton_r400
`
`Added temp fuse box for rams.
`
`Change 67728 on 2002/12/01 by smoss@smoss_crayola_linux_orl_regress
`
`removed automatic creation of fsdb due to file size limiting
`
`Change 67554 on 2002/11/29 by smoss@smoss_crayola_linux_orl_regress
`
`removed coverage
`
`Change 67235 on 2002/11/27 by scamlin@scamlin_crayola_unix_orl
`
`fusebox
`
`Change 66981 on 2002/11/26 by dclifton@dclifton_r400
`
`Added compile for ati_delaycell
`
`Change 66979 on 2002/11/26 by viviana@viviana_crayola_unixorl
`
`Added the delay block and IO connections.
`
`Change 66958 on 2002/11/26 by bhankins@fl_bhankins_r400win
`
`remove two-dimensional arrays
`
`Change 66921 on 2002/11/26 by bhankins@fl_bhankins_r400_win
`
`fix debug bus to accomodate USECLIPARRAYS compile switch
`
`Change 66777 on 2002/11/25 by dclifton@dclifton_r400
`
`Reducing clip_su_pt_size to 25 bits.
`
`Change 66692 on 2002/11/25 by bhankins@fl_bhankins_r400_win
`
`Reduced the width of the clipper's pointsize memory to 25 bits, as well as the
`
`pointsize datapath within the clipper.
`
`Change 66657 on 2002/11/25 by bhankins@fl_bhankins r400win
`
`AMD1044_0253952
`
`ATI Ex. 2090
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`Page 12 of 32
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`
`
`fix problem with debug bus width
`
`Change 66655 on 2002/11/25 by bhankins@fl_bhankins r400win
`
`remove duplicate signal
`
`from debug bus
`
`Change 66598 on 2002/11/25 by bhankins@fl_bhankins_r400_win
`
`add a clipper debug bus
`
`Change 66591 on 2002/11/25 by bhankins@flbhankins r400win
`
`debug bus fix
`
`Change 66586 on 2002/11/25 by bhankins@fl_bhankins_r400win
`
`rearrange pa_sxifccg debug bus
`
`Change 66579 on 2002/11/25 by smoss@smoss_crayola_linuxorlregress
`
`removed coverage
`
`Change 66577 on 2002/11/25 by bhankins@fl_bhankins_r400win
`
`rearrange debug bus
`
`Change 66573 on 2002/11/25 by bhankins@fl_bhankins_r400_win
`
`rearrange clipper debug bus
`
`Change 66572 on 2002/11/25 by bhankins@fl_bhankins_ r400_win
`
`try to improve on timing.
`
`Change 66568 on 2002/11/25 by bhankins@fl_bhankins_r400_win
`
`fix some leda warnings
`
`Change 66304 on 2002/11/22 by dclifton@dclifton_r400
`
`Connected su_enhance to output of pa_su_regs block to prevent pruning of signals.
`
`Change 66298 on 2002/11/22 by dclifton@dclifton_r400
`
`Reassigned mux selects
`
`Change 66269 on 2002/11/22 by dclifton@dclifton_r400
`
`AMD1044_0253953
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`
`
`Connected up additional debug buses.
`
`Fixed debugdata mux select in pa_rbiu.
`
`Change 66263 on 2002/11/22 by bhankins@fl_bhankins r400win
`
`fix leda warning
`
`Change 66258 on 2002/11/22 by bhankins@fl_bhankins_r400_win
`
`fix some leda warnings
`
`Change 66247 on 2002/11/22 by bhankins@flbhankins r400win
`
`fix some leda warnings
`
`Change 66244 on 2002/11/22 by dclifton@dclifton_r400
`
`Fixed a couple of bugs with addressing the state register
`
`Change 66238 on 2002/11/22 by bhankins@fl_bhankins_ r400win
`
`fix leda warnings
`
`Change 66207 on 2002/11/22 by dclifton@dclifton_r400
`
`Randomized and speed increased
`
`Change 66203 on 2002/11/22 by dclifton@dclifton_r400
`
`added the perfcounterref bit to the pa_cl_vte_cntl register
`
`Change 66199 on 2002/11/22 by bhankins@fl_bhankins_ r400win
`
`change state reg in pa_sxifccg so as not
`
`to support readback
`
`Change 66195 on 2002/11/22 by bhankins@fl_bhankins_r400_win
`
`fixes for some synopsys lint warnings
`
`Change 66188 on 2002/11/22 by bhankins@fl_bhankins_ r400win
`
`fixed some synopsys lint warnings
`
`Change 66035 on 2002/11/21 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`Change 65917 on 2002/11/21 by viviana@viviana_crayola_unixorl
`
`AMD1044_0253954
`
`ATI Ex. 2090
`IPR2023-00922
`Page 14 of 32
`
`
`
`Connected PA_rfrecen to STAR_testbus_rf[1].
`
`Change 65883 on 2002/11/21 by delifton@declifton_r400
`
`Moved state-based counts to mux-select 0 to match csim
`
`Change 65826 on 2002/11/21 by bhankins@fl_bhankins_r400_win
`
`fix fifo address widths
`
`Change 65825 on 2002/11/21 by smoss@smoss_crayolalinuxorlregress
`
`update
`
`Change 65824 on 2002/11/21 by bhankins@fl_bhankins_r400win
`
`fix address size to 3 bits
`
`Change 65739 on 2002/11/20 by dclifton@dclifton_r400
`
`Inserted build-in flush whenever perf counters are read.
`
`Change 65725 on 2002/11/20 by dclifton@dclifton_r400
`
`Added performance counter addresses.
`
`Change 65693 on 2002/11/20 by viviana@viviana_crayola_unix_orl
`
`Corrected the size of the address bus.
`
`Change 65656 on 2002/11/20 by bhankins@fl_bhankins_r400_win
`
`bug fix in size of outsm_clrfifo
`
`Change 65606 on 2002/11/20 by viviana@viviana_crayola_unix_orl
`
`Corrected the write data bus missing a parenthesis.
`
`Change 65605 on 2002/11/20 by dclifton@dclifton_r400
`
`Fixed problems with ram instantiation. Updated Makefile to use real rams.
`
`Change 65581 on 2002/11/20 by dclifton@dclifton_r400
`
`obsolete
`
`Change 65580 on 2002/11/20 by bhankins@fl_bhankins r400win
`
`AMD1044_0253955
`
`ATI Ex. 2090
`IPR2023-00922
`Page 15 of 32
`
`
`
`hard-code vertex reordering to disable it
`
`Change 65579 on 2002/11/20 by delifton@delifton_r400
`
`obsolete
`
`Change 65567 on 2002/11/20 by dclifton@dclifton_r400
`
`obsolete
`
`Change 65560 on 2002/11/20 by delifton@dcliftonr400
`
`I don't think these are used anymore.
`
`Change 65549 on 2002/11/20 by bhankins@fl_bhankins_r400win
`
`added clipper-oriented performance monitoring signals
`
`Change 65547 on 2002/11/20 by dclifton@dclifton_r400
`
`multibit counts in clippers, update using ver. 1.0 of genperfcode.
`
`Change 65541 on 2002/11/20 by viviana@viviana_crayola_unix_orl
`
`Changed the reset going to the memories to hard reset.
`
`Change 65506 on 2002/11/20 by dclifton@dclifton_r400
`
`Removed CLSA as default.
`
`Change 65501 on 2002/11/20 by viviana@viviana_crayola_unix_orl
`
`Corrected the 8x127 third instance name and write data bus width.
`
`Change 65488 on 2002/11/20 by bhankins@fl_bhankins_r400_win
`
`increase pa_clipper perf counter multicount values to 5 bits.
`
`Change 65467 on 2002/11/20 by bhankins@fl_bhankins_ r400win
`
`leda warning fix
`
`Change 65466 on 2002/11/20 by bhankins@fl_bhankins_r400win
`
`bug fix for performance counter
`
`Change 65293 on 2002/11/19 by bhankins@fl_bhankins r400win
`
`AMD1044_0253956
`
`ATI Ex. 2090
`IPR2023-00922
`Page 16 of 32
`
`
`
`bug fix for performance monitor
`
`Change 65273 on 2002/11/19 by bhankins@fl_bhankins_ r400win
`
`1. bug fix in nan kill flag2. add signals to debug busses
`
`Change 65272 on 2002/11/19 by bhankins@fl_bhankins_r400_win
`
`add signals to debug busses
`
`Change 65242 on 2002/11/19 by delifton@dcliftonr400
`
`FIxed bug with reads ending rbiupasu.dmp not getting done.
`
`Change 65241 on 2002/11/19 by dclifton@dclifton_r400
`
`Updated makefile for new pa_rf_stp.
`
`Change 65236 on 2002/11/19 by dclifton@dclifton_r400
`
`added include "header.v"
`
`Change 65235 on 2002/11/19 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`Change 65233 on 2002/11/19 by viviana@viviana_crayola_unix_orl
`
`Added a port connection to the pa_rf_stp.v that was missing inside the pa.v
`
`Change 65217 on 2002/11/19 by viviana@viviana_crayola_unix_orl
`
`Virage memories system file.
`
`Change 65200 on 2002/11/19 by viviana@viviana_crayola_unix_orl
`
`Added the pa_rfstp (Virage processor),
`Scan IO and new Virage memories.
`
`the Test Controller and
`
`Change 65195 on 2002/11/19 by viviana@viviana_crayola_linux_orl
`
`Added the pa_rf_stp.v for compilation.
`
`Change 65026 on 2002/11/18 by viviana@viviana_crayola_unix_orl
`
`New memories, processor and configuration file from Virage.
`
`AMD1044_0253957
`
`ATI Ex. 2090
`IPR2023-00922
`Page 17 of 32
`
`
`
`Change 65024 on 2002/11/18 by viviana@viviana_crayola_unix_orl
`
`Memories built with new version of the compiler.
`
`Change 65023 on 2002/11/18 by viviana@viviana_crayola_unixorl
`
`Deleted old memories.
`
`Change 64938 on 2002/11/18 by dclifton@dclifton_r400
`
`Decreased width of data to 381 bits.
`
`Change 64810 on 2002/11/18 by dclifton@dclifton_r400
`
`Fixed a bug with polymode.
`
`Change 64639 on 2002/11/16 by bhankins@fl_bhankins_r400win
`
`fix syntax error
`
`Change 64597 on 2002/11/15 by dclifton@dclifton_r400
`
`Fixed counters
`
`Change 64489 on 2002/11/15 by smoss@smoss_crayola_linux_orl
`
`update
`
`Change 64457 on 2002/11/15 by bhankins@fl_bhankins_r400win
`
`add more and fix some existing non-state based performance monitoring signals to
`
`pa_clipper.v
`
`Change 64423 on 2002/11/15 by dclifton@dclifton_r400
`
`Fixed performance counter diffs.
`
`Change 64397 on 2002/11/15 by bhankins@fl_bhankins_r400_win
`
`1. add non-state based performance monitoring signals to pa_cl_clipsm.2. fix some leda
`warnings in pa_cl_vert_storel.v
`
`Change 64382 on 2002/11/15 by dclifton@dclifton_r400
`
`Replaced register array in pa_su_primfifo with pa_su_reg8. Moved some more polymode
`logic into prim_fifo to improve operation
`
`Change 64364 on 2002/11/15 by bhankins@fl_bhankins r400win
`
`AMD1044_0253958
`
`ATI Ex. 2090
`IPR2023-00922
`Page 18 of 32
`
`
`
`add more to non-state based performance monitoring,
`
`including counter enable.
`
`Change 64307 on 2002/11/15 by bhankins@fl_bhankins r400win
`
`eliminate the occurance of false positive errors if reading from an empty
`
`clip_vertex_fifo
`
`Change 64294 on 2002/11/15 by dclifton@dclifton_r400
`
`Turned off clipper stand-alone for default
`
`Change 64287 on 2002/11/15 by bhankins@fl_bhankins_r400_win
`
`bug fix for reorder logic
`
`Change 64147 on 2002/11/14 by smoss@smoss_crayola_linux_orl_regress
`
`update
`
`Change 64055 on 2002/11/14 by bhankins@fl_bhankins_r400_win
`
`1. start to add clprim non-state based performance monitoring signals.
`
`not complete.2.
`
`change assignment to non-blocking in register proc in pa_cl_vert_store3.v
`
`Change 64031 on 2002/11/14 by bhankins@fl_bhankins_r400_win
`
`add non-state based performance monitoring signals to pa_sxifccg
`
`Change 63988 on 2002/11/14 by bhankins@fl_bhankins_r400win
`
`1. fix some leda warnings2. put clipvert_cnt back to 4 bits and make associated bug
`fix3. add some timing optimizations
`
`Change 63944 on 2002/11/14 by bhankins@fl_bhankins_r400_win
`
`mods to try and improve on timing.
`
`no functional changes.
`
`Change 63921 on 2002/11/14 by bhankins@fl_bhankins_r400win
`
`misc performance monitor bug fixes
`
`Change 63836 on 2002/11/13 by dclifton@dclifton_r400
`
`Updated cull counters
`
`Change 63790 on 2002/11/13 by delifton@dclifton_r400
`
`AMD1044_0253959
`
`ATI Ex. 2090
`IPR2023-00922
`Page 19 of 32
`
`
`
`Added CL_ENHANCE and SU_DEBUG registers to rbbm address scan.
`
`Change 63736 on 2002/11/13 by bhankins@fl_bhankins_ r400win
`
`fix some leda warnings
`
`Change 63693 on 2002/11/13 by bhankins@fl_bhankins_r400win
`
`performance monitoring bug fix
`
`Change 63672 on 2002/11/13 by bhankins@fl_bhankins_r400win
`
`add more performance monitoring
`
`Change 63619 on 2002/11/13 by bhankins@fl_bhankins_r400_win
`
`add simulation-only test for clip_vertex_fifo overrun event
`
`Change 63601 on 2002/11/13 by delifton@dclifton_r400
`
`performance counter trackers
`
`Change 63600 on 2002/11/13 by bhankins@fl_bhankins_r400win
`
`bug fix
`
`Change 63532 on 2002/11/12 by dclifton@dclifton_r400
`
`Changing name
`
`Change 63528 on 2002/11/12 by dclifton@dclifton_r400
`
`Added performance counters
`
`Change 63367 on 2002/11/12 by smoss@smoss_crayola_linux_orl_regress
`
`new backpressure and randoms
`
`Change 63365 on 2002/11/12 by bhankins@fl_bhankins_r400win
`
`add pa_clipper and pa_sxifsm performance counter signals, and bring up to pa.v level
`for now.
`
`Change 63330 on 2002/11/12 by bhankins@fl_bhankins_r400win
`
`add debug bus to pa_sxifccg (clipper_debug3)
`
`Change 63083 on 2002/11/11 by bhankins@fl_bhankins r400win
`
`AMD1044_0253960
`
`ATI Ex. 2090
`IPR2023-00922
`Page 20 of 32
`
`
`
`bug fix
`
`Change 63081 on 2002/11/11 by delifton@delifton_r400
`
`Updated to switch clipper counter inputs to single bit. Added counter for invalid fill
`polymode cull.
`
`Change 63073 on 2002/11/11 by viviana@viviana_crayola_unix_orl
`
`Added all the Virage RF memories configuration files and new rtl files generated.
`
`Change 62986 on 2002/11/09 by bhankins@fl_bhankins_r400_win
`
`added outsm_clrfifo to prevent overruns to position memory
`
`Change 62982 on 2002/11/09 by bhankins@fl_bhankins_r400win
`
`add a register to the output of the vgt_to_ccgen_fifo to try to improve on timing.
`
`Change 62865 on 2002/11/08 by viviana@viviana_crayola_unix_orl
`
`Changed the STAR test buses for the pa_ag to get rid of the extra
`instantiations for the memories that should have been bit write memories.
`
`Change 62858 on 2002/11/08 by dclifton@dclifton_r400
`
`Changed stve and veoc_back rams to bit-enable write variety
`
`Change 62840 on 2002/11/08 by bhankins@fl_bhankins_r400win
`
`some work on timing.
`
`Change 62725 on 2002/11/08 by bhankins@fl_bhankins r400win
`
`add logic to measure performance vs csim numbers
`
`Change 62724 on 2002/11/08 by bhankins@fl_bhankins_r400_win
`
`removed debug bus signal for synthesis (for now)
`
`Change 62708 on 2002/11/08 by bhankins@flbhankins r400win
`
`removed debug bus from sxifccg for now for a quick synthesis
`
`Change 62684 on 2002/11/08 by bhankins@fl_bhankins_r400win
`
`register ROMspndisablevtx inputs
`
`AMD1044_0253961
`
`ATI Ex. 2090
`IPR2023-00922
`Page 21 of 32
`
`
`
`Change 62679 on 2002/11/08 by bhankins@fl_bhankins_r400win
`
`fix logic error introduced by previous timing fix
`
`Change 62674 on 2002/11/08 by grayc@grayc_crayola_linux_orl
`
`removed files not used by new clipper
`
`Change 62673 on 2002/11/08 by bhankins@fl_bhankins_r400_win
`
`add debug bus for pa_sxifecg block
`
`Change 62671 on 2002/11/08 by bhankins@fl_bhankins r400win
`
`fixes for timing.
`
`no functional changes.
`
`Change 62475 on 2002/11/07 by dclifton@dclifton_r400
`
`changed "ifdef SIM" to "ifdef USEBEHAVEMEM" for rams
`
`Change 62437 on 2002/11/07 by dclifton@dclifton_r400
`
`removed redundant signal in sens. list.
`
`Change 62352 on 2002/11/07 by bhankins@fl_bhankins_r400_win
`
`replace pa_cl_clip_to_outsm_fifo.v with an rtl version without latency.
`
`Change 62308 on 2002/11/07 by bhankins@fl_bhankins_r400win
`
`correct width of vertval_bits_vertex_cc_next_valid register
`
`Change 62279 on 2002/11/07 by bhankins@fl_bhankins r400win
`
`fix initial available positions value to 48
`
`Change 62271 on 2002/11/07 by dclifton@dclifton_r400
`
`Added random backpressure
`
`Change 62128 on 2002/11/06 by delifton@dcliftonr400
`
`Added random backpressure
`
`Change 62117 on 2002/11/06 by viviana@viviana_crayola_unix_orl
`
`Models for virage memories.
`
`AMD1044_0253962
`
`ATI Ex. 2090
`IPR2023-00922
`Page 22 of 32
`
`
`
`Change 62087 on 2002/11/06 by dclifton@dclifton_r400
`
`Connected up debug busses, added cl_enhance reg to su,
`fixed typo in counters.
`
`removed reference to SU_ENHANCE,
`
`Change 61963 on 2002/11/06 by dclifton@dclifton_r400
`
`clocked debug signal registers with register clock.
`
`Change 61915 on 2002/11/06 by viviana@viviana_crayola_unix_orl
`
`Added another set of STAR_patch signals for the pntsz memory for the clipper.
`
`Change 61907 on 2002/11/06 by bhankins@fl_bhankins_r400_win
`
`fix leda warnings
`
`Change 61844 on 2002/11/05 by delifton@declifton_r400
`
`Added performance counter outputs to pa_su
`
`Change 61702 on 2002/11/05 by bhankins@fl_bhankins_r400win
`
`leda warning fixes
`
`Change 61667 on 2002/11/05 by bhankins@fl_bhankins_ r400win
`
`fix some leda warnings
`
`Change 61662 on 2002/11/05 by bhankins@fl_bhankins_r400win
`
`hardwire the reorder enable to always be off
`
`Change 61632 on 2002/11/05 by bhankins@fl_bhankins_r400_win
`
`fix some leda warnings
`
`Change 61594 on 2002/11/05 by bhankins@fl_bhankins_r400win
`
`1. fix bug in detecting w values equal2. fix some leda warnings
`
`Change 61583 on 2002/11/05 by viviana@viviana_crayola_unix_orl
`
`Changed the size of the fifo to 8x31.
`
`Change 61487 on 2002/11/04 by dcelifton@delifton_r400
`
`AMD1044_0253963
`
`ATI Ex. 2090
`IPR2023-00922
`Page 23 of 32
`
`
`
`A couple more fixes.
`
`Change 61485 on 2002/11/04 by dclifton@dclifton_r400
`
`Fixed a few things
`
`Change 61481 on 2002/11/04 by dclifton@dclifton_r400
`
`performance counter configuration.
`
`Change 61450 on 2002/11/04 by bhankins@fl_bhankins_r400win
`
`leda warning fixes
`
`Change 61243 on 2002/11/02 by smoss@smoss_crayola_linux_orl_regress
`
`new input directory for linux
`
`Change 61217 on 2002/11/02 by viviana@viviana_crayola_unix_orl
`
`Changed the instance names for the ati master clock instances and the rbbm interface.
`
`Change 61130 on 2002/11/01 by smoss@smoss_crayola_linux_orl_regress
`
`<Orlando Hardware Regression Results >
`
`Change 61092 on 2002/11/01 by viviana@viviana_crayola_unixorl
`
`The pram increased by one bit.
`
`Change 61081 on 2002/11/01 by viviana@viviana_crayola_unix_orl
`
`Added the STAR test bus signals and wired up the hierarchy.
`
`Change 61080 on 2002/11/01 by dclifton@dclifton_r400
`
`Fixed problem with init_point_prim.
`Added decode for debug and enhance registers
`
`Change 61041 on 2002/11/01 by bhankins@fl_bhankins_r400win
`
`infer pa_cl_enhance register and the connections to it.
`
`Change 61013 on 2002/11/01 by mmang@fl_mmang_r400 win
`
`Modified pa_ag test-bench to be compatable with parallell clipper state machines
`
`Change 60980 on 2002/11/01 by bhankins@fl_bhankins r400win
`
`AMD1044_0253964
`
`ATI Ex. 2090
`IPR2023-00922
`Page 24 of 32
`
`
`
`1. add clip_to_ga_ps_expand out of pa_clipper2. add initial code for clipper vertex
`reordering (hard-wired disabled).
`
`Change 60941 on 2002/11/01 by dclifton@dclifton_r400
`
`Fixed toggle on VGT_PA_wakeup_call
`
`Change 60615 on 2002/10/31 by bhankins@fl_bhankins_r400win
`
`fix latch
`
`Change 60604 on 2002/10/31 by bhankins@fl_bhankins_r400_win
`
`fixed latches
`
`Change 60532 on 2002/10/30 by smoss@smoss_crayola_linux_orl_regress
`
`updated for coverage
`
`Change 60492 on 2002/10/30 by viviana@viviana_crayola_unix_orl
`
`Corrected the size of the Virage memory to increase the depth due to 2.25 ns clock.
`
`Change 60278 on 2002/10/30 by dclifton@dclifton_r400
`
`Changed name of ROMdisable bits to ROM_disablevtx. Connected to sxifecg block
`
`Change 60252 on 2002/10/30 by bhankins@fl_bhankins_r400win
`
`fix updates for 4x clipper,
`
`turn off CLIPSA by default
`
`Change 60250 on 2002/10/30 by bhankins@fl_bhankins_ r400win
`
`update for 4x clipper
`
`Change 60249 on 2002/10/30 by bhankins@fl_bhankins_r400win
`
`update for 4x clipper
`
`Change 60248 on 2002/10/30 by bhankins@fl_bhankins_r400_win
`
`update for 4x clipper
`
`Change 60247 on 2002/10/30 by bhankins@fl_bhankins_r400_win
`
`initial checkin,
`
`for 4x clipper
`
`AMD1044_02