throbber

`
`Executive Review — R400
`
`September 16, 2002
`
`
`
`AMD1044_0253381
`
`ATI Ex. 2088
`IPR2023-00922
`Page 1 of 11
`
`

`

`2898
`
`Synthesis WIC
`MCLK(2nS)
`PIXCLK(2.5nS)
`|Complet
`Complete
`SCLK (2.5nS)
`BCLK(14.1nS)
`MCLK: 2.39
`MC:4.46; MH: 4.72
`IMC/MH
`723-or16|_NA
`RB: 82: RC 25
`SX 2.74; SQ: 2.5
`Isx¥sQu
`isp
`
`gz
`
`%
`
`FBi:
`
`[PA
`
`b
`
`97%
`92%
`
`¢saeasaseasagsz>
`
`er
`wocT =
`
`00%
`
`97%
`
`97%
`
`Block Logic Design and Timing
`
`[Display-DISPOUT|
`
`a
`
`TP: 2.55; TC: 2.5
`2.5; OGM:2.5; DBG:2.
`PA: 2.69
`VGT: 2.75
`SC:2.73
`RBEM: 2.95
`CP: 2.85
`
`Sle28Ryle]B|SsipRZRI=I2]2[RIS
`
`SATA
`
`BIF 4.47
`IDCT: 4.23
`
`AMD1044_0253382
`
`ATI Ex. 2088
`IPR2023-00922
`Page 2 of 11
`
`

`

`~~O=mA
`
`_i)©EHD>YO=)
`
`Block Level Test Status
`
`@% Written
`
`@ % Passing
`
`Functional Block
`
`ssouajajdwop
`
`_—<-
`
`RESESRE
`
`RYoA
`SE
`OR e
`>%G
`
`Go
`
`AMD1044_0253383
`
`ATI Ex. 2088
`IPR2023-00922
`Page 3 of 11
`
`

`

`Block Level Test
`
`Block Level Test Status
`
`Functional Block
`
`AMD1044_0253384
`
`ATI Ex. 2088
`IPR2023-00922
`Page 4 of 11
`
`”<3°
`
`oO
`éFE
`
`

`

`Synthesis & Physical Design
`
`Hardware Emulation
`—
`Initial IKOS compilation has begunto attempt R400fit into a VISM
`
`Synthesis continuing...
`— Blocks focusing on feature complete, not timing
`+
`Some blocks have madesignificant progress
`— Working top level interconnect issues
`— Working synthesis interface into physical design
`
`— Generated floorplan from SPC (no I/O constraint)
`
`Physical design
`Working groupinter-relationships S1'V<>Marlboro
`Meeting often to synchronize teams
`Physical Design web page under construction
`
`—
`
`Floorplan
`—
`Initial padout done, needs to be reviewed
`—
`Initial netlist successfully read into SPC
`
`AMD1044_0253385
`
`ATI Ex. 2088
`IPR2023-00922
`Page 5 of 11
`
`

`

`First R400 Floorplan - Silicon Perspectives
`
`(no I/O constraints)
`
`AMD 1044_0253386
`
`ATI Ex. 2088
`IPR2023-00922
`Page6 of 11
`
`

`

`
`
`Software Status (2D /MM)
`
`¢ Display Driver
`BIOS:Design scope nearly complete, significant work identified, detailed
`plan is available
`CAIL: Design scope completed, ~15% implemented
`DAL/GXO:Design scope completed, significant work identified, work
`underway
`CMM/QS:Design scope completed, ~5% implemented
`2D/NTx: Design scope completed, ~10% implemented
`2D/9x: Design scope completed, ~5% implemented
`¢ Multimedia
`Staffing and re-org complete; development work in progress.
`Schedule complete; under review.
`Design specspartially complete.
`MRD review meeting scheduled on Thursday.
`
`
`
`AMD1044_0253387
`
`ATI Ex. 2088
`IPR2023-00922
`Page7 of 11
`
`

`

`
`
`Software Status (3D)
`
`- D3D
`
`— BLT ~80%implemented
`— Abstract state, state cache, surface create and drawing functions ~60%
`implemented
`— Z/Stencil/Color ~50% implemented
`— Texture ~40% implemented
`— AA/HOSnot yet begun
`* OpenGL
`— Multiple texture and texture state 80% complete
`— IL to R400 binarytranslator 100% complete
`— Z, stencil and alpha operations complete
`— Vertex and fragment shaders complete
`* Compiler
`— Compiler integrated with SSM and D3D Driver 100%
`— Triangle through compiler on emulator 100%
`
`
`
`AMD1044_0253388
`
`ATI Ex. 2088
`IPR2023-00922
`Page 8 of 11
`
`

`

`0 Area Summary
`
`REO0 Area Estimate (0.19
`
`Pre Roum
`Rvé00 RVE00
`Tote! Unit
`PostRoute Logic Macro
`Logie
`REOOQty RECO Total Oty
`Total
`Ares
`Usitiration Unit rea
`free
`Ame
`100
`2,128,986
`2,126,956
`2126,988
`0)
`2,126,956
`| 433,839
`6.006.377
`1.00
`6,605,377
`6 606.377
`3.826.423
`1,779,918,
`2,677,600
`
`13/359 1.00=783,419740,527 47,992) 7aa,4% 783419
`
`
`
`
`340,700
`406,714
`224,000!
`710,794
`799,714
`1.00
`710,704
`193,108
`276,883
`a
`276,083
`278,863
`100
`275,363
`ROM (ROM
`9,600
`wii
`0
`ie
`1,734
`TS1C(Tes
`4.00
`1784
`4,508,481
`1,497,341
`.
`6,308'824
`3.00
`6,308,826
`7,385,633
`CP Control Processor)
`316,717
`0
`16,
`316,717
`1.00
`316,717
`221,702
`RBEM (Register Backbose Manager)
`4,56),677
`676,232
`.
`6,235,903
`O76
`3,977,682
`MH(Memery Huth
`3,193;114
`ocr
`1.210.646
`94,499
`.
`1,235,019
`1.00
`1,167,129
`331,493
`.
`1498/8622
`1.00
`VGT (Vertex Group and Tesselste)
`4,286,283
`540,018
`2
`48%,27)
`7400
`PA(ViewpertXformClipang Setup)
`9,368,074
`568,187
`;
`9.997.261
`060
`$C(Scan Converay
`6,703,423
`,
`200
`1,983,092
`x
`R
`400
`2,
`3,167,641
`:
`:
`16.385.831
`200
`18,591,739
`.
`0.60
`5,322,
`6,120,000
`1,
`x
`7
`200
`5
`3
`-
`hs
`257,143
`100
`749,837
`3.00
`4,501,793
`776,160
`2:00
`4,011,000
`6,54540
`
`TST,
`1055Tt
`
`210.2
`43014.218
`
`Tom! mmisde
`
`eooceoseecososeseescoS
`
`Sassesassssadseassasad
`
`Current Pad separation jum)
`
`RV450 in0.08 (estimated)
`Core mmiside
`
`AMD1044_0253389
`
`ATI Ex. 2088
`IPR2023-00922
`Page 9 of 11
`
`

`

`
`
`R400 Risks / Issues Summary
`
`R400 Technology
`-
`Proceeding with TSMC 0.13 Low-K; need to continue to monitor status
`
`Chip Integration
`- Virage STAR compiler - functional compiler delivery late
`Impacting completeness of next netlist release
`Chip level simulation environment stabilizing - impacting debug of non-GC blocks
`
`-
`
`Physical Design
`- Resource rollovers from RV350 to R400
`-
`Logic Design netlist delivery to the Physical team
`-
`Newflow will be a risk; only partially exercised on RV350
`
`Software
`- Compiler progressing (slower than planned)
`-
`Software MRD reviews completing; need review of integrated SW schedules
`
`Overall
`- Debug progressing slowly in some areas
`-
`February tapeouttarget.
`
`
`
`AMD1044_0253390
`
`ATI Ex. 2088
`IPR2023-00922
`Page 10 of 11
`
`

`

`09-02-03
`
`Task
`
`Emulator Test template Complete
`GC Emulatorintegration — 1 triangle
`Core Emulatorpixel / shader tests run
`Block Testing Begins
`GCiChip Integration Start
`Simulate 1 Triangle / Emulator ready for SW
`First Syntheses
`Verilog Feature Complete
`IKOS Emulation start
`
`Plan
`01-18-02
`02-22-02
`03-15-02
`04-16-02
`05-17-02
`06-15-02
`07-12-02
`09-30-02
`09-16-02
`10-11-02
`10-11-02
`11-15-02
`11-08-02
`Begin early block delivery
`11-11-02
`11-11-02
`IKOS Emulation (w/ Software) begins
`11-15-02
`11-30-02
`RTL Freeze/Final Netlist (Gate level ECO only)
`01-10-03
`02-28-03
`A11 Base Layers Tapeout
`01-24-03
`03-14-03
`A11 Metal Layers Tapeout
`05-23-03
`First Samples for Engineering
`06-28-03
`A12 Tapeout
`07-26-03
`A12 Samples for Engineering
`08-02-03
`R400 Customer Samples
`Product Delivery
`
`R400 Program Schedule
`
`Forecast
`
`Actual
`01-18-02
`02-21-02
`03-19-02
`05-01-02
`05-15-02
`07-01-02
`08-03-03
`
`AMD1044_0253391
`
`ATI Ex. 2088
`IPR2023-00922
`Page 11 of 11
`
`

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