`e 6
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`ORIGINATE DATE
`12 March, 2001
`
`EDIT DATE
`[date \@ "d MMMM,
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`DOCUMENT-REV. NUM.
`GEN-CXXXXX-REVA
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`PAGE
`1 of 5
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`Author:
`
`Laurent Lefebvre
`
`R400 Primitive Assembly Specification
`
`ver 0.1
`
`
`
`Overview: This is a proposal for the PA of the R400. It is being specified early to allow for a size estimate to
`be done.
`
`AUTOMATICALLY UPDATED FIELDS:
`Document Location:
`Document2
`Current Intranet Search Title ; R400 Top Level Spec
`APPROVALS
`
`Signature/Date
`
`Remarks:
`
`INFORMATION THAT COULD BE
`THIS DOCUMENT CONTAINS :
`SUBSTANTIALLY DETRIMENTAL TO THE INTEREST OF ATI TECHNOLOGIES
`INC. THROUGH UNAUTHORIZED USE OR DISCLOSURE.
`
`
`
`
`
`RAOOPA doc11)1314 Bytest** © ATI teference Copyright Notice on Cover Page © ##*590/09 00.00 am
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`AMD1044_0181887
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`ATI Ex. 2037
`IPR2023-00922
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`ORIGINATE DATE
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`DOCUMENT-REV. NUM.
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`12 March, 2001
`
`[date \@ "d MMMM,
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`GEN-CXXXXX-REVA
`
`
`
`
`
`
`
`
`
`
`“Copyright 2000, ATI Technologies Inc. All rights reserved. The material in this document constitutes an unpublished
`work created in 2000. The useof this copyright notice is intended to provide notice that ATI owns a copyright in this
`unpublished work. The copyright notice is not an admission that publication has occurred. This work contains
`confidential, proprietary information and trade secrets of ATI. No part of this document may be used, reproduced, or
`transmitted in any form or by any means without the prior written permission of ATI Technologies Inc.”
`
`
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`DOCUMENT-REV. NUM. 12 March, 2001
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`ORIGINATE DATE
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`EDIT DATE
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`[date \@ "d MMMM,
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`GEN-CXXXXX-REVA
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`Table Of Contents
`
`1. EXTERNAL INTERFACES.........ccccccsscessscsnesseeeeseeeenseeesseeseaeeseneeseaeeseseesssaessenesaeeeeaeeaeaceeeeseeseneeses 5
`1.
`BLOCK DIAGRAM ou... ccc ccc veces seceeeceeeseesseeeeeeeeaeceuescausceeesaneseaneseoeseceedscoedsneetaeeseacsenasoeesoes 5
`2. BLOCKS 2... ceecsesseeeessnsenseseeeeneeneeeeneesenseneeseaeeeesseneesesseeerseaeenesaenseaessensnaneeeasaeeseneeeenseaeeseacenerses 5
`
`
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`DOCUMENT-REV. NUM. 412 March, 2001
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`ORIGINATE DATE
`
`EDIT DATE
`
`[date \@ "d MMMM,
`
`GEN-CXXXXX-REVA
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`Revision Changes:
`
`Rev 0.0 (Laurent Lefebvre)
`Date: March 12, 2001
`Initial revision.
`
`Documentstarted
`
`
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`DOCUMENT-REV. NUM.
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`12 March, 2001
`
`[date \@ "d MMMM,
`
`Introduction
`
`The primitive assembly block contains both the Setup unit and the Scan converter blocks. It processesall
`3D,2D and RT primitives and arbitrates the parameterstore.
`
`1. PA overview
`
`16 preTCL vertices
`
`RT
`Primitive vertices
`vertices
`
`
`PRIMITIVE ASSEMBLY
`
`Primitive information
`
`SETUP UNIT
`
`Primitive information
`
`/
`
`(
`
`|
`
`2d/3d primitive
`){
`RTprimitive
`)
`
`ParameterStore /
`constants
`Arbitrer
`
`
`
`
`4 SLOPE} SCAN CONVERTER
`|
`
`-—-»
`
`
`
`
`
`
`OR
`PreTCL Vertices
`
`
`
`Render Back
`end
`
`Rasterizer
`
`Rasterizer
`Rasterizer
`Rasterizer
`Shader
`Pipe
`
`1. External Interfaces
`
`\Name|Direction|bits|Description:
`
`2. Block Diagram
`
`3. Blocks
`
`
`
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