throbber
Jan 15, 2003
`
`~ R400 Program Review
`
`AT! Corporate Presentation
`
`AMD1044_0170987
`
`ATI Ex. 2033
`IPR2023-00922
`Page 1 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 1 of 11
`
`

`

`
`Target Milestones in Last Month
`
`
`
`——
`
`
`
`
`
`v4
`CONEIDENTIAL
`SrAv4 Ya
`
`
`
`- R400 Program Milestones
`— Whole chip codefreeze by 11/23
`
`- Toronto R400 revised milestones
`- Achieve 100% passing in block regression by 12/13 with tvout
`being 1/6.
`- Start IKOS debug 12/20.
`- Achieve revised timing goals by 12/30.
`- Achieve 50% regression passing in chip by 12/30, 100% by 1/30.
`- Start Gate level simulation in Jan.
`- Complete system tests & debugged by 1/30
`- Deliver final netlist 1/30.
`
`
`
`AT! Corporate Presentation
`
`AMD1044_0170988
`
`ATI Ex. 2033
`IPR2023-00922
`Page 2 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 2 of 11
`
`

`

`
`What Have We Achieved
`
`
`
`
`
`
`
`
`
`
`
`
`
`- Status Summary
`Y¥ Achieved 100% passing on block level regression on Dec 30
`with the exception of tvout and bif
`vy Achieved over 50% passing on chip level regression on Dec 30
`¥ PCl configuration cycles passed on IKOSvalidation on netlist
`2.0
`¥ System tests are on track to be delivered & debugged
`¥ Emulation work in bif & tvout are on track. The completion dates
`are Jan 24 for tvout and Feb 7 forbif
`¥ Synthesis timing/area closure is in progress
`v Deliver IDCTfinal netlist on Jan 24
`
`Ki}
`CONEIDENTIAL
`SrAv4 Ya
`
`
`
`AT! Corporate Presentation
`
`AMD1044_0170989
`
`ATI Ex. 2033
`IPR2023-00922
`Page 3 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 3 of 11
`
`

`

`What Have We Achieved
`
`(specs; coding, emulation, tests)
`
`Coding is 100% complete with 2% outstanding in BIF(agp 64 byte Write Gorrnrnrn—™|
`perf counter).
`+ Emulation is 100% completed with vga(tiled mem dump) and
`+ Tests are 100% released with Ib, tvout, bif & system outstanding, covering
`RT, hdtv, bif changes.
`
`bif.
`
`Tests
`
`coding Emulation Written
`100%
`100%
`100%
`98%
`
`100%
`
`100%
`
`SrAv4Ya
`
`100%
`
`100%
`100%
`
`100% _
`100%
`100%
`100%
`100%
`BIFOC|96%|98%
`
`IDCT| —|100%—100% 100%
`4
`CONEIDENTIAL
`
`100%
`100%
`
`AT! Corporate Presentation
`
`AMD1044_0170990
`
`ATI Ex. 2033
`IPR2023-00922
`Page 4 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 4 of 11
`
`

`

`
`What Have We Achieved
`(block RTL regression)
`
`- All blocks are 100% passing
`- Tvout reached 80% passing and plan to complete by Jan24
`
`Block Rregression 12/30
`
`
`
`
`
`
`200
`
`@ tests passing
`@ tests written
`@ tests planned
`
`numberoftests
`
`5
`CONEIDENTIAL
`SrAv4 Ya
`
`ATI Corporate Presentation
`
`AMD1044_0170991
`
`ATI Ex. 2033
`IPR2023-00922
`Page 5 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 5 of 11
`
`

`

`SrAv4 Ya
`
`6
`CONEIDENTIAL
`
`What Have WeAchieved
`(Chip regression)
`- Overall 68% passed on chip level with VIP"100% & IDCT 96%
`- Dep, scl, crtc, dispout all have above 60% passing. The failing 40%
`was due to DC-MH interface bugs.
`- Vga is gated by tiled memory dump while bif is catching up.
`
`Chip Regression 1/14/03
`
`
`
`
`
`
`
`
`
`B tests passing
`@ tests written
`
`@ tests planned
`
`400
`
`350
`
`300
`
`250
`200
`
`‘eis
`100
`
`50
`
`0
`
`numberoftests
`
`HS YS
`BH
`SF
`SF
`ss
`£ © >Fwe
`y
`PK SF FT LS YS
`SG
`eS eS
`blocks
`
`HY
`
`AT! Corporate Presentation
`
`AMD1044_0170992
`
`ATI Ex. 2033
`IPR2023-00922
`Page6 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 6 of 11
`
`

`

` What Have WeAchieved
`(Chip regression emulation)
`
`- Most blocks are 100% passing
`- Tvout & vga plan to complete by Jan 24
`
`Tests
`
`Tests
`
`Tests
`
`
`
`vf
`CONEIDENTIAL
`6/2/2047.
`
`AT! Corporate Presentation
`
` SE
`
`passing Released Planned
`
`AMD1044_0170993
`
`ATI Ex. 2033
`IPR2023-00922
`Page 7 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 7 of 11
`
`

`

`
`
`
`What Have WeAchieved
`(Area & Timing)
`
`Moreefforts are in place to close timing and area issues.
`IDCT toclose by Jan 24
`-
`+ Most violations in DC should be fixed through a number ofiterations of
`SyIEleS DC still have some violations caused by improperconstraints.
`he area goal is 7mmz2.
`- BIF’s timing issue are due to design changes and theyare in review to
`be updated.
`
`
`
`Area (mm2)
`Cell Count
`Timing
`Path Groups|Speed (ns) Violation (ns)
`SCLK_G_DCT
`2.25
`-0.16
`
`1.23
`72K
`
`:]
`CONEIDENTIAL
`SrAv4 Ya
`
`AT! Corporate Presentation
`
`AMD1044_0170994
`
`ATI Ex. 2033
`IPR2023-00922
`Page8 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 8 of 11
`
`

`

`Next Set of Goals:
`> Deliver IDCTfinal netlist by Jan 24
`>» Achieve DC 100% passing in chip level
`regression by Jan 30
`> IKOSvalidation on netlist 3.0.
`» Achieve DC timing goals by Jan 30.
`> Deliver DC final netlist by Feb 15.
`> Start Gate level simulation in Jan.
`> Closebif timing & existing tests issues by
`
`> Deliver BIF final netlists by Feb 28
`
`9
`CONEIDENTIAL
`
`
`
`
`What’s ahead?
`
`
`
`
`
`
`
`
`
`
`
`
`AT! Corporate Presentation
`
`AMD1044_0170995
`
`ATI Ex. 2033
`IPR2023-00922
`Page 9 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 9 of 11
`
`

`

`
`Issues
`
`
`
`Chip level regression:
`> 7 MH related bugs reported for last 2 weeks
`» 5 hardware issuesto befixed & released
`» 2 emulation issues(vga rotation) to be fixed
`> 4 BIF related emulator bugs reported
`» 1 due to dma hang resolved
`» 3 others related to FB_START,
`HDP_FB_START, APER_CNTLto be resovied
`> DVO pad
`» Recommended mem pad doesn’t support SDR
`mode
`» Can we drop 3.3V support?
`
`
`
`
`
`
`
`
`
`CONEIDENTIAL
`
`
`
` alt)
`
`AT! Corporate Presentation
`
`AMD1044_0170996
`
`ATI Ex. 2033
`IPR2023-00922
`Page 10 of 11
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 10 of 11
`
`

`

`Risks
`
`
`
`
`
`
`
`
`
`
`« MH bug fixes has been the bottleneck for chip
`regression.
`— Need Marlboro MH team to increasetheir priority in
`resolving these issues
`- Marlboro’s RTL code releasing process has been
`ranging from 2 to 5 days beforeit get released.
`— Thisis critical in resolving chip issues quickly.
`— Currently, DC progress is being slow down on chip
`regression.
`« The next step is to get IKOS running with display
`— This again require MH/MC issues and bugs to be
`resolved
`
`- Area reduction plan may have schedule impact
`
`
`
`
`
` ob
`
`
`
`CONEIDENTIAL
`SrAv4 Ya
`
`AT! Corporate Presentation
`
`AMD1044_0170997
`
`ATI Ex. 2033
`IPR2023-00922
`Page 11 of 14
`
`ATI Ex. 2033
`
`IPR2023-00922
`Page 11 of 11
`
`

This document is available on Docket Alarm but you must sign up to view it.


Or .

Accessing this document will incur an additional charge of $.

After purchase, you can access this document again without charge.

Accept $ Charge
throbber

Still Working On It

This document is taking longer than usual to download. This can happen if we need to contact the court directly to obtain the document and their servers are running slowly.

Give it another minute or two to complete, and then try the refresh button.

throbber

A few More Minutes ... Still Working

It can take up to 5 minutes for us to download a document if the court servers are running slowly.

Thank you for your continued patience.

This document could not be displayed.

We could not find this document within its docket. Please go back to the docket page and check the link. If that does not work, go back to the docket and refresh it to pull the newest information.

Your account does not support viewing this document.

You need a Paid Account to view this document. Click here to change your account type.

Your account does not support viewing this document.

Set your membership status to view this document.

With a Docket Alarm membership, you'll get a whole lot more, including:

  • Up-to-date information for this case.
  • Email alerts whenever there is an update.
  • Full text search for other cases.
  • Get email alerts whenever a new case matches your search.

Become a Member

One Moment Please

The filing “” is large (MB) and is being downloaded.

Please refresh this page in a few minutes to see if the filing has been downloaded. The filing will also be emailed to you when the download completes.

Your document is on its way!

If you do not receive the document in five minutes, contact support at support@docketalarm.com.

Sealed Document

We are unable to display this document, it may be under a court ordered seal.

If you have proper credentials to access the file, you may proceed directly to the court's system using your government issued username and password.


Access Government Site

We are redirecting you
to a mobile optimized page.





Document Unreadable or Corrupt

Refresh this Document
Go to the Docket

We are unable to display this document.

Refresh this Document
Go to the Docket