`
` 400 Program Review
`
`December12, 2002
`
`ATI Corporate Presentation
`
`AMD1044_0051126
`
`ATI Ex. 2020
`IPR2023-00922
`Page 1 of 5
`
`ATI Ex. 2020
`
`IPR2023-00922
`Page 1 of 5
`
`

`

`Program — Next review on January 15%
`
`R400 Software
`— Emulator release tied to software tests; Peter Pellerite will set up meeting to
`discuss
`— Al\W schedule for 1 month after graphics will not work — 3 months — Ray T. to
`work
`— Board VIVO closure for debug
`
`R400 Hardware
`— DDR DVO at 480MHz needs to drop 3.3V Support, 2.5V maximum, 1.8V
`standard: Ray T. to call meeting
`— SP will need to add larger buffer - Add now ? Need to discuss asap and
`decide. Peter Pellerite to call meeting.
`— Need generic fix to scripts for timing fix ? Mark Sprague
`
`Chip Integration
`— Powerissues with latest memories (4x higher) - need to figure out issue
`— Need operations involved on Virage fuses, harvesting fuse
`— Pad ring coordination meeting with Sam, Lili, Frank
`
`Si2Z/2047, R400 Review Action Summary
`
`
`Physical Design
`— Feedbackfrom Netlist 3 - Mark Lee
`
`4
`CONEIDENTIAL
`
`Performance
`— RTLto IKOS ? Frank Hering
`
`ATI Corporate Presentation
`
`AMD1044_0051127
`
`ATI Ex. 2020
`IPR2023-00922
`Page 2 of 5
`
`ATI Ex. 2020
`
`IPR2023-00922
`Page 2 of 5
`
`

`

`Si2Z/2047,
`
`
`High Level Schedule
`
`F
`01-18-02
`02-21-02
`03-19-02
`05-01-02
`05-15-02
`07-01-02
`08-03-03
`10-31-02
`10-04-02
`11-15-02
`11-15-02
`11-18-02
`12-16-02
`01-31-03
`03-28-03
`04-11-03
`06-25-03
`07-31-03
`09-04-03
`09-11-03
`10-04-03
`
`FC
`
`rrent
`Complete
`Complete
`Complete
`Complete
`Complete
`Complete
`Complete
`Complete
`Complete
`01-04-02
`12-18-02
`12-16-02
`01-16-02
`01-31-03
`03-28-03
`04-11-03
`06-25-03
`07-31-03
`09-04-03
`09-11-03
`10-04-03
`
`(e)
`
`i
`
`01-18-02
`02-22-02
`03-15-02
`04-16-02
`05-17-02
`06-15-02
`07-12-02
`09-16-02
`09-23-02
`10-11-02
`11-04-02
`11-08-02
`11-11-02
`11-15-02
`01-10-03
`01-24-03
`
`Emulator Test template Complete
`GC Emulatorintegration —1 triangle
`Core Emulator pixel / shader tests run
`Block Testing Begins
`GC/ChipIntegration Start
`Simulate 1 Triangle / Emulator ready for SW
`First Syntheses (n-1}
`Verilog Feature Complete
`Second Synthesis (n)
`IKOS Emulation start
`Third Synthesis
`Early block delivery begins
`IKOS Emulation (w/ Software) begins
`RTL Freeze / Final Netlist (Gate level ECO only)
`Ai1 Base Layers Tapeout
`A11 Metal Layers Tapeout
`First Samples for Engineering
`A12 Tapeout
`A12 Samples for Engineering
`R400 Customer Samples
`ProductDelivery
`
`K
`CONEIDENTIAL
`
`ATI Corporate Presentation
`
`AMD1044_0051128
`
`ATI Ex. 2020
`IPR2023-00922
`Page 3 of 5
`
`ATI Ex. 2020
`
`IPR2023-00922
`Page 3 of 5
`
`

`

`Back-Up Slides
`
`Sreenesene
`
`5/2/2047.
`
`
`C3
`CONEIDENTIAL
`
`ATI Corporate Presentation
`
`AMD1044_0051129
`
`ATI Ex. 2020
`IPR2023-00922
`Page 4 of 5
`
`ATI Ex. 2020
`
`IPR2023-00922
`Page 4 of 5
`
`

`

`R400 Area Estimate (0. 13}
`
`R400 Area Summary (Previous)
`
`EO
`
`
`
`LEVERISH TRILLIONTOLLETN
`
`
`
`5/2/2047.
`
`
`Post Route
`Pre Route
`Logic Unit
`
`
`
`
`
`
`Block —-Utilizaion’=~AreaLogic Area MacroArea Tota! Unit Area R400 Qty R40 Tolal RVD Qty ~—_-RV400 Total
`4,484,027
`BIF(Bus tnterface)
`070
`2116809
`9
`2,116,609
`1.
`241008
`+00
`2,116,609
`DC (Display Controller)
`5349478
`0.71
`7642451
`1,754,490
`9,596,601
`1
`9,396,607
`1.00.
`9,396,601
`MIP(VideoIn Port)
`9.70
`4
`6
`100
`0
`CG [Clock Gen}
`123.883,
`0,70
`{76976
`9
`176,976
`{
`576,976
`+00
`176,976
`ROM{ROManddebug controtier}
`0.70
`4
`104,439
`1.00
`104,439
`74107
`104,439
`0
`104439
`TSTC (Test Controtier}
`9,800
`o70
`1374
`9
`174
`4
`VO71a
`100
`13714
`CP{Controt Processor)
`2.796.951
`9.70
`3,994,236
`1,663;082
`6,547,297
`4
`6,647,297
`4.00
`6,847,297
`RBBM(Register Backbone Manager)
`103,089
`0.70
`447,228
`91,452
`238,680
`i
`238,680
`1.00
`238,680
`MH(Memory Hub)
`3934364
`O70
`$,620.492
`906,915.
`6,529,407
`7
`8629407
`O75
`4,897,055,
`iocr
`4,200,286
`O70
`1,714.852
`o
`4,714,062
`+
`4,714,082
`<a
`1,714,862
`VGT(Veltex Groupand Tesselate)
`‘756,047
`0.70
`1,097,210
`348,919
`149,128
`7
`140,128
`+00
`1,430,128
`PA{Viewport Hom,Cupand Setup)
`2783577
`0.70
`3,976638
`756,252
`4731,790.
`1
`4,731,790
`1.00
`4,731,730
`SC (Sean Converter}
`7.20312
`0.70
`10,290.446
`6M,635,
`19,925,138.
`1
`10,925,139
`060
`6,555,083
`
`SP(Shader Pipe) 200©22,127,2516,054,940 0.70 ge4ag1s 2,413,714 11,063,625 4. 44,262,601
`
`
`
`
`
`
`
`SQ (Sequeacer}
`1,048,959
`0.70
`2,356,654
`2,333,793
`O89452
`1
`4,689,452
`00
`4,689,452
`TP(Texture Pipe}
`205,274
`0.70
`3,293,289.
`3,890,238
`4.
`19,960,950
`2
`7,780,475
`TC {Texture Cache}
`14,382,889
`6.70
`16,267,286
`20,016,682
`1
`20,016,682
`060
`12,010,009
`RB (RenderBackend)
`6,971,479
`0.70
`9,59256
`14,126,275
`4
`44,505,101
`2.00
`22,252,551
`RC (Render Central)
`191,388.
`0,70
`216.268
`216,268
`1
`216,268
`1.00
`26,268
`SX {ShaderExporp
`702,959
`07
`1,094,228
`3,052,633
`2
`6,105,266
`4.00
`3,052,633
`MC (Memory Controer}
`351,689
`0.70
`502413
`947,725
`4
`3,790,898
`2.00
`1,895,449
`Analog
`5,456,740
`7,518,580
`
`Totat Core(ume)
`187,521,491
`118,465,893
`
`Current Pad separation (um)
`Current Pad height (um)
`Scribe
`Core min'side
`Total mavside
`
`50.
`350
`0.18
`
`5
`CONEIDENTIAL
`
`47,087,057
`
`13.69
`14.57
`
`10,88
`1176
`
`ATI Corporate Presentation
`
`AMD1044_0051130
`
`ATI Ex. 2020
`IPR2023-00922
`Page 5 of 5
`
`ATI Ex. 2020
`
`IPR2023-00922
`Page 5 of 5
`
`