`Anderson et al.
`
`Patent Number:
`11
`(45) Date of Patent:
`
`4,974,167
`Nov. 27, 1990
`
`(54)
`
`(75)
`
`(73)
`(21)
`22)
`(51)
`(52)
`(58)
`
`ERASABLE DATA ACQUISTION AND
`STORAGE INSTRUMENT
`Inventors: Rolf P. Anderson, Tigard; James B.
`Proebstel, Beaverton, both of Oreg.
`Assignee: Tektronix, Inc., Beaverton, Oreg.
`Appl. No.: 317,701
`Filed:
`Feb. 28, 1989
`Int. Cl. ....................... G06F 15/20; G06F 12/14
`U.S. C. .................................... 364/487; 324/113;
`364/480; 364/900
`Field of Search ................. 371/12, 13, 21.1, 21.2,
`371/22.5; 364/200, 900, 480, 481, 484-487;
`324/77 R, 78 E, 113; 36.5/218
`References Cited
`U.S. PATENT DOCUMENTS
`4,072,851 2/1978 Rose .................................... 364/487
`4,393,500 7/1983 Inazeki et al. ..
`...... 3713
`4,517,663 5/1985 mazeki et al. ......
`...... 37/13
`4,654,849 3/1987 White, Jr. et al. ..
`... 371/2.
`4,703,433 10/1987 Sharrit .............
`... 364/487
`4,805,151 2/1989
`... 371/2.1
`
`(56)
`
`4,812,996 3/1989 Stubbs ................................. 364/487
`4,878,194 10/1989 Nakatsugawa et al. ............ 364/487
`Primary Examiner-Kevin J. Teska
`Attorney, Agent, or Firm-John P. Dellett; Francis I.
`Gray
`ABSTRACT
`(57)
`A digital oscilloscope includes an acquisition system for
`digitizing an input signal to produce and store in men
`ory a waveform data sequence representing the input
`signal. A display system within the instrument reads out
`and processes the data stored in the memory to produce
`a waveform display representing the input signal. The
`instrument responds to an input "erase" command from
`a user by overwriting the waveform data sequence
`stored in memory with a predetermined data sequence
`defining an easily recognizable display pattern. The
`oscilloscope thereafter performs a checksum operation
`on overwritten portions of memory to determine
`whether the overwrite operation was successful, and
`displays an indication of overwrite success on its screen.
`
`19 Claims, 8 Drawing Sheets
`
`STAR ERASE
`
`BO
`
`POINTER
`START OFRAM
`
`82
`
`PONTERYTEO
`PoNTERPOINTER-1
`
`PONTER
`END OF LOCALRAM
`
`NITALZE SEGUENCER
`DATA TO FACTORY WALUES
`CoPY cuRRENT REAL-TIME
`CLOCK DATA TO ERASED
`OCA RAM AREA
`PONER
`ENDFCALSTORE
`
`PONTER
`START OF CAL
`RESULTS
`
`NO
`PoTeRey Ted
`PONTERPOINTER-1
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent
`
`Nov.27, 1990
`
`Sheet 1 of8
`
`4,974,167
`
`3AVS
`
`WV
`
`(‘"TOA—NON)
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`viva
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`VANVdLNOMS
`
`SNOLLN@HSNd
`
`SBONYCNY
`
`ve
`
`Ly
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`
`
`
`
`U.S. Patent Nov. 27, 1990
`
`Sheet 2 of 8
`
`4,974,167
`
`O
`O
`OO O
`O
`O
`NH HO
`TSN
`ISN
`SS
`SS
`
`OOO
`
`TT
`
`O
`HE OOO
`His OOO
`O
`OOOOO
`O
`O
`O o
`
`O
`O
`O
`O
`O
`
`O
`
`FIG.2
`
`
`
`N
`EXT FUNCT. T. SYSTEM SPECIAL CAMDAG
`
`PREFLT 30
`PANEL MISC. ON/OFF
`
`Ya
`viDEO OPT
`
`N30
`PWR ON S 30
`LASTINI
`
`ERASE
`MEMORY
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent Nov. 27, 1990
`
`Sheet 3 of 8
`
`4,974,167
`
`
`
`OOOO
`
`START OFRAM
`
`SQUENCER
`AND
`LOCAL RAM
`
`4.FFF
`SOOO
`5FFF
`6OOO MEMORY MAPPED I/O
`7OOO CALIBRATION STORE
`
`END OF LOCAL RAM
`
`STACKS
`CALIBRATION
`RESULT. FLAGS
`
`END OF CAL STORE
`
`START OF CALSTORE RESULTS
`
`END OF CAL STORE RESULTS
`
`MISCELANEOUS
`SYSTEM RAM
`(INCLUDES REAL-TIME
`CLOCK, CURRENT MENU
`AND FRONT PANEL
`7FFFSETTING PARAMETERS)
`BOOO
`INSTRUCTION
`
`FFFF
`
`END OFRAM
`
`FIG. 4 (PRIOR ART)
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent Nov. 27, 1990
`
`Sheet 4 of 8
`
`4,974,167
`
`OOOO
`
`1FFF
`2OOO
`
`3FFF
`4000
`
`4 FFF
`SOOO
`
`5FFF
`SOOO
`
`6FFF
`7OOO
`
`7FFF
`BOOO
`
`
`
`FFFF
`
`SAVE WAVEFORMS
`
`NON-VOLATILE
`
`
`
`DISPLAY MEMORY
`
`ACQUISITION MEMORY
`
`MISCELLANEOUS RAM
`
`MEMORY MAPPED IVO
`
`MISCELANEOUS RAM
`
`WOATILE
`
`(NOT ALLOCATED)
`
`FIG. 5 (PRIOR ART)
`
`TEKSECURE ERASE MEMORY STATES: ERASED
`MEM BLOCK
`STATUS
`SAVE PAGE 1
`ERASED
`SAVE PAGE 2
`ERASED
`SAVE PAGE 3
`ERASED
`SAVE PAGE 4
`ERASED
`DSP. MEM.
`ERASED
`ACQ. MEM.
`ERASED
`MISC. MEM.
`ERASED
`SEO, MEM.
`ERASED
`LOCAL RAM 1
`ERASED
`LOCAL RAM 2
`ERASED
`LOCAL RAM 5
`ERASED
`FIG.10
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent Nov. 27, 1990
`
`4,974,167
`
`Sheet 5 of 8
`START
`INTERRUPT
`
`
`
`
`
`
`
`
`
`
`
`
`
`6O
`DETERMINE
`INTERRUPT u
`SOURCE
`
`
`
`2
`6
`
`MENU PB
`
`FIG.6A
`(PRIOR ART)
`
`READ CURRENT MENU
`PARAMETERS TO DETERMINE
`PUSHBUTTON FUNCTION
`
`EXECUTE SUBROUTINE
`ASSOCIATED WITH
`INTERRUPT SOURCE
`
`EXECUTE SUBROUTINE
`ASSOCATED WITH
`PUSHBUTTON FUNCTION
`
`
`
`
`
`
`
`
`
`
`
`
`
`DISPLAY
`
`
`
`72
`
`MENU PARAMETERS
`
`FIG.6B
`(PRIOR ART)
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent Nov. 27, 1990
`
`Sheet 6 of 8
`
`4,974,167
`
`START ERASE
`
`POINTERs
`START OFRAM
`
`
`
`
`
`POINTERT BYTE=0
`POINTERs POINTER-1
`
`84
`
`POINTER
`END OF LOCAL RAM
`
`INITIALIZE SEQUENCER
`DATA TO FACTORY VALUES
`COPY CURRENT REAL-TIME
`CLOCK DATA TO ERASED
`LOCAL RAM AREA
`POINTERs
`END OF CAL STORE-1
`
`POINTERs
`START OF CAL
`RESULTS
`y
`
`NO
`POINTERT BYTEso
`POINTERspOINTER-1
`
`FIG.7
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent Nov. 27, 1990
`
`Sheet 7 of 8
`
`9 -s;
`
`4,974,167
`
`POINTERs
`END OF CAL RESULTS-1
`
`PoINTER BYTEo 9
`POINTER=POINTER-1
`
`96
`
`
`
`
`
`POINTER
`END OFRAM
`
`
`
`98
`
`YES
`RESTORE REAL-TIME CLOCK
`ZERO TEMP. REAL TIME CLOCK
`ZERO OOOO-7FFF ON W.P. BUS
`WFMs O
`
`
`
`
`
`ZAP-WAVEFORM(WFM)
`INIT-HEADER(WFM)
`WFMEWFM-1
`
`1 OO
`
`102
`
`YES
`
`1 O4
`
`INITIALIZE FRONT PANEL, DATA
`SET VERIFY TRUE
`REsTART
`06
`FIG.7 continued
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`U.S. Patent
`
`Nov. 27, 1990
`
`Sheet 8 of 8
`
`4,974,167
`
`FIG.8
`
`START RESTART
`
`INTIALIZE
`OSCILLOSCOPE
`
`12O
`
`122
`NO
`
`(e)
`
`124
`
`YES
`SET MEMsO
`
`126
`
`MEMaMEM-1
`
`YES CHECKSUMMEM
`FACTORY MEM
`
`NO
`
`VERIFY(MEM)=
`TRUE
`
`VERIFY(MEM)=
`FALSE
`
`NO
`
`134
`
`136
`
`YES
`DISPLAY VERIFICATION RESULTS
`SET VERIFY FALSE
`
`FIG.9
`
`138
`JUMP TO SEQUENCER
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`1.
`
`ERASABLE DATA ACQUESTION AND STORAGE
`NSTRUMENT
`
`5
`
`O
`
`15
`
`BACKGROUND OF THE INVENTION
`The present invention relates in general to instru
`ments for acquiring, storing and displaying data repre
`senting input signals, and in particular to an instrument
`permitting a user to erase such data easily when stored
`in memory.
`A typical digital storage oscilloscope includes an
`acquisition system for generating waveform data se
`quences representing magnitudes of successive samples
`of input signals. The oscilloscope further includes a
`memory for storing acquired data sequences and a sys
`ten for generating waveform displays on a cathode ray
`tube (CRT) screen depicting the stored waveform data.
`The oscilloscope may also store and display additional
`data regarding each displayed waveform such as range
`settings and sampling rates. Such oscilloscopes may use
`non-volatile memory for storing waveform data sequen
`ces and other data so that the data is retained when the
`oscilloscope is turned off or unplugged. "Non-volatile'
`memory is defined herein as read and write accessible
`memory that retains its data when the system that read
`and write accesses that memory loses its power source,
`while volatile memory is one that loses its contents
`when the system that accesses it loses its power. Oscillo
`scopes typically use battery driven non-volatile men
`ory although other varieties of non-volatile memory
`may be employed.
`When information stored in an oscilloscope involves
`valuable trade secret data, the storage oscilloscope rep
`resents a security problem, particularly when the oscil
`loscope uses non-volatile memory for storing the data.
`To prevent others from accessing sensitive data in an
`oscilloscope, a user may wish to erase the data from the
`oscilloscope memory before leaving the oscilloscope
`unattended, allowing another person to use it, or re
`moving it from a secure work site. Digital storage oscil
`loscopes of the prior art, employing volatile or non
`volatile memory can "erase" waveform data sequences
`and other data stored in the memory by writing over
`that data with newly acquired data. Furthermore, to
`"erase' important waveform data stored in an oscillo
`scope using only volatile memory, a user can simply
`turn the oscilloscope off. However, when the oscillo
`scope employs non-volatile memory, a user can only
`erase important data therein by using the oscilloscope in
`such a way that this data is written over. Such a proce
`SO
`dure is time-consuming and difficult to perform, partic
`ularly by security personnel not familiar with oscillo
`scope operation. In addition, there can be areas of mem
`ory storing sensitive information that are inaccessible to
`the user when operating the oscilloscope in a normal
`fashion.
`Similar security problems occur with instruments
`such as spectrum and logic analyzers that generate and
`store data representing various observed phenomena
`SUMMARY OF THE INVENTION
`The present invention relates to an instrument such as
`a digital storage oscilloscope including an acquisition
`system for digitizing an input signal to produce and
`store in memory waveform data sequences representing
`65
`input signals and other data needed to interpret the
`sequences. A display system in the instrument reads out
`and processes the data sequences stored in the memory
`
`4,974,167
`2
`to produce displays portraying the input signals. In
`accordance with an aspect of the invention, the instru
`ment responds to an input "erase' command from a user
`by overwriting the waveform data sequences and other
`data with predetermined data.
`In accordance with another aspect of the invention,
`the waveform data sequences are overwritten with
`predetermined data sequences defining an easily recog
`nizable display pattern. Thereafter, when the display
`system is requested to generate a display based on the
`data now stored in memory, the predetermined pattern
`appears.
`In accordance with a further aspect of the invention,
`after the instrument overwrites the data in memory in
`response to the erase command, it performs operations
`to verify that all data in the instrument memory that
`were supposed to have been overwritten have been
`properly overwritten. The instrument then displays
`results of such verification operations. Thus, the inven
`tion enables a user easily to overwrite sensitive data in
`volatile and non-volatile memory within the instrument
`using a simple command, and to ensure that the sensi
`tive data have been overwritten by observing the result
`ing display generated by the instrument.
`It is accordingly an object of the invention to provide
`an improved instrument for acquiring, storing and dis
`playing data representing input signals, which instru
`ment permits a user easily to write over the stored data.
`It is another object of the invention to provide such
`improved instrument that permits a user easily to deter
`mine whether data stored in the oscilloscope has been
`properly written over.
`The concluding portion of this specification particu
`larly points out and distinctly claims the subject matter
`of the present invention. However, those skilled in the
`art will best understand both the organization and
`method of operation of the invention, together with
`further advantages and objects thereof, by reading the
`following description in view of the accompanying
`drawings wherein like reference characters refer to like
`elements,
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a block diagram of a typical digital storage
`oscilloscope suitable for implementing the present in
`vention,
`FIG. 2 is front view of a typical digital storage oscil
`loscope,
`FIGS. 3A-3D are illustrations of menu displays for
`the oscilloscope of FIG. 2,
`FIG. 4 is a diagram illustrating mapping of address
`able resources to the address space of the host processor
`bus of FIG. 1,
`FIG. 5 is a diagram illustrating mapping of address
`able resources to the address space of the waveform
`processor bus of FIG. 1,
`FIGS. 6A and 6B are flow charts illustrating an inter
`rupt routine executed by the host processor of FIG. 1 in
`response to an interrupt from the front panel interface
`circuit,
`FIG. 7 is a flow chart illustrating an erase routine in
`accordance with the present invention,
`FIG. 8 illustrates a "zap' pattern waveform,
`FIG. 9 is a flow chart illustrating details of the restart
`routine of FIG. 7, and
`FIG. 10 depicts a display produced by the restart
`routine of FIG. 9.
`
`25
`
`35
`
`45
`
`55
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`5
`
`15
`
`3
`DESCRIPTION OF THE PREFERRED
`EMBODIMENT
`The preferred embodiment of the present invention
`relates to an improved digital storage oscilloscope that
`enables a user easily to erase acquired waveform and
`other data stored in volatile and non-volatile memory
`within the oscilloscope. Relevant features of a prior art
`oscilloscope are first described hereinbelow and im
`provements to the prior art oscilloscope in accordance
`10
`with the present invention are described thereafter.
`Referring to FIG. 1, a digital storage oscilloscope 10
`of the prior art (suitably a Tektronix model 2440) com
`prises acquisition hardware 12 for digitizing channel 1
`and channel 2 (CH1 and CH2) input signals to produce
`waveform data sequences representing the input signals.
`An acquisition memory 14 temporarily stores each data
`sequence as acquired. A bus 24 interconnects acquisi
`tion memory 14, a waveform processor 16, a volatile
`"miscellaneous' random access memory 20, a non
`20
`volatile "save' random access memory 22, and a vola
`tile display memory 26. The waveform processor 16,
`operating under instructions in an instruction ROM 18,
`and in response to commands stored in miscellaneous
`memory 20, processes waveform data sequences stored
`in acquisition memory 14 and stores the processed
`waveform data sequences in save memory 22.
`The display memory 26 stores a vector list for each
`waveform display produced on the screen of a cathode
`ray tube (CRT) 30. It also stores data defining other
`parts of the display such as text and graphics. A display
`driver 28 periodically reads the vector lists and other
`data stored in display memory 26 and updates the dis
`play on CRT 30 accordingly. The display may include
`waveforms, parameters relating to displayed wave
`35
`forms, menus and various other text and graphical dis
`plays. To initiate a display of waveforms representing
`particular data sequences stored in save memory 22, the
`waveform processor 16 reads out and further processes
`the particular data sequence to produce vector lists
`40
`defining the waveforms. The waveform processor 16
`stores the vector lists in display memory 26. When
`display driver 28 thereafter updates the display on CRT
`30 in accordance with the vector lists stored in memory
`26, the waveform appears on CRT 30. The waveform
`45
`processor 16 controls operation of the display driver 28
`by sending commands to registers within the display
`driver through a memory-mapped I/O circuit 33 con
`nected to bus 24.
`The non-volatile save memory 22 has space for stor
`ing two sequences labeled CH1 and CH2 representing
`last digitized input signals of the two oscilloscope input
`channels. Save memory 22 also has space for storing up
`to four "reference" sequences labeled REF1-REF4.
`The waveform processor 16 may create a reference
`55
`sequence by copying either of the two sequences CH1
`and CH2 stored in save memory 22 into another area of
`save memory 22 reserved for one of the reference se
`quences REF1-REF4. The waveform processor may
`subsequently display a waveform representing a se
`lected reference sequence REF1-REF4 by reading the
`selected reference sequence out of save memory 22 and
`processing the sequence to generate a vector list for
`storage in display memory 26. Since the save memory
`22 is non-volatile, the last acquired CH1 and CH2 se
`65
`quences and the current REF1-REF4 reference se
`quences remain in memory after the oscilloscope is
`turned off. When an operator subsequently turns on the
`
`4,974,167
`4.
`oscilloscope, the "saved' waveforms may be re-dis
`played.
`A host processor 32 (in the preferred embodiment, a
`Motorola model 6809 microprocessor) controls oscillo
`scope operation in response to user input through push
`buttons and knobs 34 on the oscilloscope front panel
`and communicates with the user by initiating display of
`menus and data on the oscilloscope screen. The host
`processor 32 operates under instructions stored in an
`instruction ROM 42 and makes use of a non-volatile
`"main' random access memory 38 for storing data.
`Host processor 32, main memory 38 and instruction
`ROM 42 communicate through a host processor bus 40.
`When the user operates a pushbutton or knob 34, an
`interface (IAF) circuit 36 generates and stores data de
`scribing the pushbutton or knob operation. Interface
`circuit 36 then transmits an interrupt signal (INT) to
`host processor 32. The host processor 32 thereupon
`executes an interrupt routine wherein it read accesses
`the data stored in interface circuit 36 via memory
`mapped I/O circuit 33 connected to the host processor
`through the host processor bus 40. When the host pro
`cessor 32 determines from the interface data which
`pushbutton or knob has been operated, the host proces
`sor 32 executes an appropriate routine stored in instruc
`tion ROM 42. Some of these routines stored in ROM 42
`tell the host processor 32 to adjust operating parameters
`of acquisition hardware 12 such as digitizing rate, verti
`cal range setting, and trigger level. The host processor
`32 makes such adjustments by sending control data to
`acquisition hardware 12 via the memory mapped I/O
`circuit 33. Other routines in instruction ROM 42 enable
`the host processor 32 to communicate with external
`equipment through a general purpose interface bus
`(GPIB) 41 via memory mapped I/O circuit 33.
`Still other interrupt routines called in response to
`pushbutton or knob operation tell the host processor 32
`to send commands to the waveform processor 16. For
`example, a command may tell the waveform processor
`16 to save one of the CH1 and CH2 sequences as a
`reference sequence REF1-REF4. A bus arbitration
`circuit 44 interconnects the host processor bus 40 to the
`waveform processor bus 24. When the host processor
`32 sends a command to the waveform processor 16, it
`first obtains control of the waveform processor bus 24
`via bus arbitration circuit 44. The host processor 32
`then directly writes the command into miscellaneous
`memory 20 and thereafter relinquishes control of wave
`form processor bus 24. The waveform processor 16
`subsequently reads out and executes the command
`stored in miscellaneous memory 20. Other routines
`called in response to user input tell host processor 32 to
`alter display of menus, graphics or data on CRT30. The
`host processor 32 does this by first arbitrating for con
`trol of the waveform processor bus 24. Upon obtaining
`control of bus 24, processor 32 transmits appropriate
`character strings or other data for storage in display
`memory 26 via bus arbitration circuit 44 and bus 24.
`FIG. 2 illustrates a front panel 50 for the oscilloscope
`of FIG. 1 including various pushbuttons and knobs 34.
`The oscilloscope may display any selected one of a
`hierarchy of menus along the lower edge of the screen
`of CRT 30. A menu on/off front panel pushbutton 51
`controls the display of a currently selected menu. A set
`of five "menu' pushbuttons 52 mounted on the lower
`edge of a bezel 54 surrounding the screen of CRT 30
`allows a user to select menu items displayed on the
`screen directly above menu pushbuttons 52. FIGS.
`
`25
`
`30
`
`50
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`5
`
`15
`
`4,974,167
`5
`6
`3A-3D show various menus that may be displayed. The
`area reserved for calibration results flags. These flags
`particular routine executed by host processor 32 of
`indicate whether various calibration operations were
`FIG. 1 in response to operation of a menu pushbutton
`successful when last performed. The processor consults
`these flags during system startup and generates a display
`52 depends on the menu item currently appearing above
`the pushbutton.
`on the oscilloscope screen indicating the current state of
`oscilloscope calibration.
`FIG. 6A illustrates a prior art routine executed by the
`host processor 32 in response to an interrupt from inter
`The miscellaneous RAM portion of main memory 38
`face circuit 36 of FIG. 1. The host processor first reads
`between address 7000 and 7FFF also stores "header'
`data associated with each waveform data sequence
`data from the interface circuit 36 to determine the
`source of the interrupt, i.e., the particular knob or push
`CH1, CH2 and REF1-REF4 stored in save memory 22.
`10
`button operated (step 60). If a knob or pushbutton other
`The header data contains information about the associ
`ated waveform data sequence, including, for example,
`than one of the menu pushbuttons 52 of FIG. 2 (step 62)
`the digitizing frequency, range settings, and trigger
`initiated the interrupt, the processor executes a routine
`level used when acquiring the waveform data sequence.
`in the instruction ROM associated with the interrupt
`When the host processor 32 changes the settings of
`source (step 64). For example, if a knob was rotated or
`pushbutton operated, the processor may update a front
`acquisition hardware 12 to alter the manner in which
`panel setting parameter stored in main memory 38 of
`the CH1 or CH2 data sequences are acquired, and new
`FIG. 1 indicating current position of the knob or push
`data is acquired, the host processor changes the associ
`ated header data accordingly. Also, when the host pro
`button. When the routine associated with the operated
`pushbutton or knob returns to the interrupt routine, the
`cessor stores a copy of a CH1 or CH2 sequence in save
`20
`interrupt routine ends. Alternatively, when at step 62
`memory 22 as a reference sequence REF1-REF4, it
`the processor determines the interrupt source was one
`copies the associated header information from one area
`of the menu pushbuttons 52 of FIG. 2, the processor
`in miscellaneous RAM to another. When the oscillo
`reads "current menu' parameters previously stored in
`scope displays a waveform based on a CH1 CH2 or
`main memory 38 of FIG. 1 indicating menu items cur
`REF1-REF4 sequence, the host processor 32 may send
`25
`data to the display memory to generate a concurrent
`rently displayed and determines therefrom a routine
`display of text or graphics in accordance with the asso
`associated with the selected menu item (step 66). After
`the processor executes the associated routine (step 68),
`ciated header data. The concurrent text or graphics
`the interrupt routine ends.
`display enables a user to determine, for example, the
`FIG. 6B illustrates a prior art routine executed by the
`vertical and horizontal scale of the waveform display.
`30
`host processor at step 68 of FIG. 6A when the menu
`Other parts of non-volatile main memory 38 between
`item selected by a user references another menu. At step
`addresses 7000 and 7FFF implement conventional
`memory stacks as needed during oscilloscope operation
`70 the routine initiates display of the other menu, and at
`step 72 the routine alters current menu parameters
`and are used as miscellaneous system RAM for storing
`various data such as current front panel setting parame
`stored in main memory 38 to indicate the other menu is
`now displayed. The routine then returns to the interrupt
`ters, current menu parameters, and a "real-time clock”
`parameter. The host processor periodically increments
`routine.
`As previously discussed, oscilloscope 10 of FIG. 1
`the real-time clock parameter while the oscilloscope is
`includes two computer busses, the waveform processor
`turned on. The real-time-clock parameter therefore
`indicates total operating time for the oscilloscope. In
`bus 24 and the host processor bus 40. FIG. 4 illustrates
`allocation of address space on the host processor bus 40
`struction ROM 42 is mapped to addresses 8000-FFFF
`on the host processor bus 40.
`and FIG. 5 illustrates allocation of address space on the
`waveform processor bus 24. Following system start up,
`FIG. 5 illustrates how resources are mapped to the
`when not otherwise executing an interrupt routine, the
`address space associated with the waveform processor
`host processor 32 executes a "sequencer' routine stored
`bus 24, Waveform data sequences CH1, CH2 and REF
`in instruction ROM 42 whereby the host processor
`1-REF4 are stored in paged, non-volatile save wave
`repetitively carries out a sequence of operations defined
`form memory at addresses 0000-1FFF. All other stor
`by the sequencer data stored in main memory 38. The
`age devices connected to bus 24 are volatile. Display
`sequencer data, and therefore the sequence of opera
`memory 26 spans addresses 2000-3FFF, acquisition
`tions being performed, may change from time to time in
`memory 14 covers addresses 4000-4FFF, and miscella
`SO
`response to user input. Referring to FIGS. 1 and 4, host
`neous memory 20 includes addresses 5000-5FFF and
`processor 32 uses "Sequencer' and "Local RAM" areas
`address 7000-FFFF. Addresses 6000-6FFF are
`of non-volatile main memory 38 extending from address
`mapped to devices within memory mapped I/O circuit
`0000 to OFFF(hex) for storing sequencer and other data
`33.
`and when executing various routines
`As illustrated in FIGS. 4 and 5, the waveform data
`55
`sequences and all data accessed through the host pro
`In the preferred embodiment, addresses 5000-5FFF
`cessor bus, including program instructions, header in
`of the host processor bus 40 address space are unused,
`formation associated with the waveform data sequen
`not allocated to any hardware connected to the bus.
`ces, calibration data, current front panel knob and push
`Addresses 6000-6FFF are allocated to addressable stor
`age devices within the memory mapped I/O circuit 33.
`button setting parameters, realitime clock data and other
`Addresses 7000-7FFF of the host processor bus 40
`important data are stored in ROM or non-volatile
`address space are mapped to storage locations in non
`RAM. When a user turns off the oscilloscope or when
`the oscilloscope loses its source of power, this data is
`volatile main memory 38 storing several different types
`preserved and is available when the user subsequently
`of information. For example, a "calibration store' area
`turns on the oscilloscope. Thus, following system
`contains data updated whenever the oscilloscope is
`startup, the oscilloscope need not be re-calibrated, the
`calibrated. The host processor consults the calibration
`data in the course of adjusting settings of acquisition
`front panel settings remain unchanged, and the real-time
`clock routine continues counting where it left off. In
`hardware 12. Addresses 7000-7FFF also include an
`
`35
`
`45
`
`65
`
`Petitioner Intel Corp., Ex. 1031
`IPR2023-00783
`
`
`
`O
`
`15
`
`4,974, 167
`8
`7
`values. These values indicate the initial sequence of
`addition, since waveform sequences and header data
`operations to be performed by the sequencer routine
`were preserved, the oscilloscope can regenerate its
`prior to any user input and are the values initially stored
`display on CRT 30 substantially as it appeared before
`in non-volatile RAM when the oscilloscope was first
`the oscilloscope was shut off.
`shipped from the factory.
`Thus, the non-volatile RAM allows the oscilloscope
`Also, at step 86 the erase routine copies the current
`to preserve acquired waveform data and important
`value of the real-time clock parameter into a predeter
`calibration and other data while it is turned off. How
`mined address within local RAM to temporarily save
`ever, when waveform information stored in non
`that parameter while other areas of non-volatile RAM
`volatile RAM is of a confidential nature, the storage
`are being erased, including the memory locations used
`oscilloscope represents a security risk. In such case, a
`for storing the real-time clock parameter. At step 86, the
`user may wish to remove sensitive information from the
`erase routine also sets POINTER equal to EN
`oscilloscope before leaving it unattended, allowing an
`D-OF-CAL STORE -- 1, the first address of the
`other person to use it, or removing it from a secure site.
`"stacks' storage area shown in FIG. 4. Thereafter, (step
`In accordance with the preferred embodiment of the
`88), the erase routine determines whether POINTER is
`invention, the oscilloscope employs a routine that re
`equal to START-OF-CAL RESULTS, the starting
`sponds to an input "erase' command from a user by
`address of the calibration results area of FIG. 4. If not,
`overwriting the waveform data stored in the save mem
`the erase routine zeros the data stored at the POINTER
`ory 22 with data representing a predetermined pattern
`address, increments POINTER (step 90) and returns to
`which may be termed a "zap' pattern. Also, in response
`step 88. When contents of all non-volatile RAM ad
`to the erase command, the routine erases (sets to zero)
`dresses reserved for stacks have been zeroed, the erase
`or initializes with data stored in ROM the contents of all
`routine moves from step 88 to step 92. At step 92 the
`nonvolatile RAM storage locations other than those
`erase routine sets POINTER equal to EN
`locations storing data that should be preserved for
`D-OF CAL RESULTS-1, the first address of mis
`proper oscilloscope operation, such as the realtime
`cellaneous system RAM as indicated in FIG. 4. The
`clock parameter and the calibration data and flags. The
`25
`erase routine then sets the contents of that address
`routine also checks whether the data was properly
`(POINTER BYTE) equal to zero and increments
`erased or overwritten and displays results of the check
`POINTER (step 94). If at step 96 POINTER is not yet
`on the oscilloscope screen.
`greater than a parameter END OF-RAM (address
`In the preferred embodiment, the user issues the erase
`7FFF in FIG. 4), the routine repeats step 94, thereby
`command by selecting an "erase' menu item displayed
`zeroing the contents at the next address of main mem
`on the oscilloscope screen. Menus are hierarchical and
`ory 38 and incrementing POINTER once again. The
`FIG. 3A illustrates the topmost menu of the menu hier
`erase routine repeats steps 94 and 96 until POINTER
`archy. When the user depresses the menu push-button
`exceeds 7FFF.
`52 directly under a "SYSTEM" item in the menu of
`FIG. 3A, the oscilloscope displays the "system” menu
`At this point the erase routine, having erased the
`35
`REAL-TIME CLOCK parameter from its normal stor
`illustrated in FIG. 3B. When the menu push-button 52
`age location in miscellaneous system RAM, restores it
`directly under the "PANEL" menu item of the system
`to its previous value by copying it back from its tempo
`menu is pressed, the oscilloscope displays a "panel"
`rary storage location in local RAM, writes over with
`menu as shown in FIG. 3C. If the user then depresses
`zero (zeros) the contents of the temporary storage loca
`the menu push-button 52 under an "ERASE MEM
`tion, and zeros the contents of every storage location
`ORY' menu item of the panel menu, the oscilloscope
`0000-7FFF on the waveform processor bus (step 98).
`displays the "erase' menu illustrated in FIG. 3D. When
`Also, at step 98 the erase routine sets a parameter
`the user presses the menu pushbutton 52 under the
`WFM equal to 1. The waveform data sequences
`"ABORT" item of the erase menu of FIG. 3D, the
`WFM = 1 and 2 refer to the CH1 and CH2 data sequen
`panel menu of FIG. 3C is re-displayed. However, when
`45
`ces, respectively, and waveform data sequences 3-6
`the user presses the menu pushbutton 52 under the
`refer to reference sequences REF1-REF4, respec
`“ERASE' item of the erase menu of FIG. 3D, the
`tively. At step 100, the routine calls two routines,
`oscilloscope executes an erase routine illustrated in
`ZAP WAVEFORMCWFM) and
`INIT. HEA
`FIG. 7.
`DER(WFM) and then increments WFM. The
`The erase routine, stored in instruction ROM 42 of
`50
`ZAP WAVEFORMCWFM) writes a "zap' pattern
`FIG. 1, writes over data in every portion of volatile and
`data sequence into the area of non-volatile save memory
`non-volatile memory