United States Patent (19)
`Nakamura et al.
`
`54 SUSPENSION STATE CONTROLFOR
`NFORMATION PROCESSING DEVICES
`SUCH AS BATTERY POWERED
`COMPUTERS
`
`75 Inventors: Atsushi Nakamura, Yokohama;
`Akihiko Hamamoto, Kawasaki;
`Shigehiro Kadota, Machida, all of
`Japan
`73) Assignee: Canon Kabushiki Kaisha, Tokyo,
`Japan
`
`(21) Appl. No.: 523,239
`(22
`Filed:
`Sep. 5, 1995
`30
`Foreign Application Priority Data
`Sep. 7, 1994
`JPl
`Japan .................................... 6-239591.
`Jul. 13, 1995
`JPl
`Japan .................................... 7-199295
`(51
`int. Cl. ... G06F 1/26: G06F 1/32
`52 U.S. Cl. .......................... 395/750; 364/707; 364/492;
`307/66
`58) Field of Search .................................. 395/750, 800;
`364/707, 492; 36.5/227-229: 307/66; 340/661-663
`References Cited
`U.S. PATENT DOCUMENTS
`4,907,183 3/1990 Tanaka .................................... 364/707
`5,021,983 6/1991 Nguyen et al. .
`... 364/707
`5,167,024 11/1992 Smith et al. ...
`... 395/375
`5,230,056 7/1993 Hoshina ..........
`... 395/750
`5,274,827 12/1993 Haggerty et al. ....................... 395/750
`
`56
`
`US005710931A
`Patent Number:
`11
`45 Date of Patent:
`
`5,710,931
`Jan. 20, 1998
`
`5,283,905 2/1994 Saadeh et al. .......................... 395/750
`5,349,668 9/1994 Gladstein et al. .
`395/750
`5,365,221 11/1994 Fennell et al......
`340/636
`5,519,871
`5/1996 Shimoda ................................. 395/750
`Primary Examiner-Gopal C. Ray
`Attorney, Agent, or Firm-Fitzpatrick, Cella, Harper &
`Scinto
`ABSTRACT
`57
`An information processing apparatus according to the
`present invention stores suspension data in a non-volatile
`storage and performs a 0 V suspension process by which are
`turned off all power sources of the apparatus. An active
`suspension process is performed, by which are turned off
`power sources of the apparatus, excluding a power source
`that supplies power to the volatile storage. The 0 V suspen
`sion process is performed when a power supply voltage level
`is lower than a predetermined value, while the active sus
`pension process is performed when that voltage level is
`higher than the predetermined level. The apparatus also
`predicts a processing time for a transfer unit and a power
`characteristic for a second storage unit. In addition, remain
`ing power is detected using a reference value that is set at a
`first predetermined value in accordance with results obtained
`from the two predictions. The apparatus also has a storage
`unit that includes expanded memory areas, which are
`acquired by dividing available space into a plurality of
`blocks, and an expanded memory system, which has a
`plurality of page frames that are assigned to the blocks, and
`manages correspondence between the blocks and the page
`frames.
`
`36 Claims, 22 Drawing Sheets
`
`L0W AREA 2
`
`S6
`
`SELECT ON
`SUSPENSION
`
`
`
`
`
`NORMAL
`OPERATION
`AREA
`
`S2
`SELECT 5W
`SUSPENSION
`
`S
`
`
`
`
`
`
`
`DETECTED WOLTAGE
`LEWEL 2
`
`OW AREA
`MAKE ALARM
`
`SEEC OW SUSPENSION
`
`SUSPENSION
`BUTON ON ?
`YES
`SEND SUSPENSION
`REQUEST
`
`EXECUTE SUSPENSION
`
`SENE) SUSPENSION P/S
`REQUEST
`
`
`
`STOP POWER SUPPLY
`
`SO
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`U.S. Patent
`
`Jan. 20, 1998
`Jan. 20, 1998
`
`Sheet 1 of 22
`Sheet 1 of 22
`
`5,710,931
`5,710,931
`
`FIG 1
`FIG.
`
`7 P
`
`
`
`etitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`BOL
`
`WANNIVA
`
`0}
`
`401WANQS0NVdx3
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`920/1¥adns
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`WALHSANOD90/00||WOvdAUSLLYEYOldvayOvHOLINSWaNOd
`
`
`
`WAN0aXT4nd?NIVNWOouSold|gQ
`
`U.S. Patent
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 2 of 22
`
`5,710,931
`
`ede.ez
`
`adi
`
`0¢
`
`22
`
`
`
`LHOTTyova007
`
`GA0NVdX4
`
`uo
`
`_
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 3 of 22
`
`5,710,931
`
`
`
`6
`
`
`
`
`
`|
`
`G |
`
`7 |
`
`
`
`H0] IMS HEMOd
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 4 of 22
`
`5,710,931
`
`
`
`9 NISOTO HEA00
`
`NO 180HS
`
`7 |
`
`
`
`IWS 08}}
`
`
`
`IWS HEWI 1 Wd
`
`
`
`
`
`
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 5 of 22
`
`5,710,931
`
`FIG 5
`
`STORE MAIN CPU STATUS &
`SYSTEM SATUS
`
`RESET SMI SOURCE REGISTERS
`
`S501
`
`S502
`
`
`
`SUB CPU SMI
`
`HD CHECK SWI
`
`KBC SMI
`
`SUSREO SMI
`
`PM TIMER SMI
`
`SEND HD POWER
`CHECK COMMAND
`TO SUB CPU
`
`POWER
`MANAGEMENT
`
`S503
`
`SUB CPU GETS DATA
`OF REGISTER 15
`
`
`
`
`
`
`
`
`
`BATTERY STATUS CHANGE
`
`AC CONTROL 29
`OFF
`AND
`BATERY LEVE
`LOW-LOW
`
`
`
`UPDATE PM BATTERY
`STATUS
`
`HD POWER CHECK END
`
`RESET HD POWER
`CHECK RECUEST BIT
`S504
`
`
`
`
`
`
`
`TRANSFER DATA OF
`MAINMEN 10 O HD
`
`SYSOFF - OW
`
`
`
`STORE MAIN CPU STATUS & SYSTEM - S512
`STATUS IN MAIN MEM 10 AGAIN
`
`END
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 6 of 22
`
`5,710,931
`
`FIG. 6
`
`SYSTEM BOOT
`
`
`
`
`
`
`
`POST FOR ST
`STRUCTURAL ELEMENTS
`
`INHIBIT SMI
`
`CHECK SEZE OF MEN OB
`
`INFORM SUB CPU OF MEM
`SIZE a
`
`
`
`GES BATTERY STATUS
`FROM SUB CPU
`
`S6
`
`BATTERY
`LEVEL =40 LOW
`
`ST
`SEND POWER DOWN
`COMMAND TO SUB CPU
`
`
`
`
`
`
`
`
`
`
`
`GET BOOT/SET UP
`INFORMATION
`
`POST FOR 2ND
`STRUCTURAL ELEMENTS
`
`START POWER SUPPLY TO
`BACK LIGHT 20
`
`
`
`
`
`
`
`
`
`STORE DATA OF HD IN
`MAIN MEMO
`
`
`
`S1A
`DISPLAY SET
`UP MEN
`
`BATTERY
`LEVEL
`OW
`
`NO
`
`
`
`
`
`SET HD POWER CHECK
`REQUEST BIT
`
`ALOY SMI
`
`S 17
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 7 of 22
`
`5,710,931
`
`FIG 7
`
`SUB CPU PROCESS
`
`INITIALIZE SUB CPU
`
`S2
`
`NO
`
`BATTERY
`VOLTAGE X 8V
`
`S22
`
`S23
`
`STOP POWER SUPPLY
`TO SUB CPU
`
`YES
`SUPPLY POWER TO SUB
`CPU
`
`STOP
`
`INITIALIZE AND START
`REAL TIME OS
`
`S24
`
`S25
`
`
`
`
`
`MAIN TASK
`
`-S26
`
`S27
`
`
`
`swiTCH DETECTION
`SWITCH DETECTION
`
`
`
`
`
`
`
`
`S29
`BATTERY REMAINING
`POWER DETECTION
`S30
`
`CHARGE
`SMALL LED DISPLAY
`
`S31
`
`| SWITCH DETECTION I
`Bios I/E
`I
`
`
`
`BATTERY REMAINING
`POWER DETECTION
`
`SMALL LED DISPLAY
`
`SWITCH DETECTION
`BIOS I/F
`
`S37
`
`S38
`BATTERY REMAINING
`POWER DETECTION
`S39
`
`CHARGE
`SMALL LED DISPLAY
`
`S40
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 8 of 22
`
`5,710,931
`
`FIG. 8
`
`MAIN TASK
`
`NO
`
`
`
`NO
`
`AC
`ADAPTOR PRESENT
`
`S52
`
`(A)
`
`
`
`
`
`YES
`SUB CPU = ACON ?
`AND
`SYSOFF = HIGH
`
`NO
`
`S63
`SOP TASKS OTHER
`THAN MAIN TASK
`
`STOP TASKS OTHER
`THAN MAIN TASK
`
`
`
`S53
`SUB CPU = ACOFF 2
`AND
`SYSOFF - HIGH
`YES
`
`
`
`
`
`
`
`
`
`
`
`START TASK FOR
`SUB CPU=ACOFF &
`SYSOFF=HIGH
`
`MAKE SUB CPU=ACOFF
`8. SYSOFF-HGH
`
`S400 CONTROL 31
`OF
`
`START TASK FOR
`SUB CPU=ACON &
`SYSOFF-HIGH
`
`PE400 CONTROL 31
`OF
`
`
`
`S54
`
`5
`S5
`
`POWER SWITCH
`ON DETECTED 2
`
`
`
`POWER SWITCH
`ON DETECTED
`
`DC/DC CONTROL 31
`ON
`
`
`
`DC/DC CONTROL 31
`ON
`
`CB)
`
`STANDBY FOR
`1 OmSec
`
`S84
`
`RETURN
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 9 of 22
`
`5,710,931
`
`FIG 9
`
`AC
`
`AAPTOR PRESENT
`
`SUB CPU = ACON ?
`AND
`SYSOFF = LOW 2
`
`SB CPU = ACOFF
`AND
`SYSOFF = LOW
`
`
`
`
`
`
`
`
`
`STOP TASKS OTHER
`THAN MAIN TASK
`
`STAR TASK FOR
`SUB CPU-ACOFF 8
`SYSOFF=LOW
`
`MAKE SUB CPU=ACOFF
`& SYSOFF-LOW
`
`S77
`
`STOP TASKS OTHER
`THAN MAIN TASK
`
`STAR TASK FOR
`SUB CPU-ACON &
`SYSOFF-LOW
`
`MAKE SUB CPU-ACON
`& SYSOFF-LOW
`
`POWER SWITCH
`ON DETECTED
`
`POWER SWITCH
`ON DETECTED 2
`
`
`
`
`
`
`
`
`
`S68
`
`
`
`
`
`
`
`
`
`
`
`
`
`NO
`
`SD
`
`
`
`
`
`
`
`
`
`
`
`
`DC/DC
`CONTROL
`31 OFF
`
`
`
`YES
`
`S78
`
`<SCs
`
`DC/DC
`CONTROL
`31 OFF
`
`YES
`
`SUSREC, ON
`
`SUSREQ ON
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 10 of 22
`
`5,710,931
`
`FIG 10
`FIG. OA
`FIG. 10B
`
`FIG 10A
`
`BIOS I/F
`
`UPDATE BATTERY STATUS
`
`S91
`
`(C)
`
`NO
`
`COMMAND RECEIVED 2
`S92
`
`YES
`
`POWER DOWN
`
`BATTERY STATUS
`
`HD POWER CHECK
`
`MEM SIZE
`
`S93
`DC/DC CONTROL
`3 OFF
`
`GET. AND STORE
`S94
`
`S100
`BATTERY LEVEL X Y NO
`LOW LOW 2
`
`YES
`
`- S10
`
`AC CONTROL 29 ON
`
`INITIALIZE LOOP
`COUNTER
`
`STANDBY FOR 100mSec
`
`S95
`SET BATTERY STATUS
`IN REGISTER 15
`
`SO2
`
`S96
`INFORM MAIN CPU OF
`BATTERY STATUS
`
`
`
`S97
`
`S103
`
`STANDBY FOR 1 OnSec
`
`DETECT AN & Ap
`
`S104
`
`S98
`
`REGISTER 15
`FREE
`
`YES
`
`= 0 ?
`
`S105
`
`YES
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 11 of 22
`
`5,710,931
`
`FIG 10B
`
`S99
`
`S106
`
`SET REMAINING POWER
`IN REGISTER 15
`
`SO7
`
`S108
`
`S109
`
`S110
`
`CALCULATE AM
`
`READ 8
`
`AC CONTROL 29 OFF
`
`SET HD POWER CHECK
`END IN REGISTER 15
`
`INFORM MAIN CPU OF
`THIS STATUS
`
`STANDBY FOR 50sec
`
`S 14
`
`END
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 12 of 22
`
`5,710,931
`
`FIG 11
`
`
`
`S111
`
`BATERY STATUS CHANGED 2
`
`
`
`
`
`
`
`SE BATERY STATUS
`IN REGISTER 15
`
`INFORM MAIN CPU
`OF THIS STATUS
`
`S112
`
`S113
`
`
`
`1. O
`
`L
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`Sheet 13 of 22
`FIG. 13
`
`5,710,931
`
`
`
`
`
`
`
`
`
`
`
`
`
`NO
`
`S12
`
`BATTERY
`PACK pUNTED
`
`S122
`
`S123
`
`S124
`
`RESTRUCTURE TBL BASED
`ON Y
`
`GET X & An
`
`
`
`BATTERY
`LEVE X LOW LOW
`2
`
`YES
`
`DETERMINE Y
`
`OWER BATERY LEVE
`BY 1 RANK
`
`SANDBY FOR 50mSec
`
`S129
`
`END
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 14 of 22
`
`5,710,931
`
`
`
`BATTERY LEVEL
`
`HIGH
`
`UPPER
`MIDDLE
`
`DISCRIMINATION
`REFERENCE
`VALUE (Y)
`
`80%
`
`60%
`
`
`
`
`
`
`
`
`
`
`
`LOWER
`MIDDLE
`
`LOW LOW
`
`40%
`
`20%
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 15 of 22
`
`5,710,931
`
`FIG. 16A
`
`FIG. 16B
`
`
`
`54a
`
`54b.
`
`
`
`54C
`
`
`
`54
`
`OOOOOH
`
`OOOOH
`
`STANDARD
`MEM AREA
`
`52
`
`
`
`
`
`
`
`
`
`
`
`
`
`FIRS BLOCK
`
`53a
`
`SECOND BLOCK
`
`53b
`
`53
`
`THIRD BLOCK
`
`FOURTH BLOCK
`
`53d
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 16 of 22
`
`5,710,931
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`FIG. 17
`
`INQUIRE PHYSICAL ADDRESS
`OF MEM BLOCKS 53A-53D
`0 EMM
`
`
`
`STORE THE PHYSICAL ADDRESS
`IN HO
`
`S131
`
`S132
`
`EXECUTE STANDARD
`SUSPENSION
`
`S133
`
`
`
`FIG. 18
`
`
`
`READ DATA FROM STANDARD
`MEM AREA
`
`
`
`READ PHYSICAL ADDRESS OF
`MEM BLOCKS 53A-53D FROM HD
`
`RESTORE DATA OF PAGE
`FRAMES 54A-54D IN MEM
`BLOCKS 53 A-53D
`
`
`
`
`
`EXECUTE SANDARD
`RESUMPTION
`
`S142
`
`S143
`
`S144
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`Sheet 17 of 22
`FIG. 19
`PRIOR ART
`
`5,710,931
`
`3.
`2
`
`LL
`
`
`
`OMB
`
`a
`2
`a.
`3. 20MB
`
`5Sec
`
`-> TIME (t)
`
`FIG. 20
`PRIOR ART
`
`150Sec
`-- TIME (t)
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 18 of 22
`FIG 21
`PRIOR ART
`
`5,710,931
`
`
`
`1V/CELL
`
`-- TIME (t )
`
`AC ADAPTOR USED
`
`------ as
`
`to is
`
`ano
`
`BATTERY USED
`
`
`
`
`
`NORMAL
`OPERATION
`AREA
`
`2x LOW WOLTAGE AREA 1
`
`
`
`
`
`
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`USS. Patent
`
`Jan. 20, 1998
`
`Sheet 19 of 22
`
`5,710,931
`5,710,931
`
`
`
`fieAqnqaL0z 1u0dIvWdEaGeHVAaWWOAond—we|fear
`602nzAMHIVEHhgia
`
`
`YaMOdNIVW_—AlddASY4MOd
`
`922
`
`GZZ
`S2é
`
`coOld
`
`
`
`
`
`
`
`LNSWS9DVNVW
`
`YdMOd
`83 M0d
`
`Lec
`
`612
`
`4
`
`Rea
`
`
`
`EC?AY¥aLIVGdAVE
`
`WVUS
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 20 of 22
`
`5,710,931
`
`FIG. 24.
`
`S
`
`DETECTED WOLTAGE
`LEVEL
`
`LOW AREA
`MAKE ALARM
`
`LOW AREA 2
`
`S6
`
`SELECT ON
`SUSPENSION
`
`SELECT OW SUSPENSION
`
`SUSPENSION
`BUTTON ON ?
`
`YES
`
`SEND SUSPENSION
`RECUEST
`
`EXECUTE SUSPENSION
`
`SEND SUSPENSION P/S
`REQUEST
`
`STOP POWER SUPPLY
`
`S8
`
`S10
`
`NORMA
`OPERATION
`AREA
`
`S2
`
`SELECT 5W
`SUSPENSION
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 21 of 22
`
`5,710,931
`
`
`
`
`
`
`
`
`
`
`
`NORMA
`OPERATION
`AREA
`
`S2
`
`SELECT 5W
`SUSPENSION
`
`
`
`FIG. 25
`O
`
`DETECTED WOLTAGE
`LEVEL 2
`
`LOW AREA
`
`MAKE ALARM
`
`SELECT ON SUSPENSION
`
`EXECUTE HD CHECK
`PROGRAM
`
`FREE SPACE PRESEN
`IN HD 2
`
`YES
`
`SUSPENSION RESUMPTION
`ON ? OR LOW AREA 2
`
`YES
`
`SEND SUSPENSION
`REQUEST
`
`EXECUTE SUSPENSION
`
`SEND SUSPENSION P/S
`REQUEST
`
`STOP POWER SUPPLY
`
`S1
`
`
`
`
`
`LOW AREA 2
`
`S6
`
`SELECT OW
`SUSPENSION
`
`S12
`
`S13
`
`S7
`
`S8
`
`S9
`
`S10
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`US. Patent
`U.S. Patent
`
`Jan. 20, 1998
`Jan. 20, 1998
`
`Sheet 22 of 22
`Sheet 22 of 22
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`5,710,931
`5,710,931
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`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`Jw<=<
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`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`5,710,931
`
`1.
`SUSPENSION STATE CONTROL FOR
`INFORMATION PROCESSING DEVICES
`SUCH AS BATTERY POWERED
`COMPUTERS
`
`15
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`25
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`2
`Since the data that are held in the internal memory are
`stored in the external storage memory by the 0 V suspension
`process, this system is superior for storing data. Further, as
`the power to the internal memory is halted, the service life
`of a battery is extended. However, as memory capacity is
`increased, suspension processing and resumption processing
`require more time.
`FIG. 19 is a graph showing a current characteristic during
`the shift from the standby state, in which the operation of an
`external storage device is halted, up until the idle state, at
`which time reading and writing is possible, is reached at a
`constant-velocity rotation. A and B denote cases where the
`memory capacity of the external storage device is 200 MB,
`and C denotes a case where the memory capacity of the
`external storage device is 500 MB. For A and B, the disk
`rotational speed and the operation clock of the external
`storage memory are different, even though the memory
`capacities are identical.
`As is shown in FIG. 19, the power that is consumed varies
`greatly depending on the memory capacity, the disk rotation
`speed, or the operation clock, and thus it is apparent that as
`the memory capacity is increased, there is a corresponding
`increase in the power consumption requirement.
`FIG. 20 is a graph showing a relationship between the
`time required for suspension processing (0 V suspension)
`and the memory capacity of an internal memory.
`As is apparent from FIG.20, as the capacity of the internal
`memory is increased, the time required for the suspension
`processing is likewise increased, so that it is found that
`suspension processing is greatly affected by the memory size
`of the internal memory. Such a relationship between the
`power that is consumed and the time that is required can also
`be seen with resumption processing.
`Under these conditions, when the discrimination refer
`ence value (%) is set following the above described require
`ments and 0 V suspension is performed by the low-low
`suspension system, the state is shifted to the suspended state
`even though the power remaining in the battery is still
`adequate. The remaining power rate (%) for the discrimi
`nation reference value (%) for the low-low suspension is
`generally set to about 18%, while, for example, the maxi
`mum power consumption is assumed and a safety rate is
`taken into consideration. When the state is shifted to the
`suspended state, the battery capacity of around 18% is
`remained. Therefore, a battery-operable portable informa
`tion processing apparatus has a so-called memory effect
`phenomenon whereby not only is the processing period used
`by a battery shortened but the battery operating time on the
`appearance is also reduced due to the repetitive charging and
`discharging.
`FIG. 21 is a discharge characteristic graph showing a
`relationship between a battery voltage (V) and time (t) while
`using a discrimination reference value (%) as a parameter.
`The horizontal axis indicates the time (t) and the vertical axis
`indicates the battery voltage (V). The broken line (b) rep
`resents a discharge characteristic when the discrimination
`reference value is 18%, while the solid line (a) represents a
`discharge characteristic when the discrimination reference
`value is 7%.
`As is shown in FIG. 21, when, for example, the discrimi
`nation reference value (%) is set to 7% for the state that is
`used when consumed power is low, the battery voltage V is
`gradually and naturally reduced, as is indicated by the solid
`line (a). When the discrimination reference value is set to
`18%, the charging and the discharging are repeated at around
`the value for 18%, which is the discrimination reference
`
`30
`
`BACKGROUND OF THE INVENTION
`2. Field of the Invention
`The presentinvention relates to an information processing
`apparatus, and more particularly, to an information process
`ing apparatus, such as a notebook personal computer
`(hereafter referred to a "notebook PC"), that has a suspen
`sion function that temporarily halts the supply of power as
`needed and a resume function that, when power is again
`supplied, immediately places the computer in the state in
`which it was before it was halted.
`2. Related Background Art
`Power-saving, battery-operable portable information pro
`cessing apparatuses, such as notebook PCs, that have been
`20
`developed and are available on the market incorporate a
`suspension function that temporarily halts the supply of
`power as needed so as to ensure the operation for an
`extended period of time.
`As suspension functions, known are a 0 V suspension
`function that stores data in an internal memory into an
`external storage device, such as a hard disk, and then halts
`the supply of power to the memory; and a 5 V suspension
`function that supplies a minute amount of power to an
`internal memory to protect the data that are stored in the
`internal memory. As systems for shifting to a suspended
`state, known are a system wherewith a user voluntarily sets
`a suspended state by depressing a switch, etc., or by opening
`and closing a display panel; and a low-low suspension
`system that automatically sets a suspended state upon the
`detection of a reduction in the rate of the remaining battery
`capacity.
`Further, currently there have also been developed other
`models of such portable information processing apparatuses,
`as well as desk-toppersonal computers, that include a higher
`speed computation processor and an internal memory or an
`external storage device that has an increased memory capac
`ity.
`When the low-low suspension is performed in a portable
`information processing apparatus, especially by the 0 V
`45
`suspension process, a discrimination reference value (%),
`which is employed as a detection standard for the reduction
`in the rate of the remaining battery capacity, must be set to
`a value that enables all the data stored in an internal memory
`to be completely stored in an external storage device. That
`is, it is necessary for the portable information processing
`apparatus to at the least prevent the occurrence of a problem,
`in the transfer of data from the internal memory to the
`external storage device, that is due to the reduction of
`available consumed power during the suspension process.
`Another factor that must be taken in consideration is that a
`user may make repeated short-time use of the apparatus.
`Therefore, although the power that the portable information
`processing apparatus consumes differs with the modes that
`are used, the discrimination reference value (%) is set to a
`predetermined value (fixed value) that is acquired by assum
`ing the maximum power will be consumed, and by allowing
`for a safety rate, and that provides an operating margin.
`When the rate of the remaining battery capacity is smaller
`than the discrimination reference value (%), the state is
`shifted to the suspended state and predetermined suspension
`processing is performed.
`
`50
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`55
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`65
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`20
`
`3
`value, which results in the memory effect phenomenon
`whereby the battery voltage V is reduced by steps when the
`discharging is performed within a short period following the
`completion of the charging. Although a battery may have
`been used only several tens of cycles, a user may determine
`that the service life of the battery has expired and replace the
`battery, so that the battery is not effectively used.
`In the 5 V suspension processing, since memory data are
`retained in the internal memory, the storage process of the
`memory data when executing the suspension processing is
`not required. Also, for the resumption processing, the
`memory data already exist in the internal memory, as is
`described above. Thus, accessing the suspension processing
`and the resumption processing can be performed at high
`speed. However, as power must be supplied constantly to
`retain the memory data that are stored in the internal
`memory, the service life of the backup battery is reduced.
`And when the suspended state is continued for an extended
`period of time, the power in the battery is dissipated and the
`memory data are erased.
`As is described above, both the conventional 0 V suspen
`sion processing and the 5 V suspension processing have their
`negative and positive aspects when they are employed. A
`method is therefore desired whereby power can be saved
`25
`more effectively, battery operating time can be extended
`longer, and suspension and resumption processing can be
`performed at higher speed.
`SUMMARY OF THE INVENTION
`To overcome the above described conventional problems,
`it is one object of the present invention to provide an
`information processing apparatus that can effectively utilize
`a Suspension function, that can Supply improved stability for
`data storing, and that can save on the power that is con
`Sumed.
`It is another object of the present invention to provide a
`portable information processing apparatus that suppresses a
`memory effect phenomenon so as to extend a battery oper
`ating period, and that optimizes the consumption of power.
`It is an additional object of the present invention to
`provide a portable information processing apparatus that
`executes suspension processing and resumption processing
`at a high speed so as to reduce required processing time, and
`that achieves low power consumption.
`To achieve the above objects, according to the present
`invention, an information processing apparatus, which
`retains suspension data indicating a state in use immediately
`before the information processing apparatus is powered off,
`comprises:
`power supply means for supplying a power voltage;
`volatile storage means for storing data;
`non-volatile storage means for the Writing of data;
`0 V suspension means for storing the suspension data in
`the non-volatile storage means and for performing a 0
`V suspension process by which are turned off all power
`sources of the information processing apparatus;
`active suspension means for performing an active suspen
`sion process by which are turned off power sources of
`the information processing apparatus, excluding a
`power source that supplies power to the volatile storage
`means; and
`selection means for selecting the 0 V suspension process
`when a voltage level of the power supply means is
`lower than a predetermined value, and for selecting the
`active suspension process when the voltage level is
`higher than the predetermined level.
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`In addition, error determination means is included for
`determining whether or not there is an error occurs in the
`non-volatile storage means. It is preferable, when an error
`occurs in the non-volatile storage means, that the selection
`means select the active suspension process, even when the
`voltage level of the power supply means is lower than the
`predetermined value.
`Further, memory presence determination means is pro
`vided for determining whether or not included with the
`non-volatile storage means is non-volatile semiconductor
`memory. When the non-volatile semiconductor memory is
`included, the 0 V suspension means may store the suspen
`sion data first in the non-volatile semiconductor memory.
`Moreover, to achieve the above object, according to the
`present invention, a portable information processing appa
`ratus comprises:
`a battery for supplying power to an apparatus body;
`first storage means for retaining data in a power supplied
`state;
`second storage means for retaining data in a non-power
`supplied state;
`transfer means for transferring the data stored in the first
`storage means to the second storage means while power
`is supplied;
`first prediction means for predicting a processing time for
`the transfer means;
`second prediction means for predicting a power charac
`teristic for the second storage means;
`remaining power detection means, for detecting a remain
`ing power level for the battery, that includes reference
`value setting means for setting the first predetermined
`value in consonance with results obtained by the first
`and the second prediction means;
`power supply halting means for, when the remaining
`power detection means determines that the remaining
`power level for the battery is lower than a first prede
`termined reference value, halting a supply of power
`upon completion of the transfer of the data by the
`transfer means.
`Further, to achieve the above object, according to the
`present invention, a portable information processing appa
`ratus comprises:
`a battery for supplying power to an apparatus body;
`first storage means, for retaining data in a power supplied
`state, that includes expanded memory areas that are
`acquired by dividing available space into a plurality of
`blocks and an expanded memory system that has a
`plurality of page frames that are assigned to the plu
`rality of blocks, and that further includes expanded
`memory management means for managing correspon
`dence between the plurality of blocks of the expanded
`memory areas and the page frames of the expanded
`memory system;
`second storage means for retaining data in a non-power
`supplied state;
`transfer means for transferring the data stored in the first
`storage means to the second storage means while power
`is supplied;
`remaining power detection means for detecting a remain
`ing power of the battery; and
`power supply halting means for, when the remaining
`power detection means determines that the remaining
`power level of the battery is lower than a first prede
`termined reference value, halting a supply of power
`upon completion of the transfer of the data by the
`transfer means.
`
`Petitioner Intel Corp., Ex. 1027
`IPR2023-00783
`
`

`

`5,710,931
`
`5
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`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a diagram illustrating the outline of a notebook
`personal computer as a portable information processing
`apparatus according to a first embodiment of the present
`invention;
`FIG. 2 is a block diagram illustrating the internal arrange
`ment of the notebook personal computer;
`FIG. 3 is a block diagram illustrating the arrangement of
`the essential section of the notebook computer;
`FIG. 4 is a detailed block diagram illustrating the arrange
`ment of a chip set;
`FIG. 5 is a flowchart showing BIOS SMI processing;
`FIG. 6 is a flowchart showing system boot processing;
`FIG. 7 is a flowchart showing the control processing
`performed by a sub-CPU;
`FIG. 8 is a flowchart (2) showing the procedures of a
`main task;
`FIG. 9 is a flowchart (32) showing the procedures for the
`main task;
`FIG. 10 which is comprised of FIGS. 10A and 10B is a
`flowchart (%) showing the procedures for a BIOSI/F task;
`FIG. 11 is a flowchart (%) showing the procedures for the
`BIOS I/F task;
`FIG. 12 is a diagram showing a power level selection
`table;
`FIG. 13 is a flowchart showing the procedures for a
`battery remaining power detection task;
`FIG. 14 is a diagram showing a variable reference value
`selection table;
`FIG. 15 is a diagram showing a battery table discrimina
`tion table;
`FIGS. 16A and 16B are diagrams showing a memory map
`of an internal main memory;
`FIG. 17 is a flowchart showing suspension processing;
`FIG. 18 is a flowchart showing resumption processing:
`FIG. 19 is a consumed current characteristic graph show
`ing a change in a consumed current from the halted state of
`a hard disk (HD) until it has reached the operational state;
`FIG. 20 is a characteristic graph showing a relationship
`between the time required for suspension processing and a
`memory size;
`FIG. 21 is a discharge characteristic diagram for explain
`ing a memory effect phenomenon;
`FIG. 22 is a block diagram illustrating the arrangement of
`a portable information processing apparatus according to a
`second embodiment of the present invention;
`FIG. 23 is a graph showing an example of a voltage level
`for a power supply section shown in FIG. 22;
`FIG. 24 is a flowchart for explaining the selection of
`suspension processing and the procedures for the suspension
`processing;
`FIG. 25 is a flowchart for explaining the selection of
`suspension processing and the procedures for the suspension
`processing that are executed by a portable information
`processing apparatus according to a third embodiment of the
`present invention; and
`FIG. 26 is a block diagram illustrating the arrangement of
`a portable information processing apparatus according to a
`fourth embodiment of the present invention.
`
`6
`DETALED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`(First Embodiment)
`The preferred embodiments of the present invention will
`now be described while referring to the drawings.
`FIG. 1 is a diagram illustrating the outline of a notebook
`PC as a portable information processing apparatus according
`to one embodiment of the present invention. In the notebook
`PC, a keyboard 2 is provided in the lower section of a PC
`body 1, and a battery pack 3, which has a plurality of
`secondary chargeable batteries for supplying power to the
`PC body 1, is loaded into the side face of the PC body 1.
`The battery pack 3 is designed with a smart battery that
`incorporates a so-called one-chip microcomputer. The rate
`(%) of the remaining battery capacity and the remaining
`operation time for the PC body1 are calculated periodically,
`and the results of the calculations are displayed on a compact
`liquid crystal display panel (small LCD) 4.
`A light-emitting diode (LED) 5 is on while the battery
`pack 3 is being charged, and is turned off when the charging
`has been completed.
`When a power switch 6 is depressed in a power-on state
`or in a suspended state, the PC body 1 is set to the
`operational state. Further, this state of the PC body 1 is
`shifted to the suspended state when the power switch 6 is
`depressed (short-on) for a predetermined period of time
`(e.g., two seconds), while the operational state is shifted to
`the power-off state when the power switch 6 is depressed
`(long-on) for a period that is longer than the predetermined
`time (e.g., two seconds).
`A liquid crystal display panel (LCD) 7 is freely opened
`and closed in the direction indicated by the arrow A. A
`contact sensor (not shown) is provided in a rotational portion
`for opening and closing the LCD 7. Power management
`(PM) in a setup menu is so set that, when the LCD7 is closed
`while the PC body 1 is in the operational state, the state of
`the PC body 1 can be shifted to the suspended state, and
`when the PC body 1 is in the suspended state following the
`closing of the LCD 7, the state of the PC body 1 can be
`shifted to the operational state by opening the LCD7. An AC
`adaptor can be inserted into the rear portion of the PC body
`1 of the notebook PC.
`FIG. 2 is a block diagram illustrating a control system
`within the notebook PC. The control system of the notebook
`PC comprises a ROM (hereafter referred to as a "BIOS
`ROM") 8, in which a basic input/output system (BIOS) is
`stored; a main CPU 9, which controls the entire system of
`the apparatus; an internal main memory 10, in which various
`input data are stored; an RTC 12, which employs a compact
`battery 11 to backup setup data, boot strap data (hereafter
`referred to as "boot data"), etc., even in the power-off state;
`a chip set 13, which primarily controls the power of various
`input/output units (I/O units); a sub-CPU 14, which mainly
`controls a power supply system; and an expanded register
`15, which