United States Patent (19)
`Naka0 et al.
`
`54 APPARATUS FOR PREVENTING OVER-
`DISCHARGE
`
`75 Inventors: Fumiaki Nakao, Kosai; Tetsuya
`Suzuki, Aichi-ken, Katsuo Yamada,
`Kosai; Shoichi Wakao, Hamamatsu,
`Kozi Ohishi, Kosai, all of Japan
`73 Assignee: FDK Corporation, Tokyo, Japan
`
`21 Appl. No.: 08/791,045
`22 Filed:
`Jan. 28, 1997
`30
`Foreign Application Priority Data
`Feb. 5, 1996
`JP
`Japan .................................... 8-O18509
`(51) Int. Cl." ........................................................ H02. 7700
`52 U.S. C. ...
`320/136; 320/134; 320/116;
`320/118
`58 Field of Search ..................................... 320/135,136,
`320/134, 116, 118; 324/429, 433, 434;
`429/90,91, 92,93; 307/10.7
`
`
`
`56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`USOO5929603A
`Patent Number:
`11
`(45) Date of Patent:
`
`5,929,603
`Jul. 27, 1999
`
`5,159,257 10/1992 Oka ......................................... 320/136
`5,296,997 3/1994 Betton et al.
`320/136
`5,332,958 7/1994 Sloan ...................................... 320/136
`5,493,197 2/1996 Eguchi et al. .......................... 320/116
`
`Primary Examiner Peter S. Wong
`ASSistant Examiner K. Shin
`Attorney, Agent, or Firm-Evenson, McKeown, Edwards &
`Lenahan, P.L.L.C.
`ABSTRACT
`57
`An over-discharge prevention apparatus comprising:
`a Voltage detection device 2 for detecting electric Voltages
`of both ends of a electric Storage element (B) and
`outputting a discharge finishing signal (PFD) when a
`discharge extinction voltage (VL) is detected;
`a discharge controlling device 3 for delaying the detected
`output of the Voltage detection device 2 for a prede
`termined time (Td); and
`a Switching device 1 connected in Series with the electric
`Storage element (B), the Switching device being set to
`an OFF State by a delay Signal of the discharge con
`trolling device.
`
`4,493,001
`
`1/1985 Sheldrake ................................ 320/135
`
`2 Claims, 3 Drawing Sheets
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`

`

`U.S. Patent
`U.S. Patent
`
`Jul. 27, 1999
`Jul. 27, 1999
`
`Sheet 1 of 3
`Sheet 1 of 3
`
`5,929,603
`5,929,603
`
`
`
`FIG.
`
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`|( os TI po
`
`So
`
`
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`

`

`U.S. Patent
`
`Jul. 27, 1999
`
`Sheet 2 of 3
`
`5,929,603
`
`F. G. 3
`
`F.G. 5
`(PRIOR ART)
`
`
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`

`

`U.S. Patent
`U.S. Patent
`
`Jul. 27, 1999
`Jul. 27, 1999
`
`Sheet 3 of 3
`Sheet 3 of 3
`
`5,929,603
`5,929,603
`
`F.G. 4
`FIG. 4
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`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`
`

`

`1
`APPARATUS FOR PREVENTING OVER
`DISCHARGE
`BACKGROUND OF THE INVENTION
`The present invention relates to an apparatus for prevent
`ing over-discharge in various kinds of accumulator elements
`Such as a Secondary battery, primary battery and large-scale
`capacitors, etc. and, more particularly, to the over-discharge
`prevention apparatus which can improve utilization effi
`ciency for the Storage elements and to prevent erroneous
`(wrong) operation, that is, malfunction, at the time the
`electric power from the accumulator elements is cut to the
`electric and electronic apparatuses and instruments.
`Conventionally, a battery package mounts therein Second
`ary batteries as a power Source for a portable electronic
`instrument and an auxiliary power System for electronic
`instruments and apparatus. The battery package is provided
`with an over-discharge prevention mechanism as well as an
`over-charge prevention mechanism So that troubles Such as
`degradation of battery properties and/or leakage of a battery
`liquid at the time of over-consumption of the installed
`batteries can be prevented.
`FIG. 5 shows a block diagram of a typical structure of the
`conventional Over-discharge prevention mechanism, which
`is generally composed of a Voltage detector 2 for monitoring
`an electric Voltage of the battery and a Switching portion 1
`connected in series with batteries B1 and B2 (in an example
`of two cells connected in series) between terminals T1 and
`T2. When the battery voltage falls below a discharge extinc
`tion voltage, the voltage detector 2 is driven to switch OFF
`the Switching portion 1 to thereby stop the electric Supply to
`electronic apparatuses and instruments.
`However, with respect to electronic apparatuses and
`instruments Such as personal computers and digital portable
`telephone instruments which require data processing, the
`data in the proceSS or are destroyed when the power Supply
`is stopped due to the Over-discharge detection.
`Therefore, these electric apparatuses and instruments
`have been provided with a power Source detection mecha
`nism So that the remaining battery remanent Voltage is
`assumed from a voltage value VT of the power source in the
`battery package to judge in advance the State of battery
`consumption, and then an operation of the electronic appa
`ratuses and instruments are accurately stopped before the
`battery output is cut off So that the data and information are
`reliably Saved and protected.
`However, Since the judgment of the battery consumption
`is generally provided with Some marginal regions in order to
`reliably Stop the operation of the electronic apparatuses and
`instruments So that the electronic apparatuses and instru
`ments are Stopped even when the remaining capacity of the
`battery is fully within the usable region, it has been difficult
`to take out the battery capacity of the battery package to a
`maximum extent.
`In addition, in the battery package of the illustrated
`example of FIG. 5 in which a plurality of battery cells Bl,
`B2, (. . . Bn) are connected in Series, the balance of cell
`voltages V1, V2, ( . . . Vn) is detected by the voltage
`detectors M1, M2, (. . . Mn), respectively, and a logical Sum
`(logical OR) of the detected outputs drives the over
`discharge prevention mechanism to cut off the power Supply
`and. Accordingly, it has been quite difficult to externally
`judge accurately the consumption of the battery. Therefore,
`a voltage margin of the Voltage detection in the electronic
`apparatuses and instruments is inevitably further increased,
`with the result that an efficiency of the consumption or usage
`is further degradated.
`
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`2
`SUMMARY OF THE INVENTION
`An object of the present invention is to provide an
`improvement for Solving the disadvantages of the conven
`tional mechanisms.
`Another object of the present invention is to provide a
`new and reliable over-discharge prevention apparatus which
`permits Safety of the data and information of external
`electronic apparatuses and instruments at the time of an
`extinction Voltage of the batteries and, improvements in
`utilization efficiency of the batteries.
`According to the present invention, there is provided an
`over-discharge prevention apparatus comprising:
`Voltage detection means for detecting electric Voltages at
`the ends of an electric Storage element (B) and output
`ting a discharge finishing signal (PFD) when a dis
`charge finishing Voltage (VL) is detected;
`discharge controlling means for delaying the detected
`output of the Voltage detection means for a predeter
`mined time (Td); and
`Switching means connected in Series with the electric
`Storage element (B), the Switching means being set to
`an OFF State by a delay Signal of the discharge con
`trolling means.
`According to another aspect of the present invention,
`there is provided an over-discharge prevention apparatus
`comprising:
`Voltage detection means for detecting electric Voltages at
`the ends of an electric Storage element (B) and output
`ting a discharge finishing signal (PFD) when a dis
`charge finishing Voltage (VL) is detected;
`remote controlling means for effectuating eXternal power
`cut-off signal (RST) after the discharge finishing signal
`(PFD) is outputted; and
`Switching means connected in Series with the electric
`Storage element (B), the Switching means being set to
`an OFF state by an OFF output signal (S1) of the
`remote controlling means 4.
`In the present invention, Secondary batteries, primary
`batteries and large-scaled capacitors can form the electric
`Storage elements (B).
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a block diagram of a typical structure of a battery
`package provided with an over-discharge prevention appa
`ratus of the present invention.
`FIG. 2 is a block diagram of a battery package Structure
`with an over-discharge prevention apparatus according to
`another embodiment of the present invention.
`FIG. 3 is a block diagram of a specific structure of an
`electric circuit of the over-discharge prevention apparatus of
`the present invention.
`FIG. 4 is an operational timing diagram of the over
`discharge prevention apparatus shown in FIG. 3.
`FIG. 5 is a block diagram of the conventional prior art
`Structure of a battery package provided with the conven
`tional Over-discharge prevention apparatus.
`
`PREFERRED EMBODIMENT OF THE
`INVENTION
`A preferred embodiment of the invention will be
`described with reference to the accompanying drawings.
`Referring first to FIG. 1, a secondary battery B mounted
`within a battery package has a positive electrode (+)
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`

`

`3
`connected, through a Switching portion 1, with a power
`Source terminal T1, and a negative electrode (-) connected
`to a ground terminal T2. Through the terminals T1 and T2,
`electric power is Supplied to external electric apparatuses
`and instruments.
`A Voltage detector 2 is provided for detecting a Voltage of
`the battery B. An output side of the voltage detector 2 is
`connected with a discharge controller 3 and also connected
`with a terminal T3 as an electric line for a discharge finishing
`Signal PFD for the external apparatuses and instruments. The
`discharge controller 3 is composed mainly of a delay circuit
`for delaying a detected output of the Voltage detector 2, and
`its output Side provides a delay output signal S0 connected
`with an input Side of the Switching portion 1.
`An operating mode of the apparatus according to the first
`embodiment of FIG. 1 will be described with reference to
`the timing diagram of FIG. 4. First, when the external
`apparatuses and instruments Z are connected to each of the
`connectors T1, T2, T3 of the battery package, discharge of
`the battery B Starts and, at this moment, if the battery voltage
`is above the discharge finishing voltage VL (that is, a limited
`voltage for finishing the discharge), the Voltage detector 2
`maintains its inoperative State, and the Switching portion 1
`is turned into its ON-state by its output So that a discharge
`current I is Supplied to the external apparatuses and instru
`ments Z through the terminals T1, and T2. The external
`apparatuses and instruments Z always monitor the State and
`conditions of the battery via the electric line for the dis
`charge finishing Signal PFD transmitted through the terminal
`T3.
`AS the discharge continues, the battery voltage gradually
`lowers. When the battery voltage becomes lower than the
`discharge finishing Voltage VL, the Voltage detector 2 is
`driven to output a discharge finishing signal PFD. When the
`external apparatuses and instruments receive an ON-state of
`the discharge finishing Signal PFD, the external apparatuses
`and instruments judge the battery to be in a used-up con
`Sumed or State and therefore begin Stopping the operation of
`the external apparatuses and instruments.
`On the other hand, the over-discharge detection output is
`delayed for the predetermined time Td at the discharge
`controller 3 and its delay output signal S0 will make the
`Switching portion 1 of the next Stage change to an OFF State
`and then the electric power Supply to the external appara
`tuses and instruments Z is Stopped after the predetermined
`delay time Td from the over-discharge detection.
`The delay time Td is used for the purpose of not only
`prevention of incorrect or wrong operation of the over
`discharge detection due to a pulsating load current, but also
`to obtain an execution period for Stopping the operation. For
`example, in digital portable telephones, the delay time Td is
`Set to be some milli-Seconds (mSec.) and more, and in
`personal computers and work Stations the delay time Td is
`Set to be in the range of from Some hundred milli-Seconds to
`Some tens of milli-Seconds for the purpose of Saving the data
`and information into a hard disc device. In all cases, the
`delay time Td is extremely Small Such as Several tens of
`milli-Seconds at maximum as described above whereas the
`battery discharge time is as long as one hour to Six hours
`and, therefore, the battery can be prevented from being
`over-discharged and Stressed by a Surge current during the
`delay time Td having Such a short period of time.
`Although the first embodiment described above uses a
`Single-cell Structure as the battery B, the present invention is
`not limited to the embodiment, but also a multi-cell structure
`as shown in the conventional apparatus of FIG. 5 can be
`
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`5,929,603
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`4
`applied. In the multi-cell Structure, the Voltage of each
`battery cell is detected and a logical Sum (OR operation) of
`its detected output provides an over-discharge output of the
`battery package. Thus, Since it is possible to alarm the
`finishing of discharge of the battery from the side of the
`battery package, the discharge finishing Voltage can be set to
`a usage limitation value and, therefore, the remaining capac
`ity of the battery can be taken out and used up effectively.
`In the first embodiment described above, the execution
`period for Stopping the operation of the external apparatuses
`and instruments Z is set in advance to be the delay time Td
`in the battery package. However, the various execution
`periods of the Stopping operation are different from one an
`other in their types and kinds of the external apparatuses and
`instruments Z, and also in their operational modes.
`Therefore, it will be difficult to set a Suitable time in
`accordance with each apparatus and instrument.
`Additionally, Setting only the battery package Sometimes
`provides difficulties in application to the external appara
`tuses and instruments.
`In view of the above reasons, the invention is extended to
`a Second embodiment shown in FIG. 2 in which the Stopping
`operation execution period is more accurately matched with
`the delay time Td. In FIG. 2, the apparatus has the voltage
`detector 2 for monitoring the Voltage of the battery B, a
`Switching portion 1 for Switching ON/OFF a discharged
`current I, and a remote controller 4 for controlling an
`ON/OFF state of the Switching portion 1. As an electric
`Signal line for transmitting and receiving Signals to and from
`the external apparatuses and instruments Z, a wire for a
`power Source cutting-out signal RST from the external
`apparatuses and instruments is provided in addition to the
`wire for the discharge finishing signal PFD from the afore
`mentioned battery package, and the input line of the dis
`charge finishing Signal PFD is connected to an input Side of
`the remote controller 4 through the terminal T3.
`In the second embodiment of the invention, the remote
`controller 4 is operated So that the power cutting-out Signal
`RST becomes effective when the discharge finishing signal
`PFD is output. Thus, it is not necessary that the remote
`controller 4 in the Second embodiment has a delay function
`which, on the other hand, is important to the discharge
`controller 3 in the first embodiment of FIG. 1.
`An operating mode of the apparatus in the Second
`embodiment shown in FIG. 2 will be described with refer
`ence to the timing diagram of FIG. 4. When the discharge is
`continued to the point where the battery Voltage is lower
`than the discharge finishing Voltage VL, the Voltage detector
`2 is driven to transmit the discharge finishing signal PFD to
`thereby require the external apparatuses and instruments to
`Stop the power Supply.
`On the other hand, the external apparatuses and instru
`ments Z always monitor the battery State by the discharge
`finishing signal PFD. When the external apparatuses and
`instruments recognize the discharge-finish of the battery B,
`a predetermined stop operation (data-Save operation, etc.) is
`executed and thereafter a power cut-out signal RST is
`transmitted to the battery, package. When the power cut-out
`signal RST is input to the remote controller 4, an OFF output
`Signal S1 is output from the output Side to the Switching
`portion 1 So that the power Supply to the external appara
`tuses and instruments Z is Stopped.
`In the Second embodiment of the invention, the, cut-out
`timing of the output after the over-discharge detection can be
`controlled by the external apparatuses and instruments Z and
`a Suitable Stopping operation period Tcl in accordance with
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`

`

`5,929,603
`
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`the external apparatuses and instruments can be obtained as
`desired. Thus, a Serious problem of System-Shutdown in a
`network System Such as personal computers, work Stations,
`etc. can be prevented thereby improving the reliability of the
`entire System.
`With reference to FIG. 3 which shows a specific electric
`circuit, a battery package has therein a battery B composed
`of three cells B1, B2, and B3 which are connected together
`in series. In FIG. 3, a Switching portion 1 for cutting off the
`battery output is composed of a MOS-FET, The battery
`detector 2 is composed of comparators M1, M2, M3, for
`Separately detecting the Voltages of the battery cells B1, B2,
`B3, and an output Side of the logical OR gate is connected
`with the discharge controller 3 of the next stage as an output
`of the Voltage detector 2 and also connected with the
`15
`terminal T3 as a conductive wire for the discharge finishing
`signal PFD. Reference voltages Vr1, Vr2, Vr3 of the com
`parators M1, M2, M3 are set in accordance with discharge
`finishing voltages of the battery cells B1, B2 and B3.
`The discharge controller 3 has a charge circuit which is
`composed of capacitor C connected to the output Side of the
`Voltage detector 2 and a resistor R, and a delay circuit
`composed of a comparator M4 which has a predetermined
`reference Voltage as a negative (-) input. The output line
`thereof is connected with a gate of the MOS-FET of the next
`Stage.
`In the illustrated embodiment of FIG. 3, the voltage
`detector 2 and the discharge controller 3 (delay circuit) is
`customized into an integrated circuit to comply with a Small
`Size requirement, and a capacitor is additionally affixed
`outside the integrated circuit in order for a delay time,
`determined by a time constant of the capacitor C and the
`resistor R, to be set timely. This structure shown in FIG. 3
`is a specific structure of the first embodiment shown in FIG.
`1 and, Similarly, the Specific-structure of the Second embodi
`ment shown in FIG. 2 can be realized by connecting a
`connecting terminal of the externally fitted capacitor C to the
`terminal T4 as an input terminal for the power Source cutting
`out signal RST as shown by dotted line in FIG. 3, so that an
`interactive System which is a feature of the Second embodi
`ment can be realized. In other words, if the power cutting out
`signal RST is maintained at a “L” (low) state even if the
`discharge finishing signal PFD is transmitted by the over
`discharge detection, the delay circuit is not driven Since
`charging operation of the capacitor C is not started even
`though the output of the voltage detector 2 is of a “H” (high)
`State and, therefore, the battery output is not cut out. AS the
`power cutting out signal RST is changed to the “H” State,
`charging operation Starts, and the output of the comparator
`M4 changes from “L” state to “H” state after the time
`constant of the capacitor C and the resistor R, So that the
`MOS-FET becomes an OFF state to thereby cut off the
`battery output. At this moment, if the delay time after the
`power cut-out Signal RST is received is not required, the
`capacitor C can be of a Small Scale or otherwise deleted.
`In the remote controller 4 of the second embodiment of
`the invention shown in FIG. 2, a delay circuit of the
`comparator M4 is used, but the present invention is not
`limited to this structure, but rather any desired Structure can
`be applied provided that the MOS-FET which forms the
`Switching portion 1 can be set to an OFF state by means of
`the power cutting signal RST from the outside after the
`discharge finishing signal PFD is transmitted. Further, the
`over-discharge prevention apparatus is applied to not only
`the Secondary batteries but also to the primary batteries Such
`as manganese dry cells and alkaline dry cells, etc., large
`Scaled batteries and accumulators and various kinds of
`
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`batteries and accumulator elements in which an output
`Voltage changes in accordance with a remaining capacity of
`Such batteries and so forth.
`According to the present invention, a discharge finishing
`Signal is transmitted when the accumulation elements Such
`as batteries are in a discharge end State (discharge extinction
`voltage) and the discharge is stopped after a predetermined
`period of time. Thus, if this is applied to external apparatuses
`and instruments as a power Source, processing data and
`information can be protected before the power Supply is
`Stopped and other Suitable and necessary emergency pro
`cessing can be executed to thereby improve the Safety and
`reliability of the data in the external apparatuses and instru
`mentS.
`Further, the power Source detection mechanisms which
`have been required in the external apparatuses and instru
`ments of the conventional apparatus are not required any
`more in the present invention. Thus, Since Voltage detection
`margins are not required, the remaining capacity of the
`battery cells can be obtained to a maximum extent.
`Additionally, in the present invention the discharge is
`Stopped when a power cut-out Signal is received after a
`discharge finishing Signal is transmitted and, therefore, the
`period of time from over-discharge detection to Stop of
`discharge can be controlled freely by the external apparatus
`and instruments. Consequently, especially in a network
`System using personal computers or WorkStations, Serious
`problems of System-Shutdown can be prevented by a Suitable
`power cutting-out Sequence, So that the reliability of the
`entire System can be improved.
`What is claimed is:
`1. An Over-discharge prevention apparatus for an external
`apparatus, comprising:
`voltage detection means for detecting electric Voltages of
`each battery cell of a multi-cell Structure forming a
`battery package, Said Voltage detection means obtain
`ing a logical Sum of the detected electric Voltages when
`a discharge finishing Voltage is detected to transmit a
`discharge finishing Signal (PFD) for the battery pack
`age to the external apparatus;
`discharge controlling means for delaying a detected out
`put of the Voltage detection means for a predetermined
`time (Td); and
`Switching means connected in Series with the battery
`package, the Switching means being Set to an OFF State
`by a delay Signal of the discharge controlling means
`after the discharge finishing Signal is transmitted to the
`external apparatus.
`2. An Over-discharge prevention apparatus for an external
`apparatus, comprising:
`Voltage detection means for detecting electric Voltages of
`each battery cell of a multi-cell Structure forming a
`battery package, Said Voltage detection means obtain
`ing a logical Sum of the detected electric Voltages when
`a discharge finishing Voltage is detected to transmit a
`discharge finishing Signal (PFD) for the battery pack
`age to the external apparatus;
`remote controlling means for effectuating an external
`power cut-off Signal (RST) after the discharge finishing
`signal (PFD) is transmitted; and
`Switching means connected in Series with the battery
`package, the Switching means being Set to an OFF State
`by an OFF output signal (S1) of the remote controlling
`means after the discharge finishing Signal is transmitted
`to the external apparatus.
`
`k
`
`k
`
`k
`
`k
`
`k
`
`Petitioner Intel Corp., Ex. 1007
`IPR2023-00783
`
`