(12) United States Patent
`Nishikawa
`
`USOO6804792B2
`US 6,804,792 B2
`Oct. 12, 2004
`
`(10) Patent No.:
`(45) Date of Patent:
`
`(54) COMPUTER POWER MANAGEMENT WITH
`CONVERTER FOR CHANGING GENERATED
`POWER MODE COMMANDS FOR
`EXTERNAL DEVICES
`
`(75) Inventor: Hirofumi Nishikawa, Hamura (JP)
`(73) Assignee: Kabushiki Kaisha Toshiba, Kawasaki
`(JP)
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 631 days.
`
`(*) Notice:
`
`(21) Appl. No.: 09/779,554
`(22) Filed:
`Feb. 9, 2001
`(65)
`Prior Publication Data
`US 2001/001495.0 A1 Aug. 16, 2001
`Foreign Application Priority Data
`(30)
`Feb. 10, 2000 (JP) ....................................... 2000-034081
`(51) Int. Cl." .................................................. G06F 1/32
`(52) U.S. Cl. ....................... 713/323; 713/300; 713/310;
`713/320; 713/324; 713/330; 713/340
`(58) Field of Search ................................. 713/323,300,
`713/310,320, 324, 330, 340
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`2/1995 Kikinis ....................... 34.5/212
`5,389,952. A
`9/1995 Lee et al. ................... 34.5/212
`5,448,262 A
`5,465,366 A 11/1995 Heineman ................... 713/324
`
`5,493.684 A * 2/1996 Gephardt et al. ........... 713/322
`5,638,541. A * 6/1997 Sadashivaiah ...
`... 713/323
`5,648,799 A 7/1997 Kikinis .............
`... 34.5/212
`5,821,924 A 10/1998 Kikinis et al. .
`... 34.5/212
`5,832,280 A * 11/1998 Swanberg ......
`... 713/300
`5,880,719 A 3/1999 Kikinis ..........
`... 34.5/212
`5,905,900 A * 5/1999 Combs et al. ....
`... 713/320
`5,919.263 A 7/1999 Kikinis et al. ....
`... 713/320
`6,005,559 A * 12/1999 Miyamoto .................. 34.5/212
`OTHER PUBLICATIONS
`Tanenbaum, Andrew S., “Structured Computer Organiza
`tion”, 1984, Prentice Hall, 2nd Edition, p. 11.*
`McLaughlin, J., et al., “Display Power Management Signal
`ing (DPMS) Proposal” (1993), pp. 1-8.
`* cited by examiner
`Primary Examiner-Lynne H. Browne
`ASSistant Examiner Tse Chen
`(74) Attorney, Agent, or Firm-Finnegan, Henderson,
`Farabow, Garrett & Dunner, L.L.P.
`(57)
`ABSTRACT
`A computer is connected to an external device and outputs
`a command to the external device to shift the external device
`to a power Saving State. The computer comprises an oper
`ating System generating a first power Saving command for
`shifting the external device to a first power Saving State when
`a non-operation time reaches a first time, a driver converting
`the first power Saving command into a Second power Saving
`command for Shifting the external device to a Second power
`Saving State in which power consumption is lower than the
`first power Saving State. The converted Second power Saving
`command is output to the external device.
`
`15 Claims, 4 Drawing Sheets
`
`208
`
`DRWER
`
`
`
`
`
`
`
`
`
`STANDBY
`
`
`
`SUSPEND
`
`
`
`OFF
`
`LENNOX EXHIBIT 1033
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`LENNOX EXHIBIT 1033
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`U.S. Patent
`
`Oct. 12, 2004
`
`Sheet 2 of 4
`
`US 6,804,792 B2
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`INPUT DEVICE N-202
`
`
`
`
`
`DR WER
`
`208
`
`210
`
`212
`
`DISPLAY
`CONTROLLER
`
`204
`
`F. G. 2
`
`208
`
`DRVER
`
`
`
`
`
`
`
`
`
`STANDBY
`
`
`
`
`
`SUSPEND
`off
`
`FIG. 3
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`U.S. Patent
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`Oct. 12, 2004
`
`Sheet 3 of 4
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`US 6,804,792 B2
`
`NORMAL
`FINAL
`OPERATION
`
`STANDBY
`t
`|
`
`SUSPEND
`t2
`|
`- 1
`
`- 1
`
`1
`
`OFF
`3
`
`- ~
`
`t
`
`
`
`OFF - 1
`12 -14-H - t
`FINAL OPERATIN
`t
`POWER
`NORMAL:
`CONSUMPTION
`STAND BY
`STATE
`SUSPEND - - - - -
`OFF
`F. G. 4
`SUSPEND ON OFF
`NORMAL
`H---- t
`FINAL
`t1
`t2
`t3
`OPERATION
`:
`OFF
`NORMA
`ON OFF
`----e- it
`FINAL
`t2
`6PERATION
`2
`3
`
`t
`
`POWER CONSUMPTION
`STATE
`
`NORMAL
`SUSPEND - - - - - - -
`OFF
`-
`F.G. 5
`OFF
`STANDBY
`NORMA
`He- t
`FINA
`t
`12
`OPERATION
`-
`NORMAL
`FINAL
`OPERATION
`NORMAL
`STANDBY
`OFF--------
`F. G. 6
`
`t
`
`t
`
`POWER CONSUMPTION
`
`- 1
`
`Y
`
`OFF
`t
`
`
`
`LENNOX EXHIBIT 1033
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`U.S. Patent
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`Oct. 12, 2004
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`Sheet 4 of 4
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`US 6,804,792 B2
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`
`
`
`
`RECEIVE ORDER
`
`S12
`
`
`
`S1.4
`
`YES
`
`COMPUTER
`WITH OS REQUESTED
`
`
`
`
`
`
`
`
`
`NSTRUCT MANUFACTURE
`OF COMPUTER+OS+DRIVER
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`
`
`S16
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`NSTRUCT MANUFACTURE
`OF COMPUTER+DR WER
`
`S28
`
`
`
`
`
`NO
`
`MANUFACTURE COMPUTER
`AND DRIVER SOFTWARE
`
`MANUFACTURE COMPUTER
`AND DRIVER SOFTWARE
`
`
`
`NST ALL OS OR STORE
`OS IN FD (OR CD-ROM)
`
`STORE DRIVER SOFTWARE
`N FD (OR CD-ROM)
`
`STORE DRIVER SOFTWARE
`CORRESPONDING TO OS -- S22
`|N FD (OR CD-ROM)
`
`
`
`PACKAGE COMPUTER
`AND FD (OR CD-ROM)
`
`S30
`
`S32
`
`S34
`
`PACKAGE COMPUTER, OS,
`AND DR WER SOFTWARE
`FD (OR CD-ROM)
`
`LENNOX EXHIBIT 1033
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`US 6,804,792 B2
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`1
`COMPUTER POWER MANAGEMENT WITH
`CONVERTER FOR CHANGING GENERATED
`POWER MODE COMMANDS FOR
`EXTERNAL DEVICES
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`This application is based upon and claims the benefit of
`priority from the prior Japanese Patent Application No.
`2000-034081, filed Feb. 10, 2000, the entire contents of
`which are incorporated herein by reference.
`
`BACKGROUND OF THE INVENTION
`The present invention relates to a power Saving control
`function for a computer Such as a personal computer.
`Various portable notebook type personal computers
`capable of operating by batteries have recently been devel
`oped. A computer of this type has various power Saving
`functions in order to prolong the continuous operation time
`of the System by a battery as long as possible. One of them
`is a power Saving function concerning a display device Such
`as an LCD or CRT.
`Standards for the power Saving function include the
`International Energy Star Standard which defines that a
`computer must comprise a function capable of activating the
`low-power mode and deep sleep mode of a display. The
`low-power mode is the first low-power state which is
`automatically activated after the computer does not operate
`for the first predetermined time. The deep sleep mode is the
`Second low-power State which is automatically activated
`when the computer does not operate for the Second prede
`termined time. According to this standard, the shift time for
`activating the low-power mode must be set within 30 min,
`and the shift time must be set to activate the deep sleep mode
`within 70 min. Further, the total of the shift times to the
`low-power mode and deep sleep mode must fall within 70
`min. Note that the shift time is changeable by the user.
`For example, if the computer does not operate for a
`predetermined time or more Set by the user, an operating
`system (to be simply referred to as an OS hereinafter)
`generates the first operation mode Signal for Shifting to a
`Standby State (corresponding to the low-power mode) in
`which the screen display is turned off. Further, if the
`computer does not operate for another predetermined time or
`more Set by the user, the OS outputs the Second operation
`mode signal for shifting to a power-off State (corresponding
`to the deep sleep mode). The BIOS receives these mode
`Signals, and controls the display controller to control the
`operation State of the display.
`In this manner, if a non-operation State continues for a
`certain time or more, power consumption is temporarily
`reduced, and then the display is turned off. In other words,
`a plurality of Stages (two stages in this example) of the
`power Saving State are Set. If a mouse or keyboard is
`operated in either the Standby State or power-off State,
`display resumes. In a CRT, the time until display resumes is
`shorter in return from the standby state than in return from
`the power-off state. For this reason, when the computer with
`the CRT does not operate for a predetermined time, it is not
`immediately set to the power-off state but temporarily to the
`Standby State.
`Some other OSs further divide the standby state into a
`plurality of States, and gradually reduce power consumption
`through a plurality of States.
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`In general, a So-called Server OS having an advanced
`network-compatible function does not take multistage
`power Saving control, and directly shifts to the power-off
`State after the non-operation State continues for a predeter
`mined time, i.e., takes only two, power-on and power-off
`StateS.
`Most of the OSS of conventional computer systems first
`output a Standby mode Signal when a computer does not
`operate for a predetermined time, and then output a deep
`Sleep mode signal to Set the power-off State when the
`computer does not operate for another predetermined time.
`However, Some users attach importance to the power
`Saving effect more than the time-shortening effect until
`display resumes, do not require the multistage power Saving
`State, do not desire to Set the power-off State after the Standby
`State is temporarily Set, but desire to directly Set the power
`off state. When an LCD is used in place of a CRT, the time
`until display resumes is almost the Same between return
`from the power-off state and return from the standby state.
`In this manner, most of conventional OSS cannot cope
`with a demand for directly setting the power-off state when
`the computer does not operate for a predetermined time, in
`order to enhance the power Saving effect.
`Along with upgrading (function advance) of an OS, the
`upgraded version of the above-mentioned OS (if the non
`operation State continues for a predetermined time, the OS
`first outputs a low-power mode signal, and if the non
`operation State further continues, outputs a deep sleep mode
`signal) can be used as a server OS. When the server OS,
`which immediately shifts to the power-off state in non
`operation, is upgraded, the display device of a client is not
`immediately set to the power-off state but is temporarily set
`to the Standby State. A client user who does not know the
`change of the OS or forgets it may mistake this State for a
`malfunction of the computer, and may be confused. Even a
`user who knows the change of the OS may feel unnatural if
`display operation changes.
`BRIEF SUMMARY OF THE INVENTION
`Accordingly, it is an object of the present invention to
`provide a computer and power Saving control method
`capable of realizing power Saving control in a Smaller
`number of Stages or Simple power Saving control in only two
`ON and OFF states, and enhancing the power saving effect
`with a simple arrangement without changing the OS even if
`the OS defines power Saving control in a plurality of Stages.
`It is another object of the present invention to provide a
`computer and power Saving control method capable of
`performing power Saving control Similar to a previous OS
`without causing confusion or unnatural feeling of the user
`even if the OS is changed to change computer operation
`concerning power Saving control.
`According to the present invention, there is provided a
`computer which is capable of being connected to an external
`device and outputting a command to the external device to
`shift the external device to a power Saving State, the com
`puter comprising a generator configured to generate a first
`power Saving command for shifting the external device to a
`first power Saving State when a non-operation time reaches
`a first time, a converter configured to convert the first power
`Saving command into a Second power Saving command for
`shifting the external device to a Second power Saving State
`in which power consumption is lower than the first power
`Saving State, and an output unit configured to output the
`Second power Saving command to the external device.
`According to the present invention, there is provided a
`power Saving method for a computer which is capable of
`
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`being connected to an external device and outputting a
`command to the external device to shift the external device
`to a power Saving State, the method comprising detecting a
`non-operation time, generating a first power Saving com
`mand for shifting the external device to a first power Saving
`State when the non-operation time reaches a first time; and
`converting the first power Saving command into a Second
`power Saving command for shifting the external device to a
`Second power Saving State in which power consumption is
`lower than the first power Saving State; and outputting the
`Second power Saving command to the external device.
`According to the present invention, there is provided a
`computer program for a computer which is capable of being
`connected to an external device and outputting a command
`to the external device to shift the external device to a power
`Saving State, the program being Stored in a computer read
`able medium, and the program comprising the following
`Steps of generating a first power Saving command for
`shifting the external device to a first power Saving State when
`a non-operation time reaches a first time, converting the first
`power Saving command into a Second power Saving com
`mand for shifting the external device to a Second power
`Saving State in which power consumption is lower than the
`first power Saving State; and outputting the Second power
`Saving command to the external device.
`According to the present invention, there is provided
`another computer in which an operating System Sequentially
`outputs a plurality of power Saving commands to a hardware
`to reduce power consumption Stepwise, the computer com
`prising a download unit located between the operating
`System and the hardware and configured to download a
`Software for receiving the plurality of power Saving
`commands, converting the plurality of power Saving com
`mands into a Smaller number of power Saving commands,
`and outputting the Smaller number of power Saving
`35
`commands, and wherein the plurality of power Saving com
`mands output by the operating System are Supplied to the
`hardware as the Smaller number of power Saving commands
`via the Software, and power consumption is reduced based
`on the Smaller number of power Saving commands in a
`Smaller number of Stages than Stages defined by the oper
`ating System.
`According to the present invention, there is provided a
`Still further power Saving Setting method comprising down
`loading an operating System; downloading a Software for, if
`45
`the operating System is able to generate a plurality of power
`Saving commands and generates a predetermined power
`Saving command, for changing the predetermined power
`Saving command into a power Saving command other than
`the predetermined power Saving commands, and performing
`a power Saving control for a peripheral device in accordance
`with the power Saving command output from the operating
`System or the Software.
`According to the present invention, there is provided a
`Still further computer comprising a download unit config
`ured to download an operating System; a download unit
`configured to, if the operating System is able to generate a
`plurality of power Saving commands and generates a pre
`determined power Saving command, download a Software
`for changing the predetermined power Saving command into
`a power Saving command other than the predetermined
`power Saving commands, and a power Saving controller
`configured to perform a power Saving control for a periph
`eral device in accordance with the power Saving command
`output from the operating System or the Software.
`According to the present invention, there is provided a
`Still further method of manufacturing a computer, compris
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`ing manufacturing a computer for an order not including an
`operating System;
`manufacturing a Software used in the computer to, if the
`operating System is able to generate a plurality of power
`Saving commands and generates a predetermined power
`Saving command, change the predetermined power Saving
`command into a power Saving command other than the
`predetermined power Saving commands, and packaging the
`computer and the Software.
`Additional objects and advantages of the present inven
`tion will be set forth in the description which follows, and
`in part will be obvious from the description, or may be
`learned by practice of the present invention.
`The objects and advantages of the present invention may
`be realized and obtained by means of the instrumentalities
`and combinations particularly pointed out hereinafter.
`BRIEF DESCRIPTION OF THE SEVERAL
`VIEWS OF THE DRAWING
`The accompanying drawings, which are incorporated in
`and constitute a part of the Specification, illustrate presently
`preferred embodiments of the present invention and,
`together with the general description given above and the
`detailed description of the preferred embodiments given
`below, Serve to explain the principles of the present inven
`tion in which:
`FIG. 1 is a block diagram showing the arrangement of a
`computer according to the first embodiment of the present
`invention;
`FIG. 2 is a block diagram showing the hierarchical
`structure of the system of the computer according to the first
`embodiment;
`FIG. 3 is a view showing the operation of a driver
`according to the first embodiment;
`FIG. 4 is a timing chart for explaining a power Saving
`control according to the first embodiment;
`FIG. 5 is a timing chart for explaining a power Saving
`control according to the Second embodiment;
`FIG. 6 is a timing chart for explaining a power Saving
`control according to the third embodiment; and
`FIG. 7 is a flow chart showing the operation of a computer
`manufacturing System by a computer according to the fourth
`embodiment of the present invention.
`DETAILED DESCRIPTION OF THE
`INVENTION
`A preferred embodiment of a computer according to the
`present invention will now be described with reference to
`the accompanying drawings.
`FIG. 1 is a block diagram showing the hardware arrange
`ment of a computer according to the first embodiment of the
`present invention.
`The first embodiment will exemplify a battery-drivable
`notebook or laptop type portable computer, but the present
`invention can also be applied to a desktop type computer.
`The display device is not limited to a liquid crystal display
`device integrated with the main body, but may be a separate
`liquid crystal display device or CRT display device.
`A processor bus 1, internal PCI bus 2, internal ISA bus 3,
`and IC bus 4 are formed on the system board of the portable
`computer. If necessary, the user connects a docking Station
`Serving as an expansion unit for expanding a function to a
`docking connector 10 attached to the computer main body.
`The docking connector 10 has three connector elements 101,
`102, and 103.
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`The computer main body incorporates a CPU 11, host/PCI
`bridge 12, system memory 13, display controller 14, DSP
`interface gate array (DSP I/F GA) 15, internal PCI/ISA
`bridge 16, card controller 17, PCI/DS (DS: Docking Station)
`bridge 18, BIOS memory (ROM) 19, hard disk drive (HDD)
`20, keyboard controller 21, real-time clock (RTC) 22, I/O
`control gate array 23, and power supply controller (PSC) 24.
`The functions and arrangements of the components in the
`computer main body in FIG. 1 will be explained.
`The CPU 11 executes and controls various application
`programs including an OS and utility programs Stored in the
`system memory 13. The processor bus 1 directly coupled to
`the I/O pin of the CPU 11 has a data bus with a predeter
`mined bit width.
`The system memory 13 is a memory device which stores
`15
`the OS, device drivers, application programs to be executed,
`and processing data, and is formed of a plurality of DRAM
`modules. The system memory 13 is connected to the host/
`PCI bridge 12 via a dedicated memory bus having a data bus
`with a predetermined width. The data bus of the memory bus
`can be the data bus of the processor buS 1. In this case, the
`memory bus is formed of an address bus and various
`memory control Signal lines.
`The host/PCI bridge 12 is a bridge LSI connecting the
`processor bus 1 and internal PCI bus 2, and functions as one
`of bus masters of the internal PCI bus2. The host/PCI bridge
`12 has a function of bidirectionally converting a bus cycle
`including data and an address between the processor buS 1
`and the internal PCI bus 2, and a function of access
`controlling the memory 13 via the memory bus.
`The internal PCI bus 2 is a clocked I/O bus. All cycles on
`the internal PCI bus 2 are synchronized with PCI bus clocks.
`The PCI bus2 has an address/data bus used by time division.
`The data transfer cycle on the PCI bus 2 is formed of an
`address phase and one or more Subsequent data phases. An
`35
`address and transfer type are output in the address phase,
`and, for example, 8-, 16-, 24-, or 32-bit data is output in the
`data phase.
`The display controller 14 is one of bus masters of the
`internal PCI bus 2, similar to the host/PCI bridge 12, and
`displays image data of a video memory (VRAM) 143 on a
`display device such as an LCD 141 or CRT 142. The display
`device may be integrated with the main body, or Separated.
`The computer system of the first embodiment has a function
`of Stopping a display timing control Signal, Supplied to the
`LCD 141 or CRT 142, in accordance with a request.
`More Specifically, when a time during which no operation
`(pointing with a mouse or key input) is done reaches the first
`time set by the user, the OS outputs the first control signal
`(power Saving request) for shifting the display device to a
`Standby State. When the non-operation time reaches the
`Second time longer than the first time, the OS outputs the
`Second control Signal for shifting the display device to a
`Suspend State. Further, when the non-operation time reaches
`the third time longer than the second time, the OS outputs
`the third control Signal for shifting the display device to a
`power-off State. In this case, the display is stopped in both
`the Standby and Suspend States, but power consumption is
`lower in the Suspend State. For example, the display can be
`Stopped by Stopping generation of either of Vertical and
`horizontal sync signals VSYNC and HSYNC. In the power
`off State, the two signals are stopped. In the Standby State,
`generation of VSYNC is stopped. In the suspend state,
`generation of HSYNC is stopped to realize lower power
`consumption than in the standby state. Note that definition
`of the Standby, Suspend, and power-off States is not limited
`to this, and may be realized by Stopping another signal.
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`The BIOS receives the first, second, and third signals
`from the OS, and transfers them to the display controller 14.
`The DSP interface gate array 15 is one of PCI devices, and
`constitutes a DSP system for performing various sound
`processes and telephone/data communication processes
`together with a DSP 151, modem CODEC 152, and sound
`CODEC 153.
`The DSP interface gate array 15 communicates with the
`DSP 151, modem CODEC 152, and sound CODEC 153 to
`control Sound processing and communication processing
`using the digital signal processing function of the DSP 151
`under the control of a dedicated device driver program
`executed after being loaded to the System memory 13.
`The internal PCI/ISAbridge 16 is a bridge LSI connecting
`the internal PCI bus 2 and internal ISA bus 3, and functions
`as one of PCI devices. The internal PCI/ISA bridge 16
`incorporates a PCI bus arbiter, DMA controller, and the like.
`The internal ISAbus 3 is connected to the BIOS memory 19,
`HDD 20, keyboard controller 21, RTC 22, and I/O control
`gate array 23.
`The card controller 17 is one of PCI devices, and controls
`a PCMCIA or a PC card having card bus specifications.
`The PCI/DS bridge 18 controls connection/disconnection
`of a bus with the docking station. That is, the PCI/DS bridge
`18 is a bridge LSI connecting the internal PCI bus 2 and a
`docking bus 7 corresponding to a PCI bus, and functions as
`one of PCI devices. The docking bus 7 is externally led via
`the connector element 101 of the docking connector 10, and
`connected to the docking Station.
`The BIOS memory 19 stores a BIOS, and is formed of a
`flash memory So as to be programmable. In this
`embodiment, when the BIOS receives a display device
`power saving request from the OS, the BIOS executes power
`Saving control So as to request the display controller 14 to
`Stop a display timing control Signal.
`The real-time clock (RTC) 22 is a timepiece module
`having its own operation battery, and has a memory which
`always receives power from the battery. This memory is
`used to Save, e.g., environment Setting information repre
`Senting a System operation environment.
`The I/O control gate array 23 is a bridge LSI connecting
`the internal ISA bus 3 and I°C bus 4, and incorporates a
`plurality of registers readable/writable by the CPU 11. Using
`these registers allows communicating the CPU 11 with the
`power supply controller 24 on the IC bus 4.
`A plurality of control Signal lines connected to the dock
`ing Station are externally led from the I/O control gate array
`23 via the connector element 102 of the docking connector
`10. The I/O control gate array 23 detects docking/undocking
`between the computer main body and a docking Station.
`Further, when the docking station is docked while the
`computer is powered, the I/O control gate array 23 controls
`to prevent destruction of the expansion unit in the docking
`Station or malfunction of the System due to insertion/
`removal of a hot line.
`The I°C bus 4 is a bidirectional bus made of one clock
`Signal line and one data line (SDA), and is externally led via
`the connector element 103 of the docking connector 10.
`The power supply controller 24 turns on/off the computer
`in accordance with ON/OFF operation of the power supply
`switch or ON/OFF operation of an eject Switch (described
`below). In addition, the power supply controller 24 controls
`the power Supply in accordance with docking/undocking of
`the docking Station.
`FIG. 2 shows the hierarchical structure of the computer
`system. An OS 204 comprises a timer 206 connected to an
`
`LENNOX EXHIBIT 1033
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 8
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`input device 202 Such as a keyboard or mouse, and detects
`the non-operation time of the input device 202. If the
`non-operation time detected by the timer 206 reaches the
`first time, the OS 204 outputs the first control signal for
`shifting the display device to the standby state. If the
`non-operation time reaches the Second time longer than the
`first time, the OS 204 outputs the second control signal for
`shifting the display device to the Suspend State. Then, when
`the non-operation time reaches the third time longer than the
`second time, the OS 204 outputs the third control signal for
`shifting the display device to the power-off state. Before
`detecting the non-operation time of the input device 202, the
`OS 204 outputs a control signal for setting the power-on
`State.
`In the present embodiment, a driver 208 is arranged
`between the OS 2.04 and a BIOS 210. The driver 208
`appropriately converts a control signal output from the OS
`204 into one as shown in FIG. 3, and outputs the converted
`Signal in order to change the power Saving control mode of
`the OS 204. That is, the driver 208 directly outputs ON and
`OFF signals for shifting to the power-on and power-off
`States, while converting Standby and Suspend Signals for
`shifting to the Standby and Suspend States into OFF signals,
`and then outputting the OFF signals. In this manner, the
`driver 208 converts control signals (standby, Suspend, and
`power-off signals) for Setting a plurality of power Saving
`states generated by the OS 204 into a control signal (in this
`case, an OFF signal) for Setting a single power Saving State.
`The driver 208 is not originally installed in the computer, but
`is downloaded via a network or read from a floppy drive
`(FD) or CD-ROM driver (neither is shown), and stored in
`the HDD 20 in accordance with a user's demand. The
`demand is to change the power Saving control mode defined
`by the OS 204.
`A control signal output from the driver 208 is input to the
`BIOS 210, and transferred to a display controller 212,
`Similar to a control Signal output from a conventional OS.
`An example of power Saving control according to the first
`embodiment will be explained. FIG. 4 shows the difference
`in operation between the prior art not including the driver
`208 and the present invention including the driver 208.
`The OS of this embodiment allows the user to set the shift
`time to the power Saving State. Thus, the user Sets a Standby
`time t1, Suspend time t2, and power-off time t3 until the
`display device shifts from the non-operation State to the
`Standby State, Suspend State, and power-off State. AS will be
`described below, Setting of the Suspend time t2 and power
`off time t3 is insignificant, but the user must Set them
`because the OS 204 requests setting. When the input device
`202 does not operate, the timer 206 starts measuring the
`non-operation time. When the measured time reaches the
`Standby time t1, Suspend time t2, or power-off time t3, the
`OS 204 outputs a standby, Suspend, or power-off signal to
`the BIOS 210.
`In the prior art, these signals are directly Supplied from the
`BIOS 210 to the display controller 212. As a result, if the
`non-operation State of the input device 202 continues, the
`power consumption State of the display device Sequentially
`changes from a normal State to the Standby State, Suspend
`State, and finally power-off State, and the power consump
`tion amount gradually decreases.
`To the contrary, in the first embodiment, as shown in FIG.
`3, all the Standby, Suspend, and power-off Signals output
`from the OS 204 are converted by the driver 208 into
`power-off signals, which are then supplied to the BIOS 210.
`When the non-operation state of the input device 202
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`reaches the Standby time t1, the power consumption State of
`the display device changes from the normal State to the
`power-off state, as represented by the Solid line in FIG. 4.
`This can reduce power consumption by an amount repre
`Sented by hatched lines in comparison with the prior art.
`Note that when the OS 204 detects the operation of the
`input device 202 after the standby time t1 (power-off state),
`it requests display device power Saving cancel, i.e., outputs
`an ON signal. This ON signal is supplied to the display
`controller 212 as it is via the driver 208 and BIOS 210. Then,
`the display device resumes display.
`According to the first embodiment, a multistage power
`Saving control defined by the OS can be easily changed to a
`simple control using only two states ON and OFF by only
`installing the driver 208 on the user side without changing
`an OS or BIOS. This can meet a user's demand for further
`reducing power consumption instead of further shortening
`the time from the power-off state to the normal State (display
`resume). Saving power consumption is very important in a
`portable notebook type personal computer, and even in the
`use of an AC power Supply, is also important in terms of
`protection of the global environment.
`Other embodiments of the computer according to the
`present invention will be described. The same portions as
`those of the first embodiment will be indicated in the same
`reference numerals and their detailed description will be
`omitted. The above-described OS gradually reduces power
`consumption from the display State through the Standby and
`Suspend States. An embodiment concerning an OS which
`takes another reduction form will be explained.
`When the input device does not operate, and the non
`operation time reaches the first Setting time t1, Second time
`t2, or third time t3, an OS of the second embodiment outputs
`a Suspend, power-on, or power-off Signal to an BIOS, as
`shown in FIG. 5. Note that the second and third times t2 and
`t3 cannot be set by the user, and their interval (t3-t2) is very
`Short. Before the power Supply is turned off, it is temporarily
`turned on in consideration of the Serving life of a display
`device. A driver in this case is the same as the driver of the
`first embodiment shown in FIG. 3 except that input of a
`Stan