(12) United States Patent
`Yanagisawa
`
`(54)
`
`METHOD FOR CONTROLLING FAN IN
`COMPUTER SYSTEM
`
`(75) Inventor: Takashi Yanagisawa, Yokohama (JP)
`(73) Assignee: International Business Machines
`Corporation, Armonk, NY (US)
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 454 days.
`
`Notice:
`
`(*)
`
`(21)
`(22)
`(65)
`
`Appl. No.: 09/797,222
`Filed:
`Mar. 1, 2001
`Prior Publication Data
`
`US 2002/0126431 A1 Sep. 12, 2002
`Foreign Application Priority Data
`(30)
`Jan. 3, 2001
`(JP) ....................................... 2001-056284
`(51) Int. Cl. .................................................. HO2H 5/04
`(52) U.S. Cl. ................
`... 361/103; 361/695
`(58) Field of Search ................................. 361/687, 694,
`361/695, 103; 324/501, 584; 713/600; 700/278,
`299, 300; 307/117
`
`USOO6665163B2
`US 6,665,163 B2
`Dec. 16, 2003
`
`(10) Patent No.:
`(45) Date of Patent:
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`5,513,361. A * 4/1996 Young ........................ 713/320
`5,664,118 A * 9/1997 Nishigaki et al. ........... 710/304
`5,884,049 A
`3/1999 Atkinson .................... 361/687
`* cited by examiner
`Primary Examiner Ronald W. Leja
`(74) Attorney, Agent, or Firm-Carlos Munoz-Bustamante
`(57)
`ABSTRACT
`In a docking station for a PC, a PCI adapter, an IDE
`controller, and a PC card controller operate when a PCI
`clock is Supplied from the PC, and Stop when the Supply of
`the PCI clock is stopped by the PC entering a sleep mode.
`Adriving Signal output circuit outputs an actuation signal to
`a cooling fan drive circuit when the PCI clock is supplied
`thereto, and outputs a stop Signal to the cooling fan drive
`circuit when the Supply of the PCI clock is stopped. The
`cooling fan drive circuit includes a temperature Sensor for
`detecting the internal temperature of a power Supply unit,
`and controls on/off of the cooling fan on the basis of the
`detected temperature by this temperature Sensor and an
`output signal from the driving Signal output circuit.
`11 Claims, 8 Drawing Sheets
`
`14O
`
`POWERSUPLY
`136
`
`
`
`
`
`OO
`
`
`
`PC-PCl
`BRIDGE
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 1
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 1 of 8
`
`US 6,665,163 B2
`
`Figure 1)
`
`
`
`
`
`
`
`
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 2
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 2 of 8
`
`US 6,665,163 B2
`
`Figure 2
`
`
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 3
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 3 of 8
`
`US 6,665,163 B2
`
`Figure 3)
`
`
`
`S
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 4
`
`

`

`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 5
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 5 of 8
`
`US 6,665,163 B2
`
`Figure 5)
`
`
`
`
`
`XTddTIS RIGHAYAOA
`
`O O|
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 6
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 6 of 8
`
`US 6,665,163 B2
`
`Figure 6)
`
`I -
`
`T -
`
`5
`
`5
`
`3.
`
`G
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 7
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 7 of 8
`
`US 6,665,163 B2
`
`Figure 7)
`
`
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 8
`
`

`

`U.S. Patent
`
`Dec. 16, 2003
`
`Sheet 8 of 8
`
`US 6,665,163 B2
`
`Figure 8)
`
`
`
`as was a see si use as a d as a
`
`as as a ad as
`
`it
`
`air
`
`s up
`
`app war we at
`
`a valuk
`
`sess ss we was a
`
`Y sh me 4 as as a
`
`it
`
`u va v.
`
`{
`
`q x
`
`8
`
`- 8
`
`P. v
`
`.
`
`.
`
`.
`
`. ur
`
`up WX.
`
`X 8b aw
`
`as
`
`as a
`
`v 4
`
`» -
`
`were vers
`
`s s
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 9
`
`

`

`1
`METHOD FOR CONTROLLING FAN IN
`COMPUTER SYSTEM
`
`US 6,665,163 B2
`
`FIELD OF THE INVENTION
`The present invention relates to a computer and a method
`for controlling a cooling fan in a computer, and in particular,
`to the control of a cooling fan in a computer which can
`connect to an external device in an expansion unit.
`BACKGROUND OF THE INVENTION
`An expansion unit to expand functions of a notebook
`personal computer (PC), for example, a docking Station, has
`a cooling fan for cooling a device and power Supply
`mounted in the docking Station.
`Conventionally, this cooling fan is controlled on the basis
`of temperature inside a power Supply detected by a tem
`perature Sensor provided inside the power Supply. For
`example, control is performed So that the cooling fan is
`operated and the inside of the docking Station is cooled if
`detected temperature is higher than predetermined
`temperature, and that the cooling fan is stopped if the
`detected temperature is equal to or lower than the predeter
`mined temperature.
`However, there is not certain correlation between the
`temperature inside the power Supply and the temperature of
`a device requiring the cooling by the cooling fan, and only
`the temperature inside the power Supply is measured, and
`hence there is a case that it is not possible to Surely actuate
`the cooling fan when the temperature of the device is high.
`Furthermore, Since various devices are mounted in the
`expansion unit Such as the docking Station, it is not possible
`to know beforehand which portion is easy to be heated, and
`it is difficult to provide a temperature Sensor beforehand at
`a portion where temperature is easy to rise.
`By the way, recently, a standard called ACPI (Advanced
`Configuration and Power Interface) which allows power
`Supply management to be performed predominantly by an
`operating System is well known as power management
`(power Supply management) for a PC.
`In addition, according to the PC 99 design guide which is
`a hardware specification of a computer laid down by
`Microsoft Corporation, under the above-described ACPI
`environment, a behavior of a PC should look the same in a
`Sleep mode and in a power-off State for a user.
`Thus, in case of the above-described cooling fan, for
`example, Since the cooling fan Stops and does not generate
`noise at the time of the power-off State, the cooling fan must
`be also stopped for preventing the noise from being gener
`ated in the Sleep mode.
`However, in order to Stop the cooling fan also in the Sleep
`mode, a temperature condition for actuating the cooling fan
`must be set higher than normal to prevent the cooling fan
`from being accidentally operated in the Sleep mode.
`Thus, the cooling fan may not operate even when the PC
`operates normally, and hence there is a problem that the
`cooling fan cannot Sufficiently cool a device that is mounted
`in the docking Station.
`SUMMARY OF THE INVENTION
`The present invention is provided in consideration of the
`above-described facts, and an object of the present invention
`is to provide a computer, which can adequately control the
`cooling fan to cool the device mounted in the expansion unit,
`and a method for controlling the cooling fan.
`
`1O
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`In order to achieve above-described objects, a computer
`according to the present invention can connect to at least one
`external device, which operates by, for example, a clock
`being Supplied at least from the external thereto. Such
`external devices include, for example, a storage device Such
`as a hard disk, a PC card, a CD-ROM drive, a DVD-ROM
`drive, and the like, and operated by electric power and clock
`being Supplied from the external thereto.
`These external devices are used, for example, by being
`connected with a computer main body and can be mounted
`in an expansion unit for expanding functions, and an expan
`Sion slot provided in the computer main body. In addition,
`the computer main body or expansion unit has a cooling fan
`for cooling a power Supply device, which Supplies electric
`power to an external device and the above-described exter
`nal device.
`In Such a computer, detection means detects the Supply of
`a clock to the external device. Thus, the detection means
`detects whether the clock is Supplied to the external device
`and the external device is under operation. Here, the State in
`which the clock is not Supplied is, for example, a case that
`the computer is in the Sleep mode.
`Signal output means outputs an actuation Signal to actua
`tion means for actuating the cooling fan, on the basis of the
`clock. For example, when the clock is detected, namely,
`when it is detected that the clock is Supplied to the external
`device and the computer is in an operating State, the Signal
`output means outputs the actuation Signal for actuating the
`cooling fan, to the actuation means. The actuation means is
`composed of, for example, a Switching device Such as a
`MOS-FET, and drives the cooling fan with the actuation
`Signal. In addition, when the clock is not detected, namely,
`for example, when the computer is in the Sleep mode, the
`Supply of the clock to the external device is stopped, and
`when the external device is in a non-operating State, the
`Signal output means outputs a stop signal for Stopping the
`cooling fan, to the actuation means. Owing to this, the
`cooling fan is Stopped.
`In this manner, Since the actuation/non-actuation of the
`cooling fan is controlled by whether the clock is Supplied to
`the external device, it is possible to Surely actuate the
`cooling fan when the external device operates, and hence it
`is possible to fully cool the external device.
`In addition, it is possible to make the detection means
`include integration means, integrating the clock signal, in an
`input Stage. Owing to this, the Signal output means can
`output a signal at a fixed level while the clock signal is
`inputted and can make this as an actuation Signal. In this
`manner, it is possible to actuate the cooling fan in Simple
`configuration.
`Additionally, if the temperature inside the computer is still
`high like just after shifting from a normal operation mode to
`a sleep mode even if the clock is not Supplied to the external
`device, it is preferable to perform cooling by the cooling fan.
`Then, it can be performed that the computer further
`includes at least one temperature Sensor detecting the tem
`perature inside the computer, and the Signal output means
`outputs the actuation signal to the actuation means on the
`basis of the clock and detected temperature by the tempera
`ture SenSOr.
`For example, if the clock is not detected and the detected
`temperature by the at least one temperature Sensor is equal
`to or higher than a predetermined value, that is, as described
`above, if the temperature of the external device and power
`Supply device is Still high just after shifting from the normal
`operation mode to the Sleep mode, the actuation signal is
`outputted to the actuation means.
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 10
`
`

`

`US 6,665,163 B2
`
`3
`Owing to this, if the temperature inside the computer is
`Still high even if the clock is not Supplied to the external
`device, it is possible to perform cooling by the cooling fan,
`and hence it is possible to cool the inside of the computer
`more immediately. In addition, one or plural temperature
`Sensors can be provided.
`In a method for controlling a cooling fan in a computer
`that can connect to an external device and has a cooling fan
`for cooling the external device, the method for controlling
`the cooling fan according to the present invention comprises
`the Steps of detecting the Supply of a clock from the
`computer to the external device; and actuating the cooling
`fan on the basis of the clock.
`Owing to this, it is possible to Surely actuate the cooling
`fan when the external device operates, and hence it is
`possible to fully cool the external device.
`In addition, it can be also performed to actuate the cooling
`fan on the basis of the clock and detected temperature by the
`temperature Sensor by further detecting the internal tem
`perature of the computer.
`Owing to this, if the temperature inside the computer is
`Still high even if the clock is not Supplied to the external
`device, it is possible to perform cooling by the cooling fan,
`and hence it is possible to cool the inside of the computer
`more immediately.
`
`15
`
`25
`
`35
`
`4
`“PowerPC” made by IBM Corp. The CPU 14 is configured
`with including a L2 (level 2)-cache that is high-speed
`memory to shorten total access time to main memory 16 by
`temporarily Storing extremely limited code and data that are
`frequently accessed. The L2-cache is composed of an
`SRAM (Static RAM) chip in general.
`The CPU 14 is interconnected with each hardware com
`ponent described later through three classes of buses, that is,
`an FS (Front Side) bus 18 as a processor-direct-coupled bus
`that is connected directly to an own external pin, a PCI
`(Peripheral Component Interconnect) bus 20 as a high-speed
`I/O device bus, and an ISA (Industry Standard Architecture)
`bus 22 as a low-speed I/O device bus.
`In general, the FSB 18 and PCI bus 20 are connected by
`a CPU bridge (host-PCI bridge) 24 that is called a memory/
`PCI control chip. The CPU bridge 24 of this embodiment has
`configuration including a memory controller function for
`controlling acceSS operation to the main memory 16 and data
`buffer and the like for absorbing the difference of data
`transfer rates between the FSB 18 and PCI bus 20. For
`example, an Intel 440BX chip can be used for this purpose.
`The main memory 16 is writable memory used as a
`read-in area of execution programs in the CPU 14, or as a
`work area where processing data of the execution programs
`is written. The main memory 16 consists of, for example,
`several DRAM (dynamic RAM) chips.
`In addition, here, the execution programs include various
`device drivers for physically operating peripheral devices,
`application programs applied to specific operations, and
`firmware Such as a BIOS Stored in flash ROM 72.
`The PCI bus 20 is a bus that can perform comparatively
`high-speed data transmission, and PCI devices that are
`driven at comparatively high Speed, like a Card Bus con
`troller 30 are connected to this. In addition, PCI architecture
`is started from a proposal of Intel Corp., and realizes,
`so-called, a PnP (Plug and Play) function.
`A video Subsystem 26 is a Subsystem to realize a function
`relating to a Video System, and includes a Video system
`controller that actually processes a rendering instruction
`from the CPU 14, once writes the rendering information,
`which is processed, in video memory (VRAM), reads the
`rendering information from the VRAM, and outputs the
`rendering information as rendering data to a liquid crystal
`display (LCD) 28 (see FIG. 2). In addition, the video system
`controller can convert a digital Video signal into an analog
`Video signal by a digital-analog converter (DAC) attached.
`The analog video signal is outputted to a CRT port (not
`shown) through a signal line.
`In addition, the PCI bus 20 connects to the Card Bus
`controller 30, an audio Subsystem 32, a docking Station
`interface (Dock I/F) 34 and a mini-PCI slot 36 respectively.
`The Card Bus controller 30 is a dedicated controller for
`directly coupling a bus signal in the PCI bus 20 to an
`interface connector (Card Bus) of a PCI Card Bus slot 38. In
`the Card Bus slot 38, for example, a PC card 40 is loaded,
`the PC card 40 being located on a wall surface of the body
`of the PC 12 and conforms to specifications laid down by
`PCMCIA (Personal Computer Memory Association)/JEIDA
`(Japan Electronic Industry Development ASSociation).
`The Dock I/F 34 is hardware to connect the docking
`station 96 (see FIG. 3, too) to the PC 12, and when a
`connector of the PC 12, which is not shown, is connected to
`the connector 98 of the docking station 96 shown in FIG. 3,
`as shown in FIG. 4, the PCI-PCI bridge 100 of the docking
`station 96 is connected to the Dock I/F 34.
`The PCI-PCI bridge 100, as shown in FIG. 4, connects to
`a PCI adaptor 102 to control peripheral devices for the PCI
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a block diagram Showing the Schematic con
`figuration of a computer System according to this embodi
`ment,
`FIG. 2 is a perspective view showing the appearance of a
`notebook PC;
`FIG. 3 is a perspective view showing the appearance of
`the notebook PC and a docking Station;
`FIG. 4 is a block diagram Showing the Schematic con
`figuration of the docking Station;
`FIG. 5 is a Schematic diagram of a driving Signal output
`circuit;
`FIG. 6 is a chart showing output waveforms of the driving
`Signal output circuit;
`FIG. 7 is a Schematic diagram showing another example
`of a driving Signal output circuit; and
`FIG. 8 is a timing chart showing an output signal of each
`part of the driving Signal output circuit.
`DETAILED DESCRIPTION OF THE
`INVENTION
`Hereinafter, a first embodiment of the present invention
`will be described with reference to the drawings. FIG. 1
`Schematically shows the hardware organization of a com
`puter System 10, composed of a typical personal computer
`(PC) Suitable for implementing the present invention, every
`Subsystem.
`An example of a PC implementing the present invention
`is a notebook PC 12 (see FIG. 2) that conforms to the OADG
`(PC Open Architecture Developer's Group) specifications,
`and has Microsoft Corporation’s “Windows98 or NT as an
`60
`operating System (OS). Hereinafter, each part of the com
`puter system 10 will be explained.
`A CPU 14 that is a brain of the entire computer system 10
`executes various programs under the control of the OS. The
`CPU 14 can be, for example, a CPU chip “Pentium”, “MMX
`65
`technology Pentium”, or “Pentium Pro” made by Intel
`Corp., a CPU made by AMD Inc. or other company, or
`
`40
`
`45
`
`50
`
`55
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 11
`
`

`

`US 6,665,163 B2
`
`25
`
`35
`
`45
`
`S
`bus, an IDE controller 104 to control peripheral devices for
`the IDE, and a PC card controller 106 to control PC cards.
`In addition, the IDE controller 104 connects to a hard disk
`108, and the PC card controller 106 connects to a PC card
`slot 110.
`These PCI adapter 102, IDE controller 104, and PC card
`controller 106 are connected through the PCI-PCI bridge
`100 to the PCI bus 20 of the PC 12, and operates with a PCI
`clock 112 at a predetermined frequency (for example, 33
`MHz) that is supplied from the PC 12.
`Furthermore, the PCI adapter 102, IDE controller 104,
`and PC card controller 106 operate with electric power
`supplied by an AC/DC converter 116 in the power supply
`unit 114. The AC/DC converter 116 converts AC voltage (for
`example, 100V), which is supplied from an external AC
`15
`power Supply 118, into predetermined DC voltage, and
`supplies the DC voltage to the PCI adapter 102, IDE
`controller 104, PC card controller 106, and the like.
`The AC/DC converter 116 is cooled by a cooling fan 120.
`The cooling fan 120 is driven by a cooling fan drive circuit
`122. The cooling fan drive circuit 122 has a temperature
`sensor (described later), and drives the cooling fan 120 on
`the basis of a detection result of this temperature Sensor and
`a driving Signal outputted from a driving Signal output
`circuit 124.
`The driving signal output circuit 124 detects a PCI clock
`112 outputted to the PCI adapter 102, IDE controller 104,
`and PC card controller 106. In addition, when detecting the
`PCI clock 112, the driving signal output circuit 124 outputs
`a cooling fan driving Signal to the cooling fan drive circuit
`122. On the contrary, if not detecting the PCI clock 112, the
`driving Signal output circuit 124 outputs a cooling fan Stop
`Signal to the cooling fan drive circuit 122.
`FIG. 5 shows a concrete Schematic diagram of the driving
`Signal output circuit 124 and cooling fan drive circuit 122.
`As shown in FIG. 5, the driving signal output circuit 124
`consists of an integration circuit including diodes 126, 128,
`a capacitor 130, a resistor 132, and a comparator 134. An
`anode of the diode 126 is connected to the PCI-PCI bridge
`40
`100, and a cathode of the diode 126 is connected to a cathode
`of the diode 128, one end of the capacitor 130, one end of
`the resistor 132, and a non-inverting input terminal of the
`comparator 134. An anode of the diode 128, another end of
`the capacitor 130, and another end of the resistor 132 are
`grounded together. An output terminal of the comparator
`134 is connected to a MOS-FET 136 for driving the non
`inverting input terminal and the cooling fan 120.
`On the other hand, the cooling fan drive circuit 122 has
`two temperature sensors 138 and 140. These temperature
`sensors 138 and 140 are provided inside the power supply
`unit 114, and detect the internal temperature of the power
`Supply unit 114. If the internal temperature is equal to or
`higher than predetermined temperature, any one of these
`temperature sensors 138 and 140, for example, outputs a
`high level Signal, and if being lower than the predetermined
`temperature, any one of them outputs a low level Signal.
`Output signals of the temperature sensors 138 and 140 are
`wired-ORed (logically ORed) by a wired-OR gate 146 that
`is composed of diodes 142 and 144, and are outputted to the
`MOS-FET 136.
`In this manner, the MOS-FET 136 receives the output
`signal from the comparator 134 and a logical-ORed value of
`the output signals of the temperature sensors 138 and 140.
`Thus, a wired-ORed (logically ORed) value of the output
`Signal from the comparator 134 and the output of the
`wired-OR gate 146 is inputted to the MOS-FET 136.
`
`50
`
`55
`
`60
`
`65
`
`6
`Therefore, the on/off of the cooling fan 120 is controlled
`on the basis of the PCI clock 112 and the internal tempera
`ture of the power supply unit 114 detected by the tempera
`ture sensors 138 and 140.
`In addition, the mini-PCI slot 36 connects to, for example,
`a network adapter 42 for connecting the computer System 10
`to a network (e.g. LAN).
`The PCI bus 20 and ISAbus 22 are interconnected by the
`PCI-ISA bridge 44. The PCI-ISA bridge 44 has a bridge
`function between the PCI bus 20 and ISA bus 22, a DMA
`controller function, a programmable interrupt controller
`(PIC) function, a programmable interval timer (PIT)
`function, an IDE (Integrated Drive Electronics) interface
`function, a USB (Universal Serial Bus) function, and a SMB
`(System Management Bus) interface function, and incorpo
`rates a real time clock (RTC). For example, an Intel PIX4
`chip can be used for this purpose.
`In addition, the DMA controller function is a function for
`executing data transfer between a peripheral device (e.g.
`FDD) and main memory 16 without intervention of the CPU
`14. In addition, the PIC function is a function of letting a
`predetermined program (interrupt handler) be executed in
`response to an interrupt request from a peripheral device
`(IRQ). Furthermore, the PIT function is a function of gen
`erating a timer Signal in a predetermined period, and its
`generation period is programmable.
`In addition, the IDE interface provided by the IDE inter
`face function connects to the IDE hard disk drive (HDD) 40,
`as well as an IDE CD-ROM drive 48 by ATAPI (AT
`Attachment Packet Interface). In addition, instead of the IDE
`CD-ROM drive 48, another type of an IDE device such as
`a DVD (Digital Video Disc or Digital Versatile Disc) drive
`can be connected. External Storage devices Such as the HDD
`46 and the CD-ROM drive 48 each are contained in, for
`example, a containing location called a “Swappable bay'
`inside the body of the PC 12. These external storage devices
`that are provided as Standard equipment may be exchange
`ably and exclusively mounted with other devices Such as an
`FDD and a battery pack.
`In addition, a USB port is provided in the PCI-ISA bridge
`44, and this USB port is connected to, for example, a USB
`connector 50 provided on a wall surface of the PC 12. The
`USB Supports a function of plugging or unplugging a new
`peripheral device (USB device) in a power-on state (a hot
`plugging function), a function of automatically recognizing
`a new peripheral device and performing resetting System
`configuration (Plug and Play function). For one USB port,
`up to 63 USB devices can be connected in daisy-chain
`connection. Examples of the USB devices are various
`devices Such as a keyboard, a mouse, a joystick, a Scanner,
`a printer, a modem, a display monitor, and a tablet.
`Furthermore, the PCI-ISAbridge 44 connects through the
`SM bus to an EEPROM 94. The EEPROM 94 is memory for
`Storing information Such as a password that is registered by
`a user, a Supervisor password, and a manufacture Serial
`number, and is made to be nonvolatile and electrically
`rewritable for memory contents.
`In addition, the PCI-ISA bridge 44 is connected through
`a shutdown reset logic 52 to a power Supply circuit 54.
`Inside a core chip constituting the PCI-ISA bridge 44, a
`power Supply-managing unit managing a power Supply State
`of the computer system 10 is provided. This power supply
`managing unit and power Supply circuit 54 transmits and
`receives various types of Signals through the shutdown-reset
`logic 52. Owing to this transmission and reception of
`Signals, the power Supply managing unit of the PCI-ISA
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 12
`
`

`

`7
`bridge 44 recognizes an actual power Supply State from the
`power supply circuit 54 to the computer system 10. The
`power Supply circuit 54 controls power Supply to the com
`puter System 10 according to an instruction from the power
`supply-managing unit of the PCI-ISA bridge 44.
`The ISA bus 22 is a bus whose data transfer rate is lower
`than that of the PCI bus 20, and is used for connecting a
`super I/O controller 70, flash ROM 72 consisting of
`EEPROM, CMOS 74, and peripheral devices that operate at
`comparatively low speed Such as a keyboard/mouse con
`troller (nothing shown).
`An I/O port 78 is connected to the Super I/O controller 70.
`The Super I/O controller 70 controls the driving of a floppy
`disk drive (FDD), input/output of parallel data through a
`parallel port (PIO), and input/output of Serial data through a
`serial port (SIO).
`The flash ROM 72 is memory for storing various BIOS
`programs, and is made to be nonvolatile and electrically
`rewritable for memory contents. In addition, the BIOS
`programs are written in ASL (ACPI Machine Language).
`The CMOS 74 is composed of volatile semiconductor
`memory connected to a backup power Supply, and is non
`Volatile to function as high-Speed memory means.
`In addition, in order to constitute the computer System 10,
`a lot of electric circuits are necessary besides those shown in
`FIG. 1. However, these are apparent for those skilled in the
`art, and because these do not constitute the Substance of the
`present invention, their description will be omitted in this
`Specification. Furthermore, in order to avoid the complica
`tion of drawings, only Some connections between respective
`hardware blocks in the drawings is shown.
`Next, actions of this embodiment will be described. The
`computer system 10 according to this embodiment is a PC
`based on the ACPI standard, and as shown in the next table
`1, a plurality of power supply states (S0 to S5, and G3) is
`defined as power Supply States.
`
`TABLE 1.
`
`State of
`power
`Actual State
`supply APM
`SO Operational Operational
`S1
`Standby
`Power-off of some
`S2
`peripheral devices
`S3 Suspend
`Power-off of peripheral
`devices with operating
`status stored in memory
`S4 Hibernation Power-off of a main part
`with operating status
`stored in HDD
`Power-off of all except a
`power Supply managing
`unit in a core chip
`Power-off of all including Only switch-on of a
`the power supply
`power switch
`managing unit
`
`Condition for
`Returning to SO
`
`Occurrence of a
`predetermined event
`Occurrence of a
`predetermined event
`
`Occurrence of a
`predetermined event
`
`Only switch-on of a
`power switch
`
`SS
`
`SoftCFF
`
`G3 MechOFF
`
`In addition, “APM' in the Table 1 denotes correspon
`dence of each power supply state of S0 to S5, and G3, and
`each power supply state defined in APM (Advanced Power
`Management) standard. Furthermore, the states of S1 to S3
`may also collectively called “Standby', and the states of S5
`and G3 may also collectively called “Shutdown”.
`Alternatively, the states of S1 to S4 may also collectively
`called “Sleep”.
`Hereinafter, as an example, in a state that the PC 12 is
`installed in the docking station 96, the operation of the
`cooling fan will be described when the power Supply State
`
`US 6,665,163 B2
`
`8
`changes from the S0 state (operating state) to the states of S1
`to S4 (Sleep state), and when the power Supply State changes
`from the states of S1 to S4 (sleep state) to the S0 state
`(operating State).
`If a user does not operate the PC 12 and predetermined
`time elapses, the power Supply State changes from the
`operating condition to the Sleep State. At this time, the Supply
`of the PCI clock from the PC 12 to the docking station 96
`is Stopped. Owing to this, the operation of peripheral devices
`such as the hard disk 108 mounted in the docking station 96
`is stopped.
`Hence, as shown in FIG. 6(B), a low level signal is
`inputted into the driving Signal output circuit 124, and the
`driving Signal output circuit 124 outputs a low level Signal
`to the MOS-FET 136.
`At this time, if all the detected temperatures, which are
`detected by the temperature sensors 138 and 140, are lower
`than predetermined temperature, the wired-OR circuit 142
`outputs a low level signal to the MOS-FET 136.
`Therefore, a logically-ORed value of the low level signal,
`which is an output of the driving Signal output circuit 124,
`and a low level Signal which is an output of the cooling fan
`drive circuit 122, that is, a low level Signal is inputted into
`the MOS-FET 136. Owing to this, the MOS-FET 136 is
`turned off, and hence the cooling fan 120 is stopped.
`In this manner, if the PC 12 becomes in the sleep state, the
`peripheral devices mounted in the docking Station 96 each
`become a non-running State, and further all the detected
`temperatures which are detected by the temperature Sensors
`138 and 140 are lower than the predetermined temperature,
`that is, if the internal temperature of the power Supply unit
`114 is not so high, the cooling fan 120 is stopped. Therefore,
`it is possible in an energy Saving State as the Sleep State to
`Surely Stop the cooling fan 120, and to make the cooling fan
`behave similarly in a power-off State.
`On the other hand, if the detected temperature by any one
`of the temperature sensors 138 and 140 is equal to or higher
`than the predetermined temperature, the wired-OR circuit
`142 outputs a high level Signal. Therefore, a logically-ORed
`value of the low level Signal, which is an output of the
`driving Signal output circuit 124, and a high level Signal
`which is an output of the cooling fan drive circuit 122, that
`is, a high level signal is inputted into the MOS-FET 136.
`Owing to this, the MOS-FET 136 is turned on, and hence the
`cooling fan 120 is actuated.
`In this manner, if the PC 12 becomes in the sleep state, the
`peripheral devices mounted in the docking Station 96
`becomes in a non-running State, and further any one of the
`detected temperatures which are detected by the temperature
`sensors 138 and 140 is equal to or higher than the prede
`termined temperature, that is, if the internal temperature of
`the power supply unit 114 is high, the cooling fan 120 is
`actuated.
`Owing to this, it is possible to actuate the cooling fan 120
`even in Such a State that the internal temperature of the
`power Supply unit 114 is high due to residual heat as just
`after the Stop of a peripheral device, and to cool the inside
`of the docking station 96 immediately.
`In addition, if a user performs certain operation in the
`Sleep State, the State changes from the Sleep State to the
`operating State. At this time, the Supply of the PCI clock
`from the PC 12 to the docking station 96 is started. Owing
`to this, the operation of peripheral devices Such as the hard
`disk 108 mounted in the docking station 96 is started. Owing
`to this, the PCI clock 112 as shown in FIG. 6(A) is inputted
`into the driving Signal output circuit 124. The driving Signal
`
`15
`
`25
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`LENNOX EXHIBIT 1028
`Lennox Industries Inc. v. Rosen Technologies LLC, IPR2023-00715, Page 13
`
`

`

`output circuit 124 integrates this PCI clock 112 to ou