throbber
IPR2023-00694, -00697, & -00698
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`LENOVO (UNITED STATES) INC. and
`MOTOROLA MOBILITY LLC,
`Petitioners,
`
`v.
`
`THETA IP, LLC,
`Patent Owner.
`
`Case IPR2023-00694, -00697, & -00698
`U.S. Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`DECLARATION OF LAWRENCE E. LARSON IN SUPPORT
`OF PATENT OWNER’S PRELIMINARY RESPONSES
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`
`
`I, Lawrence E. Larson, declare as follows:
`
`INTRODUCTION
`
`1. My name is Larry Larson. I have been retained by Theta IP, LLC
`
`(“Theta”) to provide information and assistance regarding U.S. Patent No. 7,010,330
`
`(“the ’330 Patent”), U.S. Patent No. 10,129,825 (“the ’825 Patent”), and U.S. Patent
`
`No. 10,524,202 (“the ’202 Patent”) (collectively, the “Tsividis Patents”).
`
`Specifically, I have been asked to consider the Petitions for Inter Partes Review
`
`numbered IPR2023-00694, IPR2023-00697, and IPR2023-00698 (“Petitions”)
`
`regarding the Tsividis Patents, and specifically the Declarations of Professor R.
`
`Jacob Baker (EX1002) that accompany the Petitions.
`
`2.
`
`For the purposes of this declaration, I have been asked to provide
`
`information and opinions about the state of the art and knowledge of a person of
`
`ordinary skill in the art, what such a person would understand from the Tsividis
`
`Patents, what such a person would find disclosed in or obvious from the prior art
`
`references relied on in the Petitions, and related issues in response to the opinions
`
`expressed by Prof. Baker.
`
`3.
`
`I have personal knowledge of the facts and opinions set forth in this
`
`declaration, and, if called upon to do so, I would testify competently thereto.
`
`4.
`
`I am currently Professor of Engineering at the School of Engineering,
`
`
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`IPR2023-00697
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`Brown University. I have also held the positions of Interim Provost of Brown
`
`University, as well as Sorensen Family Dean and Founding Dean of the School of
`
`Engineering. I hold a Ph.D. in Electrical Engineering, as well as a M.B.A. degree,
`
`from the University of California, Los Angeles, and Master of Engineering and
`
`Bachelor of Science degrees in Electrical Engineering from Cornell University. I
`
`have over 40 years of experience in the design of high-performance circuits for RF
`
`communications and other applications, both in industry and academia. I have
`
`published hundreds of papers in refereed journals and conference proceedings, and
`
`am a named inventor on at least 43 issued patents. My experience will be described
`
`further below under Qualifications and Background, and in my CV (EX2006).
`
`5.
`
`I am being compensated for my work in connection with this matter at
`
`my standard hourly consulting rate. My compensation for my work in this matter is
`
`not dependent in any way on my conclusions and opinions, the contents of this
`
`declaration, the substance of any further opinions or testimony that I may provide,
`
`or the outcome of this matter or any matter involving the Tsividis Patents.
`
`6.
`
`The materials I have reviewed in forming the opinions in this
`
`declaration include the following:
`
`a. The ’330 Patent, ’825 patent, and ’202 Patent (EX1001 to each
`
`Petition) and their prosecution histories (EX1003 to each Petition).
`
`b. The Rauhala (EX1004), Cummins (EX1005), Meador (EX1006),
`
`
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`Furuno (EX1007), and Saito (EX1008) references cited in the
`
`
`
`Petitions.
`
`c. The Declarations of Professor R. Jacob Baker (EX1002 to each
`
`Petition) and the materials discussed therein.
`
`d. The Petitions and their remaining exhibits.
`
`7.
`
`In addition, I have considered the relevant legal standards, as they have
`
`been explained to me by counsel and as I understand them. I have also considered
`
`the knowledge and understanding of a person of ordinary skill at the time of the
`
`filing of the ’330 Patent and as of the filing of its provisionals, of which I am familiar.
`
`8.
`
`I have previously submitted a report concerning some of the Tsividis
`
`Patents, in the concluded litigation Theta IP, LLC v. Samsung Electronics Co. Ltd.,
`
`No. W-20-CV-00160-ADA (W.D. Tex.).
`
`QUALIFICATIONS AND BACKGROUND
`
`9. My education and professional background is in Electrical Engineering,
`
`with a particular focus on high-speed integrated circuit design. I hold a Ph.D. (1986)
`
`in Electrical Engineering from the University of California, Los Angeles, as well as
`
`a M.B.A. degree (1996) from that university, and Master of Engineering (1980) and
`
`Bachelor of Science (1979) degrees in Electrical Engineering from Cornell
`
`University.
`
`10.
`
`I am currently a Professor of Engineering at the School of Engineering
`
`
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`IPR2023-00697
`Theta EX2005
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`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`at Brown University. I recently completed an appointment as Interim Provost for
`
`Brown University. I have also been the Sorensen Family Dean (Inaugural Chair
`
`Holder) and Founding Dean of the School of Engineering there. I held that position
`
`beginning in 2011, during which time I oversaw a large expansion in the number of
`
`tenure-track engineering faculty, substantial increases in external research funding,
`
`the creation of new graduate programs, and the construction of a state-of-the-art
`
`research and teaching facility.
`
`11. Over the course of my career, I have held a variety of positions in
`
`academia and industry. These include but are not limited to the following:
`
`12. From 1980 to 1988, I was a Member of Technical Staff at Hughes
`
`Aircraft and Hughes Research Laboratories, where I was responsible for the
`
`development of CMOS and III-V analog and digital integrated circuits, modeling
`
`and characterization of MESFETs and HEMTs and the development of improved
`
`III-V process techniques. During my tenure, among other things, I helped developed
`
`the first high-performance GaAs switched-capacitor circuits with clock rates in
`
`excess of 100 MHz, demonstrated the first use of low-temperature buffer GaAs
`
`MESFET technology with digital integrated circuits, setting a record for digital
`
`divider performance (22 GHz), and developed GaAs MESFET operational amplifier
`
`with record GBW (10 GHz).
`
`
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`IPR2023-00697
`Theta EX2005
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`13. From 1988 to 1992, I was an Adjunct Associate Professor at UCLA,
`
`
`
`where I was responsible for senior level digital and analog integrated circuit design
`
`courses and a graduate analog MOS integrated circuit design course.
`
`14. From 1992 to 1994, I was an Assistant Manager for the DARPA /
`
`Hughes MIMIC Program, where I was responsible for Program Management of the
`
`Advanced Technology Portion of DARPA/Hughes MIMIC Program, with a budget
`
`of approximately $8M/yr. In that capacity, I was responsible for the technical and
`
`program direction of GaAs HBT and PHEMT efforts. I also directed insertion of
`
`advanced GaAs-based technology into next generation communication and radar
`
`systems.
`
`15. From 1988 to 1994, I was also a Manager in the HEMT Technology
`
`Department, Microwave Devices and Circuits Laboratory, at Hughes Research
`
`Laboratories, where I directed research in high-speed III-V materials, devices, and
`
`circuits, and was responsible for approximately $4M/yr. in Corporate IR&D and
`
`Government Research Contracts. In that capacity, I helped develop the first space-
`
`qualified InP low-noise millimeter wave HEMT. This effort was awarded the 1996
`
`Lawrence Hyland Award - the highest technical achievement award at Hughes
`
`Electronics. I also helped develop the first micromachining (MEMS) switch and
`
`tuner applications for RF and microwave applications (1991). This technology has
`
`now become an extremely active area of worldwide research and development. I
`
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`Theta EX2005
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`also helped demonstrate the first InP-based HEMT low-noise and high- power
`
`MMICs from 2 - 60 GHz, with world record noise figures and power-added
`
`efficiencies. I further helped establish a state-of-the-art InP HEMT MMIC foundry
`
`at HRL, developed the first low-power/high-speed InP HEMT digital IC technology
`
`with ring oscillator delays of 4.2 pS, and directed the research program that
`
`demonstrated HEMTs with record fT’s and fMAX’s above 300 GHz (1993), which
`
`produced the highest frequency room temperature integrated circuit ever reported -
`
`a 210 GHz VCO (IEDM 1994).
`
`16. From 1994 to 1996, I was a Manager in the Telecommunications
`
`Technology Department, Microwave Devices and Circuits Laboratory, at Hughes
`
`Research Laboratories, where I directed the research and development of integrated
`
`circuits for commercial RF and microwave communications applications, including
`
`DBS, cellular telephone, VSAT, and PCS.
`
`17. From 1996 to 2011, I held the CWC Industry Chair Professor in
`
`Wireless Communications, in the Department of Electrical and Computer
`
`Engineering at the University of California, San Diego (UCSD). Among other
`
`things, I helped develop improved integrated circuit techniques and novel device
`
`structures for wireless communications applications. This required development of
`
`high-frequency integrated circuits, devices, and packaging techniques for ultra-wide
`
`bandwidth telecommunications applications, and development of novel data
`
`
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`converter and analog-signal processing architectures
`
`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`to
`
`that are matched
`
`communications applications.
`
`18. From 2000 to 2001, while on academic leave from UCSD, I was a
`
`Director at IBM’s West Coast Design Center of Excellence in IBM Research
`
`Division, where I directed development of Radio Frequency Integrated Circuits for
`
`SiGe RFICs for 3rd Generation wireless cellular applications. I was also responsible
`
`for leading the team that developed a complete Wideband CDMA chip set for several
`
`“first tier” cellular telephone providers.
`
`19. From 2001 to 2006, I was the Director of the UCSD Center for Wireless
`
`Communications (http://cwc.ucsd.edu), which is one of the largest industry-funded
`
`University Research Centers in the world. Involving over 20 professors, and
`
`supporting roughly 50 PhD graduate students during my tenure, with an annual
`
`budget in excess of $3M, the CWC conducted research in all areas of wireless
`
`communications, from fundamental devices and materials to software applications.
`
`I was responsible for all aspects of the Center, from new member development to
`
`financial management and establishing the research direction.
`
`20. From 2007 to 2011, I was the Chair of the Department of Electrical and
`
`Computer Engineering at the University of California, San Diego. The ECE
`
`Department at UCSD is the largest graduate program on the UCSD campus. As
`
`Chair, I oversaw the faculty development (hiring, promotion, and tenure process),
`
`
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`IPR2023-00697
`Theta EX2005
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
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`educational policy and teaching, successful accreditation review, department
`
`resource allocation, and external relations. I also led the development (with CS) of
`
`the Executive Masters of Advanced Study in Embedded Wireless Systems program.
`
`21.
`
`I have authored more than 125 refereed journal publications and more
`
`than 250 peer reviewed conference publications. I have authored and/or edited 12
`
`books or chapters, including:
`
`• L. E. Larson, P. T. Greiling, and J. F. Jensen, “GaAs Device Physics
`and Circuit Design”, in Microprocessor Design for GaAs
`Technology, V. Milutinovic, Ed., (Prentice Hall, York, 1989).
`
`• L. E. Larson, “High-Speed Analog-to-Digital and Digital-to-Analog
`Conversion with GaAs Technology: Prospects, Trends, and
`Obstacles”, in GaAs Technology and Devices and Their Impact
`on Circuits and Systems, D. Haigh, Ed., (Peter Peregrinus, Ltd,
`1989).
`
`• L. E. Larson and G. C. Temes, “Signal Conditioning and Interface
`Circuits”,
`in McGraw-Hill Handbook of Digital Signal
`Processing, S. Mitra, Ed., 1993.
`
`• L. E. Larson, “GaAs Operational Amplifier Design”, in High-Speed
`Analog Integrated Circuits, R. Goyal, Ed., (Wiley Interscience,
`York, 1995).
`
`• L. E. Larson, RF and Microwave Circuit Design for Wireless
`Communications (Artech House, Inc., 1996).
`
`• M. Matloubian and L. E. Larson, “InP-Based Power HEMTs”, in
`Pseudomorphic HEMT Technology and Applications, Ed. R. L.
`Ross et al., (Kluwer Academic Publishers, Netherlands, 1996).
`
`• J. Groe, and L. E. Larson, CDMA Mobile Radio Design: Systems,
`Algorithms, and Circuits (Artech House, Inc., 2000).
`
`
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`IPR2023-00697
`Theta EX2005
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`

`

`
`
`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`• L. Larson and F. Chang, “Si/SiGe HBT Technology for Low-Power
`Mobile Communications Systems Applications,”
`in RF
`Technologies for Low-Power Wireless Communications, Ed. T.
`Itoh, G. Haddad, and J. Harvey, Wiley Interscience, 2001.
`
`• X. Zhang, L. Larson, and P. Asbeck, Design of Linear Outphasing
`Power Amplifiers for Wireless Communications, Artech House,
`2002. 196 pages. BOOK
`
`• Digital Communications Using Chaos and Nonlinear Dynamics,
`Larson, Lawrence E; Liu, Jia-Ming; Tsimring, Lev S. (Eds.) 2006,
`XIV, Springer.
`
`• Circuits and Systems for Future Generations of Wireless
`Communications, A. Tasic, W. Serdijn, L. Larson, G. Setti, G.
`(Eds.), 2009, VIII, Springer.
`
`• Fast Hopping Frequency Generation
`in Digital CMOS,
`Mohammad Farazian, Lawrence E. Larson, Prasad S. Gudem. 2012
`Springer.
`
`I am also named inventor on at least 43 US patents.
`
`22.
`
`I have been elected a Fellow of the IEEE. The Fellow is the highest
`
`grade of membership of the IEEE, a world professional body consisting of over
`
`300,000 electrical and electronics engineers, with only one‐tenth of one percent
`
`(0.1%) of the IEEE membership being elected to the Fellow grade each year.
`
`Election to Fellow is based upon votes cast by existing Fellows in IEEE. I have also
`
`served on a number of IEEE Committees and as a Paper Reviewer.
`
`23. EX2006 contains a true and correct copy of my Curriculum Vitae
`
`further describing my background and experience.
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`
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`IPR2023-00697
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`UNDERSTANDING OF RELEVANT LEGAL STANDARDS
`
`24.
`
`In forming my opinions here, I have applied the following
`
`understanding of certain legal concepts related to anticipation, obviousness,
`
`combinations of references, and knowledge of one of ordinary skill in the art. This
`
`understanding was supplied to me by counsel.
`
`25.
`
`I understand that in order for a patent claim to be invalid as anticipated
`
`by a prior art reference, each and every element of that patent claim must be found
`
`disclosed in that reference, explicitly or inherently, to a person of ordinary skill in
`
`the art. Inherent disclosure requires that the claimed element be the only possible
`
`option given the other disclosures of the reference. If any single element of a claim
`
`is not disclosed in the reference, the entire claim is not anticipated.
`
`26.
`
`I understand that a patent may be invalid if the differences between the
`
`claimed subject matter and the prior art are such that the subject matter as a whole
`
`would have been obvious at the time the invention was made to a person of ordinary
`
`skill in the pertinent art.
`
`27.
`
`I understand that a person of ordinary skill in the art provides a
`
`reference point from which the prior art and claimed invention should be viewed.
`
`This reference point prevents one from using his or her own insight or hindsight in
`
`deciding whether a claim is obvious.
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`
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`IPR2023-00697
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`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`I also understand that an obviousness determination includes the
`
`
`
`28.
`
`consideration of various factors such as (1) the scope and content of the prior art; (2)
`
`the differences between the prior art and the asserted claims; (3) the level of ordinary
`
`skill in the pertinent art; and (4) the existence of secondary considerations such as
`
`commercial success, long-felt but unresolved needs, failure of others, etc.
`
`29.
`
`I understand that in considering the scope and content of the prior art,
`
`references must be reasonably related (i.e., analogous) to the claimed invention of
`
`that patent.
`
`30.
`
`I understand that the test for determining whether a prior art reference
`
`constitutes analogous art to the claimed invention is (1) whether the reference is from
`
`the same field of endeavor, regardless of the problem addressed and, (2) if the
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`reference is not within the field of the inventor’s endeavor, whether the reference
`
`still is reasonably pertinent to the particular problem the inventor is trying to solve.
`
`31.
`
`I also understand that the existence of each and every element of the
`
`claimed invention in the prior art does not necessarily prove obviousness of the
`
`combination of those elements, and that inventions usually rely on building blocks
`
`of prior art.
`
`32.
`
`I understand that one may consider whether a reason existed at the time
`
`of the invention that would have prompted a person of ordinary skill in the art in the
`
`relevant field to combine the known elements in the way the claimed invention does.
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`The reason could come from the prior art, the background knowledge of one of
`
`ordinary skill in the art, the nature of the problem to be solved, market demand, or
`
`common sense. But it cannot come from hindsight.
`
`33.
`
`I understand that in considering whether a claimed invention is obvious,
`
`one may but is not required to find obviousness if at the time of the claimed invention
`
`there was a reason that would have prompted a person having ordinary skill in the
`
`field of the invention to combine the known elements in a way the claimed invention
`
`does, taking into account such factors as: (1) whether the claimed invention was
`
`merely the predictable result of using prior art elements according to their known
`
`function(s); (2) whether the claimed invention provides an obvious solution to a
`
`known problem in the relevant field; (3) whether the prior art teaches or suggests the
`
`desirability of combining elements claimed in the invention; (4) whether the prior
`
`art teaches away from combining elements in the claimed invention; (5) whether it
`
`would have been obvious to try the combinations of elements, such as when there is
`
`a design need or market pressure to solve a problem and there are a finite number of
`
`identified, predictable solutions; and (6) whether the change resulted more from
`
`design incentives or other market forces. To find it rendered the invention obvious,
`
`the prior art must provide a reasonable expectation of success. Obvious to try is not
`
`sufficient in unpredictable technologies.
`
`34.
`
`I understand that each claim must be evaluated separately for
`
`
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
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`obviousness, and that it is improper to use hindsight. In other words, one must
`
`consider only what was known at the time of the invention.
`
`35.
`
`I understand that, when present, secondary indicia of non-obviousness
`
`must always be considered and can serve as an important check on hindsight bias.
`
`These factors may include (1) a long felt but unmet need in the prior art that was
`
`satisfied by the invention of the patent; (2) commercial success or lack of
`
`commercial success of processes covered by the patent; (3) unexpected results
`
`achieved by the invention; (4) recognition and praise of the invention by others
`
`skilled in the art; (5) taking of licenses under the patent by others; (6) skepticism,
`
`disbelief in or incredulity on the part of those skilled in the art that the patentee’s
`
`approach worked; (7) rapid replacement of the prior art devices in the industry; (8)
`
`unsuccessful attempts by those skilled in the art to make the invention; (9) teaching
`
`away by those skilled in the art; and (10) deliberate copying of the invention. I also
`
`understand that there must be a relationship, or nexus, between any such secondary
`
`indicia and the invention.
`
`36.
`
`I have been informed and understand that the obviousness analysis
`
`requires a comparison of the properly construed claim language to the prior art on a
`
`claim-by-claim basis.
`
`37.
`
`I understand that questions of fact concerning obviousness, such as the
`
`knowledge of a person of skill in the art, ordinarily must be proven by clear and
`
`
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`IPR2023-00697
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`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
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`convincing evidence. For an obviousness combination, obviousness must be proven
`
`by clear and convincing evidence such that a person of ordinary skill in the art at the
`
`time of the alleged invention would have had a reason (or reasons) for combining
`
`the teachings of those prior art references to achieve the claimed invention, and that
`
`same person of ordinary skill in the art would have had a reasonable expectation of
`
`success from combining those teachings.
`
`38.
`
`I understand that the disclosures in a patent or prior art reference are
`
`viewed from the perspective of a person of ordinary skill in the art at the time of the
`
`invention.
`
`39.
`
`I understand that a person having ordinary skill in the art is a
`
`hypothetical person and the concept is used to analyze the relevant art without the
`
`benefit of hindsight. A person of ordinary skill in the art is presumed to be one who
`
`thinks along the lines of conventional wisdom in the art. I understand that the
`
`hypothetical person of ordinary skill is presumed to have knowledge of all references
`
`that are sufficiently related to one another and to the pertinent art, and to have
`
`knowledge of all arts reasonably pertinent to the particular problem that the claimed
`
`invention addresses.
`
`THE TSIVIDIS PATENTS
`
`40.
`
`I have reviewed the Tsividis Patent (EX1001 to each Petition) and their
`
`file histories (EX1003 to each Petition). The parent ’330 Patent issued from U.S.
`
`
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`IPR2023-00697
`Theta EX2005
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`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`Patent Application No. 10/784,613, which was filed on February 23, 2004. And
`
`each of the Tsividis Patents claims priority to effective priority date of U.S.
`
`Provisional Application Nos. 60/451,229 and 60/451,230, filed March 1, 2003.
`
`41.
`
`In the early 2000s, wireless connectivity was becoming increasingly
`
`prevalent – in cellular phones, laptops, etc. Reducing power consumption in cellular
`
`phones—in order to increase battery life and increase the length of time that the
`
`device could operate before recharging—was an ever-present concern.
`
`42. As explained in the Tsividis Patents, electronic circuits are generally
`
`designed to function under “worst-case” operating conditions. A worst-case
`
`operating condition occurs when reception of a desired signal is low while
`
`interfering signals and spurious noise are high. These conditions are typically
`
`accompanied by a worst-case power consumption because of the need for increased
`
`amplifier gain and bias and impedance changes to achieve and maintain adequate
`
`connectivity.
`
`43. The patents recognize that a wireless transceiver does not always
`
`operate in these worst-case conditions—such as when the received signal is strong
`
`or interfering signals are weak or non-existent. In these improved conditions,
`
`dynamic adjustments can be made to circuits to reduce power. For example, receiver
`
`bias currents can be reduced below what is necessary for the worst-case condition.
`
`As another example, signal path impedances can be raised, introducing some
`
`
`
`-15-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`additional noise but also reducing current consumption. As a third example, gain
`
`can be reduced, also reducing current consumption in amplifier circuits. The patents
`
`explain that if these adjustments are done appropriately, power dissipation is reduced
`
`while signal-to-noise ratio is appropriately managed, increasing battery life.
`
`44. Professor Tsividis’ patented inventions use bias current control,
`
`varying impedance, gain, and other dynamic changes (separately or in combination)
`
`to reduce power dissipation when conditions are better than a worst case. For
`
`example, they describe reducing bias currents in response to a need for reduced
`
`signal handling capability; or varying/controlling impedances thereby reducing
`
`required drive and other bias currents in response to a strong received signal; or
`
`varying gain and/or impedances in response to a received signal in the presence of
`
`interfering signals that are weak or non-existent.
`
`45. The Tsividis Patents teach various implementations of these inventions.
`
`Information about the desired signal and interferer signal is used to adjust the
`
`
`
`
`
`-16-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`operating characteristics of the components in the receiver’s signal path—for
`
`example, the amplifier(s), mixer(s), and/or filter(s)—relative to a worst-case
`
`condition. The patents describe multiple separate adjustments, dynamically
`
`changing operating parameters, including bias current, impedance, and gain, either
`
`separately or in combination, to reduce power dissipation in better-than-worst case
`
`conditions. This allows for significant reduction in the power consumed by wireless
`
`receivers by responding to the changing signal spectrum conditions experienced by
`
`the mobile device.
`
`
`
`
`
`ONE OF ORDINARY SKILL
`
`46.
`
`I have been asked to provide my opinion of the level of education and
`
`experience that would have been possessed by one of ordinary skill in the art at the
`
`
`
`-17-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`time of the ’330 Patent, which I take for purposes of this declaration to be as of the
`
`current earliest undisputed priority date on March 1, 2003. I understand that factors
`
`such as the education level of those working in the field, the sophistication of the
`
`technology, the types of problems encountered in the art, prior art solutions to those
`
`problems, and the speed at which innovations are made, may help establish the level
`
`of skill in the art at the time.
`
`47.
`
`I have previously considered and given an opinion on this question with
`
`respect to the Tsividis Patents in District Court case Theta IP, LLC v. Samsung
`
`Electronics Co. Ltd., No. W-20-CV-00160-ADA (W.D. Tex.), and my opinion has
`
`not changed.
`
`48.
`
`In my opinion, a person of ordinary skill in the art would have at least
`
`a Bachelor’s Degree in Electrical or Electronics Engineering, and approximately five
`
`years of relevant experience in the design of transceiver architecture, RF systems
`
`and components, and analog and mixed signal circuits, as well as experience in
`
`control algorithms for such system and familiarity with wireless standards—with
`
`additional education substituting for experience and vice versa.
`
`49. As described above, I obtained my Ph.D. in Electrical Engineering in
`
`1986, and I had more than fifteen years of professional experience in the analysis
`
`and design of high-performance RF circuits prior to the priority date of the Tsividis
`
`Patents. I believe that my own education and experience exceeds that of a person of
`
`
`
`-18-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`ordinary skill in the art, under my definition or Lenovo’s definition, today and as of
`
`March 1, 2003.
`
`50.
`
`I understand that Prof. Baker’s declarations give a definition of a person
`
`of ordinary skill in the art that is similar to mine, but with less professional
`
`experience. See, e.g., IPR2023-00694, EX1002, ¶30 (“two or more years”).
`
`51.
`
`I disagree with Prof. Baker about his opinions concerning what a person
`
`of ordinary skill would find disclosed or obvious from the prior art, as detailed
`
`below. I have considered both his and my opinion concerning the level of skill, and
`
`my opinions as expressed in this declaration do not change if I instead apply his
`
`definition. For example, no person of skill with a degree in Electrical Engineering,
`
`and any professional experience with RF electronics, would find disclosure of
`
`dynamically changing an impedance in a signal path, from the DC bias circuit of
`
`Rauhala that Lenovo and Prof. Baker identify.
`
`CLAIM CONSTRUCTION
`
`52.
`
`I understand that in claim construction for an Inter Partes Review
`
`proceeding, the claim terms are to be construed in accordance with the Phillips
`
`standard that is also used in district court. I understand that the proper construction
`
`of a disputed term under that standard is the meaning that would be understood by a
`
`person of ordinary skill in the art at the time of the invention, considered in the
`
`context of the patent specification.
`
`
`
`-19-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`I have been asked to consider how a person of ordinary skill in the art
`
`
`
`53.
`
`at the time would interpret “an impedance” in the context of the Tsividis Patents.
`
`Impedance was a well-known parameter for all Electrical Engineers working in
`
`circuits, and the Tsividis Patents use the term consistently with its standard and well-
`
`known definition at the time and now.
`
`54. A person of ordinary skill would understand that impedance refers to
`
`the opposition of a circuit or circuit component to alternating current. Impedance
`
`includes both resistance (from resistors) and reactance (from inductors or capacitors)
`
`to alternating current. Impedance is often symbolized with Z, and is given by the
`
`formula Z = √(R2 + (XL + XC)2), where R is resistance, XL is inductive reactance,
`
`and XC is capacitive reactance.
`
`55.
`
`Impedance is an alternating current (AC) circuit parameter, measured
`
`for signals with a frequency component. Its definition as such is taught in
`
`introductory EE courses, and is given in many Electronic Circuits dictionaries and
`
`textbooks. See, e.g., EX2009, 6 (“The total opposition (i.e., resistance and
`
`reactance) a circuit offers to the flow of alternating current at a given frequency;”).
`
`56.
`
`In general, a person of ordinary skill in the art would understand that
`
`impedance is an AC circuit parameter, and would use it accordingly to refer to, e.g.,
`
`signal path circuits and other circuits carrying alternating or varying currents. A
`
`person of ordinary skill in the art would instead use terms like “resistance,”
`
`
`
`-20-
`
`IPR2023-00697
`Theta EX2005
`
`

`

`IPR2023-00694, -00697, & -006986
`Patent Nos. 7,010,330, 10,129,825, & 10,524,202
`
`
`“capacitance,” and “inductance” when referring to DC circuits such as the supply or
`
`bias current controls identified in the Petition from Rauhala.
`
`57. A person of ordinary skill in the art would also understand that
`
`impedance is an AC circuit parameter in the context of the Tsividis Patents and their
`
`claims. Professor Tsividis uses “impedance” consistently, to refer to AC circuit
`
`loads in varying-signal driver circuits. EX1001 (’330 Patent), 7:44-52, Fig. 6:
`
`
`
`And Professor Tsividis uses “resistance” to refer to circuits changing a DC bias
`
`current. 7:35-41 (“by opening switches across portions of the resistance”), 8:12-14
`
`(“increasing a load resistance using switches”), Fig. 5. During prose

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