BETA
`
`eyWale)
`
`©IMAGESTATE
`
`ow energy drain is key to the success of portable, bat-
`“time varying,” as in some systems context this term implies
`tery-operated equipment. If the energy drain per task can
`time-varying input-output behavior, which is not necessarily our
`be slashed down, battery life can proportionately be in-
`goal.) The variables that control the internal variations can be in-
`creased. Most conventional analog circuits are designed
`dependent variables controlled by the larger system, in which case
`we have an adjustable or programmable internally varying cir-
`worst-case, for adequate performance while handling the most
`demanding tasks. This requires large power
`cuit; or, they can be derived from the signals
`Y. Tsividis, N. Krishnapura,
`dissipation; when these circuits are called to
`being handled by the circuit, in which case we
`y.Palaskas, and L. Toth
`have an adaptive internally varying circuit.
`perform less demanding tasks, they continue
`to dissipate the same large power unnecessar-
`As discussed below, internally varying cir-
`ily. In other words, in such cases we are stuck witha fixed circuit.
`cuits have in general a time-dependent power dissipation
`is given by:
`the total energy drain W between times & and
`The solution is to allow the internal attributes of the circuit to
`vary, depending on the task at hand. In this article we review sev-
`ty
`We J
`eral recently proposed techniques that make this possible. We call
`these circuits internally varying. (We cannot call these circuits
`ty
`
`(1)
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`By varying the circuit’s internal structure and making it opti-
`mum for the task at hand, p is minimized for each task, and over
`time Wcan be made much smaller than what it would have been
`for conventional circuits. The battery will last much longer.
`Varying a circuit structure can cause undesired disturbances
`at the output. In certain cases, such disturbances do not occur to
`asignificant extent or are not an issue. Reducing the power dissi-
`pation in such cases is relatively easy; for example, it has been
`done for a very long time in power amplifiers, which sometimes
`are called to transmit at less than maximum power. Such cases
`will not be considered in this article. Rather, we will consider
`general and demanding situations where the internal attributes
`of a dynamical analog circuit are varied, while the circuit is pro-
`cessing a signal. This can cause strong transients at the output
`and can interfere with proper operation. A significant part of the
`techniques we discuss deal with how to prevent or eliminate
`such transients. Although much of our discussion is of a general
`nature that can be applied to many analog circuits, we will use as
`a specific example the particularly tough case of filters.
`We first give some definitions and review the reasons for
`large power dissipation in conventional signal processing cir-
`cuits. We then discuss the dynamic variation of several internal
`aspects of such circuits, including gain distribution, impedance
`levels, bias levels, and structure.
`Signal-to-Noise Ratio and
`Usable Dynamic Range: Two Distinct Quantities
`We consider for simplicity a system with unity voltage gain. For a
`given in-band signal with RMS value V, and noise with RMS value
`V,,, the signal-to-noise ratio (SNR) is defined in terms of the squares
`ofthese quantities, and thus, in systems parlance, is a “power ratio”:
`
`Out (dB)
`A
`
`V5 max
`
`Vomin
`
`SNR,
`
`> In (dB)
`
`Vmax
`
`Vemin
`<—— upr
`I. Output RMS signal and noise versus input RMS signal for a
`unity-gain signal processor.
`
`Asimple specification often encountered is that this quantity be
`The range of signal values
`no less than a certain value,
`over which this happens will be defined as the usable dynamic
`range (UDR):
`
`2
`
`UDR = smax
`>Vemin
`
`S,max
`
`(3)
`is made as large as possible; the value of this
`Weassume thatV,
`quantity is such that an appropriate distortion measure (e.g., har-
`monic or intermodulation distortion) does not exceed a maxi-
`mum allowed value. The value ofV,wax, together with the desired
`UDR, setsV,nin from (3). We assume that V,,
`is kept below this
`level so that SNR from (2) is just equal toSNR,....
`at that point:
`spec
`
`2
`_ Vemin
`SNR spec
`
`2Ve max
`~ SNRopec X UDR’
`
`(4)
`
`Since for conventional circuits the noise floor is constant, this
`at larger signal levels, as shown
`guarantees that SNR >
`In this figure we show SNRyp =10log(SNR) and
`in Figure 1.
`UDRap =10log(UDR), and their relation toV,gx andV,,gp, the
`latter two obtained as 20 times the log of their ratio to an arbi-
`trary reference. The subscript “dB” in each case has been
`dropped in order not to clutter the figure. Ratios such as in (2)
`and (3) correspond to linear distances in the dB plots in Figure 1.
`Notice that the maximum SNR is in general not equal to the
`usable dynamic range; it becomes equal to it only ifSNRopec is 0
`dB, which is a very unlikely specification in practice. From the
`plot, atV, Vemax We obtain SNR,»ay =SNRepec + UDR. Thus, at
`large signal levels, UDR represents a “waste” above the required
`pec, which leads to major problems in the design of conven-
`tional circuits, as is now discussed.
`Power Dissipation and Chip Area
`Waste in Fixed Circuits
`The tradeoffs involved among SNR, chip area, and power dissipa-
`tion in conventional continuous-time active circuits have been
`studied in the literature; see, for example, [1]-[5]. In their sim-
`plest form [2], these tradeoffs can be illustrated using a first-or-
`der RC low-pass circuit with bandwidth1/
`in which the
`resistor noise power spectral density, equal to
`is processed
`by the equivalent noise bandwidth of the circuit,1/
`thus, a
`mean-square noise of 447R x [1/(4RC)]
`C appears at the
`low noise requires large capacitance
`output
`[6]. Therefore,
`(large chip area) and, for a given bandwidth, low resistance; the
`resulting large admittance levels require large currents in order
`to be driven at large signal swings, which results in large power
`dissipation. Finally, since these admittance levels are also pro-
`portional to band-edge frequency, so is power dissipation.
`Similar results can be derived for larger circuits. For illustra-
`tion purposes, we use here the case of a second-order bandpass
`filter with a high quality factor Q (ratio of center frequency to
`bandwidth), implemented with a resonator fed by an input de-
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`vice; two implementations of this circuit are shown in Figure 2
`[7]-[10]. The voltage gain is 1 at the center frequency. We will
`concentrate on the circuit on the left, which is implemented
`with transconductors and capacitors. The center frequency of
`The tradeoffs between noise, capaci-
`this circuit is G,,
`tance, and power dissipation for this circuit have been studied
`quite early by Bloom and Voorman [1]. A detailed calculation of
`C again appears as above, along with some
`noise shows that
`new factors [1]:
`
`signal is balanced [11]. The gate voltage of this device can be
`used for limited transconductance tuning (e.g., to counteract
`tolerances and temperature variations).] The input-output
`characteristic is as shown in Figure 3(b). The valueV,
`used
`above is marked in the figure, and it has to be at a point well
`below clipping if low distortion is desired. This means that the
`maximum output current will be well below pias /2. We
`for a given transconductor
`should note here that,
`nonlinearity, distortion in filters depends not only on signal
`level but also on the quality factor Q, generally increasing
`with the latter [12]. Thus,V,na, needs to be kept especially low
`in high-Q filters.
`
`+
`
`=
`
`(a)
`(b)
`2. Unity-gain second-order bandpass filters: (a) Transconductor-C (gyrator-C);
`(b) active RC (Tow-Thomas).
`
`(d)
`3. Balanced input-output tranconductor; (a) simplified circuit; (b) output current versus input
`differential voltage (the slope is equal to the transconductance,
`(c) effect ofvarying the bias
`current while keeping G,, constant; (d) effect ofvarying G,, by scaling all elements in (a).
`
`V2 =
`
`AT
`
`Here the factor of 2 accounts for the
`the two large
`contributions of
`transconductors (which can be shown
`to be dominant), and Q appears due to
`the fact that there is a gain ofQ between
`the equivalent input noise of these
`transconductors and the output. The
`quantity yis the “excess noise factor” of
`the transconductors (typically 2 to 3).
`The value of C must be chosen to give a
`sufficiently low noise from (5), to satisfy
`the specs illustrated in Figure 1. Solv-
`ing (5) for C, and using (4) in the result,
`we obtain:
`
`Cx
`
`x
`
`V,S,max
`
`spec X UDR.
`
`(6)
`
`large UDR and small signal
`Thus,
`swings (necessary to achieve low distor-
`tion) require large capacitance. This is
`the reason that, in many integrated fil-
`ters, especially ones with high-Q poles,
`the chip area is dominated by the capac-
`itors. In fact, for each 3 dB improve-
`ment in UDR (a factor of 2 increase in
`this power ratio), the capacitance area
`must be doubled.
`Figure 3(a) shows a simplified sche-
`matic of a transconductor that will be
`used as an example in this article. Such
`a transconductor would be appropriate
`for use in the balanced version of the
`circuit in Figure 2(a). Assuming that
`the transistor transconductance is
`much larger than the resistor conduc-
`tance, the transconductanceofthe cir-
`cuit is approximately equal to 1/ R.
`[The resistor can be replaced by aMOS
`transistor in the triode region, which
`behaves linearly as long as the input
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`For future reference, we show in Figure 3 what happens if the
`bias current is changed [Figure 3(c)] and if the transconduc-
`tance is changed (e.g., by changing the number of several trans-
`conductor units placed in parallel) [Figure 3(d)].
`The transconductor bias currents in Figure 2(a), assuming
`class A operation and low distortion, must be larger than the
`maximum current these elements are expected to drive (which,
`for the two larger transconductors, is approximately the capaci-
`tor admittance at the center frequency times the maximum peak
`voltage) by a factor that we will denote by
`(e.g., 3 to 6):
`Igias = x 2nfC x VVmane
`The total bias current of the filter in Figure 2(a) is approximately
`twice this amount, since the two large transconductors draw
`most of the current. This, multiplied
`gives an expression
`for the power dissipation P. If, in this relation, C is replaced by
`(6), we obtain:
`
`(7)
`
`P = akTOF x
`
`x SNR spec X UDR
`
`max
`
`(8)
`where the factor a is equal to 8V2nby and in practice can have
`a value of several hundred. We thus see that P, in addition to
`being proportional to the center frequency, is proportional to
`the UDR; improving the required UDR by 3 dB requires dou-
`bling the power dissipation! The factor Vpp Vemax results
`from the above derivation and reminds us that, if we must
`keep the signals well below the supply voltage for low distor-
`tion, we will pay a price in power. We remind the reader that
`distortion effects are more severe in high-Q filters, and thus
`the allowableV,na, Will be smaller for higher Q. For this rea-
`son (6)-(8) cannot be used to compare two filters with differ-
`ent Q factors, unless the value of V,na, has been determined
`for each of them.
`Similar results (with y =1) are found for the circuit of Figure
`2(b), assuming that resistor noise dominates op-amp noise,
`which is often the case.
`
`Out (dB)
`
`Out (dB)
`
`Vg
`
`Va
`
`min 1
`
`k—upR,
`
`{a)
`
`V5max
`
`> In (dB)
`
`For high-order circuits, results similar to the above are found
`[3], [4]. Here the problems are compounded by the fact that each
`circuit block contributes noise, and this noise is especially large
`for filters containing high-Q poles, such as required, for exam-
`ple, for very narrow passband and/or very sharp transition char-
`acteristics. One can use the same formulas as above, with Q
`corresponding to the highest-Q pole pair, and appropriately
`changing the value of the constant a@ in (8), depending on filter
`order, architecture, and node voltage scaling strategy [13], [14].
`Again, the total capacitance and the power dissipation are pro-
`portional to the required UDR, but the constant of proportional-
`ity is larger. In the rest of this article we will continue to use the
`above relations for illustrative purposes.
`The above simple estimates suffice to demonstrate the prac-
`tical limitations of conventional on-chip active filters. For ex-
`ample, consider a second-order section with Q of 20 and a
`center frequency of 10 MHz, SNRopec = 40 dB, and operating
`= 3 VandV,max = 05 V. Assume y = 3anda = 200. We
`with
`will contrast two cases, one with low UDR [Figure 4(b)] and one
`with high UDR [Figure 4(a)]. If UDR =20 dB, the required C
`from (6) is 2 pF, and the resultingPfrom (8) is 1 mW. If, instead,
`the spec calls for UDR = 60dB, the capacitance becomes 20,000
`pF and the power 10 W, either of which would rule out an inte-
`grated implementation.
`It can thus be appreciated that, in integrated filter design, we
`can run out of pF and of mW pretty quickly. The reason can be
`traced to the fixed nature of conventional circuits. In the rest of
`this article, we review several techniques through which the in-
`ternal attributes of the circuits can be varied, thus making possi-
`ble drastic savings in chip area and/or power dissipation.
`Technique 1: Companding
`(Dynamic Gain Scaling)
`Assume thata filter must satisfy specs as in Figure 4(a), requir-
`ing a very wide UDR, denoted by UDR, in that figure. We can pro-
`cess this signal using a filter with a much narrower range UDRg
`as indicated in Figure 4(b), if we can first compress the signal
`range UDR, into UDRg, process the signal with a filter designed
`to handle only this narrow range, and expand the range at the
`output back to UDR,
`(the extent to
`which this is possible may be limited if
`large “blockers” are present—see be-
`low). This process of compressing and
`expanding is called “companding.” It has
`been used in telecommunications and
`audio recording for a very long time
`[15], [16], but its use in signal process-
`ing [17] is more difficult, as will be ex-
`plained shortly.
`Companding can be done as shown in
`Figure 5. Assume for simplicity that the
`filter has unit gain, that the signal is in the
`passband, and that the noise of the input
`and output gain elements is negligible in
`comparison to the filter noise. The input
`
`4, Output RMS signal and noise versus input RMS signal for signal processors with (a) wide and
`(b) narrow usable dynamic range.
`
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`Varying a circuit structure can cause
`undesired disturbances at the output. These
`techniques deal with how to prevent or
`eliminate such transients.
`
`as
`
`companding is referred
`“syllabic”
`to
`companding, since in
`speech processing such
`time constants would
`be comparable to the
`duration of word sylla-
`bles. Issues with the de-
`sign and use
`of
`envelope detectors are
`similar to those encountered in AGC design [19].
`The above technique can be applied also when the system’s
`input and output variables are of a different type than those at
`the input and output of the filter. As an example, Figure 7 shows
`a system called to handle current signals [20]. These are con-
`verted to voltage by the input transconductor connected as a re-
`sistor (v, =ijy/G,,-), are processed by the voltage-in,
`voltage-out filter in the center, and are converted back to cur-
`rent by the output transconductor. This system corresponds to
`the one in Figure 5, with g
`The transconductanceG,,,
`is made variable and proportional to the system’s input current
`envelope by using an envelope detector as above. The input resis-
`tor-connected transconductor could be replaced by a variable re-
`sistor, but using an input transconductor ensures good
`matching with the characteristics of the output transconductor.
`Both transconductors are required to handlea large, fixed sig-
`nal voltage.
`can be varied over wide ranges if transconductor
`cells are switched in parallel as necessary. The combined bias cur-
`rentwill vary along with the combined transconductance, as illus-
`
`and output gain blocks
`are controlled together,
`and their gains are in-
`verses of one another
`(see below).
`We consider two
`representative cases in
`Figure 6. In (a), the in-
`is signifi-
`put signal
`cantly smaller than
`what the filter can handle; g is thus made larger than unity (5 in
`this example), to increase the signal so that it remains well above
`the filter’s noise floor. The output gain element attenuates the
`signal back to its original level and at the same time attenuates
`the noise by the same amount. In (b), the input is assumed to be
`as large as the filter can handle, so g is made equal to 1. The sig-
`nal is sufficiently above noise, so that the output SNR is satisfac-
`tory. The output gain is also equal to 1 in this case, and both the
`signal and the noise pass to the output of the system essentially
`unchanged. In some cases, even larger signals can be handled at
`the system input, in which case g will have to be made smaller
`than 1. In all cases the same, narrow-UDR filter is used, since the
`signal presented to the filter is always kept large and therefore it
`does not require a low noise floor. Thus, the filter can be de-
`signed economically with small capacitors and low power dissi-
`pation. As expected from the above calculations, power savings
`by a factor of UDR, / UDRg can be achieved in the filter; for ex-
`ample, if the dynamic range is narrowed by 40 dB, the required
`filter dissipation can in principle be decreased 10,000 times! This
`savings is, of course, not attainable in practice for the overall sys-
`tem because the supporting circuitry will also require some
`power; the savings can be drastic nevertheless.
`It can be seen from Figure6 that, in all cases, the output SNR
`is approximately the same. This tendency toward flatness of the
`SNR characterizes all companding systems (see, for example,
`the measurements in [18]).
`The key to the above technique is keeping the signal amplitude
`at the input to the filter constant at a near-optimum value (large
`enough to be well above the filter noise, but not so large as to ex-
`cite the filter nonlinearities to a significant extent). Thus, should
`in principle be inversely proportional to the amplitude of the sig-
`nal at the input of the system. If the system input amplitude is
`known, an appropriate control can be applied to the g and 1/¢ ele-
`ments to achieve this; if it is not known, an envelope detector can
`be used, connected to the input or output of the first gain element
`[17] (Figure 5), using well-known feedforward or feedback auto-
`matic gain control (AGC) techniques [19]. (In the special case
`where the filter is the IF or baseband filter ina receiver, the output
`gain block may or may not be necessary; the function of this block
`should be considered in the context of the AGC strategy of the re-
`ceiver.) Depending on the signal characteristics, measures other
`than the envelope (e.g., the rms value) may be used, but using the
`envelope is safer, especially if the signal’s crest factor is large and
`not precisely known. In general, the required circuits have release
`time constants corresponding to many signal cycles; this type of
`
`|
`|
`|
`
`I|
`
`se>
`
`Filter
`
`|
`
`|
`
`|
`
`Control Circuits
`
`5. Companding signal processor.
`
`“Pa
`iiaga
`
`6. The main path of the companding signal processor ofFigure 5 with
`(a) small input signal amplitude and (b) input signal amplitude in-
`creased by a factor of5.
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`trated in Figure 3(d). Thus, if the signal is small, the totalG,,,. and
`grag Will be small. Large power dissipation will be needed only
`when the signal is large. Figure 7(b) shows this behavior. Depend-
`ing on the statistics of the input signal, drastic savings can be pos-
`sible in the overall energy drain [20].
`Leaving Headroom for Blockers
`In certain applications (notably wireless), out-of-band signals
`can be much larger than in-band ones. This situation is de-
`picted in Figure 8(a), where a large low-frequency blocker is
`superimposed ona small desired signal. Let the peak values of
`these signals beVieakblocker 224Vpeak,signals respectively. If the
`blocker were not present [Figure 6(a)], the system would have
`giveng a value inversely proportional toVieaksignals however,
`
`in
`
`¥
`
`Filter
`
`Conventional Filter
`
`P
`(Log Scale)
`
`Companding Filter__-
`
`jin,ams (Log Scale)
`
`7. (a) The main path ofthe companding signal processor ofFigure 5
`in the case ofcurrent input and current output. (b) Resulting power
`dissipation versus input RMS amplitude.
`
`Me
`
`AWWW
`
`eneiial
`
`Walenta
`
`AAW
`
`AW
`
`Filter
`
`(a)
`
`Filter
`
`(b)
`
`8. (a) The main path ofthe companding signal processor ofFigure 5
`with a desired input ofthe same magnitude as in Figure 6(a), superim-
`posed on a much larger out-of-band “blocker”; output signal-to-noise
`ratio is deteriorated. (b) The system in (a) redesigned to provide ade-
`quate output signal-to-noise ratio in the presence ofthe blocker.
`
`in the presence of the blocker [Figure 8(a)], g will instead be
`inversely proportional to Vicak signal + Mpeakblocker» 80 it will as-
`sume a value which will be smaller by the factor
`(Veeak, signal +Voeak,blocker Voeak,signal: Although the blocker is
`removed at the output of the filter, the signal power at this point
`has been weakened by the square of the above factor, compared
`to the case in Figure 6(a), and the SNR has been thus weakened
`by the same factor, as seen in Figure 8(a). To correct this prob-
`lem, the design of the system has to be revised so that the noise
`floor is made smaller by the same factor, too, as shown in Figure
`8(b); this means that the filter should be designed with an SNR of
`SNRejter = SNRspec x HR
`where HR is the headroom for blockers, defined by:
`
`(9)
`
`HR=
`
`+fieyo
`
`peak, signal
`
`2
`
`.
`
`(10)
`
`Thus, if blockers with total peak value as large as that of the
`signal are expected, a headroom of 6 dB should be allowed; if
`blockers with total peak value 10 times that of the signal are
`expected, the headroom becomes 21 dB. This headroom co-
`mes at the expense of capacitance and power dissipation.
`Thus, all estimates as to how much savings companding af-
`fords those quantities must be lowered by the headroom. Appro-
`priate optimization, in which the gain within the filter is made
`progressively higher towards the output (i.e., as the blocker is
`progressively rejected), can help [13], [14].
`Avoiding Output Transients
`The use of companding in filters encounters a difficulty not pres-
`ent in companding transmission systems. Filters are dynamical
`circuits; changes at the input appear as changes at the output with
`certain delay. Assume that, in Figure 5, the input signal strength
`suddenly changes, thus momentarily changing the signal at the
`input of the filter. The envelope detector senses the system input
`change and adjusts g to restore the filter input to its original level.
`The output element’s gain, 1/ g, changes accordingly at the same
`time, which is before the change at the filter input has had a
`chance to propagate to the output. Thus, the output element’s
`gain changes too soon, and an undesirable transient occurs at the
`system output [17]. In some applications this is not a problem, as
`these changes may occur before the time comes to process the
`useful signal (for example, during the preamble slot in certain
`wireless protocols). If, however, continuous service is desired, this
`transient must be eliminated or prevented in the first place. Sev-
`eral schemes that have been proposed to accomplish this are now
`described; some may prove to be more practicable than others.
`State variable correction: The above problem can be
`avoided if the dynamics of the filter are properly taken into ac-
`count. It has been pointed out [21] that if the input gain in Fig-
`ure 6 is switched from a value go,p to a value gypw, no
`transient will appear at the output if all state variables are “up-
`
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`dated” by the same factor involved in the change ofg. Thus, the
`voltage on a capacitor must be changed at that instant, froma
`=VoLp X (9NnEw / JoLp)- This can
`value
`to a value
`be accomplished, for example, by charging the capacitors in a
`filter appropriately at the transition [21]. If, instead, g is not
`switched but rather is changed continuously, a likewise contin-
`uous modification of the state variables can be used; this prob-
`lem has a general analytical solution [22], but the resulting
`circuits have proven not to be easy to design [23]. State variable
`correction is indicated in Figure 5 by the dotted arrow going
`from the control circuits to the filter.
`Zero-crossing switching: Consider a state variable v in the
`filter. According to the scheme just described [21], this value
`(9new / JoLp)- If, how-
`needs to be updated to vypw =VYoLp
`ever, we wait to perform this change at a moment that v crosses
`too. Thus, no updat-
`the time axis, vp,
`and thus vypw
`ing is needed [24]. The implementation of this idea relies on ac-
`curate detection of zero crossings, which is complicated in
`practice, especially for high-frequency signals.
`Feed-forward cancellation: Another way to solve the output
`transient problem is to allow the transient to occur but add to
`the output a second transient that is precisely the negative of the
`first [24]. To produce this second transient, a duplicate filter is
`needed; this filter is fed by the same signal as the main filter, un-
`til the time for the gain switching comes; then, the input of the
`second filter is switched to 0. Because, at the time of switching,
`this second filter has all its state variables identical to those in
`the main filter, it can be shown that the transient that occurs at
`its output, if multiplied by an appropriate gain, is opposite from
`that in the main filter; adding the two filter outputs results in
`elimination of that transient, and the signal appears undisturbed
`by the gain switching.
`Combining companding with log domain: Consider again
`the system of Figure 7(a), using transconductors at the input
`and output. The simplest transconductor is a single transis-
`tor. If the two transconductors are replaced by bipolar transis-
`tors, we obtain the system of Figure 9(a). The transconductors
`are nowof course nonlinear, and the total voltage at the filter
`input is proportional to the logarithm of the instantaneous
`transistor current. It can be shown that if this voltage is pro-
`cessed by a “log domain” filter core, and the filter’s output is
`processed by an exponential nonlinearity as in Figure 9(a), the
`input-output behavior is linear [25], [26] (this is a perfectly
`sound concept, which has been widely misunderstood). Now,
`to vary the gain of the input “transconductor” in Figure 9(a),
`one can vary its bias current in proportion to the signal enve-
`/ kT for a bipolar transistor. If a sec-
`lope [27], since g,,
`ond filter is used as shown in Figure 9(b), with the same bias
`but the opposite input signal, the transients due to the bias
`change are the same at the output of both filters; thus, if the
`difference of the two outputs is taken, this transient cancels
`out, although the signal components add [28]. Key to this idea
`is the fact that, since the two systems are dinear from input to
`output, both signal and bias are treated by them by one and
`the same transfer function. A chip using this approach [28]
`
`IEEE CIRCUITS & DEVICES MAGAZINE m JANUARY 2003
`
`has been demonstrated to give a very large UDR, which
`approaches the fundamental limits of power dissipation of
`passive RC circuits with the same UDR! (Passive circuits do
`dissipate some power—from the input signal source.)
`Divide-and-conquer: Rather than switching the gain ele-
`ments in the system of Figure 5, one can use more than one path
`with different, but fixed, gain elements, as shown in the example
`of Figure 10(a) [29]. Here the gain elements are fixed. The three
`paths should be closely matched. Depending on the input signal,
`the path switched to the output is changed; large signals are pro-
`cessed by the top path, smaller ones by the middle path, and very
`small ones by the bottom path. Transients at the output are
`avoided, since the paths have the same outputs, as long as no
`large distortion occurs. Thus, for example, assume that as the
`signal is being processed by the middle path, its amplitude be-
`gins to decrease, which would result in a decreased SNR at the
`output; the decreased signal level is appropriate for the bottom
`path, which has a better output SNR thanks to the larger gain at
`its input (see Figure 6). Other than that, both paths produce the
`same output signal, so when the output is switched to the lower
`path, no transients occur. More sophisticated schemes can be
`used, where some filters are switched off part of the time to save
`power, while output transients can still be avoided by employing
`a special switching sequence [30].
`The overall signal-to-noise-plus-distortion ratio (SNDR) of
`this system is as shown in Figure 10(b). As seen, the total UDR
`has been divided into three regions, and each filter is only re-
`quired to handled a limited UDR. The sloping off of each curve
`
`!
`
`iin
`
`Log-Domain
`Filter
`Core
`
`!
`
`fount
`
`=
`
`(a)
`
`Lag-Domain
`Filter
`Core
`
`nae
`
`OUT2
`
`=
`
`(b)
`9. The circuit in Figure 7(a), with transconductors replaced by bipolar
`transistors and the main filter replaced by a log-domain core; two
`paths, driven differentially, are shown, with the output assumed to
`also be taken differentially.
`
`Authorized licensed use limited to: ASU Library. Downloaded on February 18,2021 at 18:42:56 UTC from IEEE Xplore. Restrictions apply.
`
`SAM20032943
`
`IPR2023-00697
`Theta EX2003
`
`IPR2023-00697
`Theta EX2003
`
`

`

`toward the right is due to increase in distortion. Consider the ex-
`ample presented earlier, where a total desired UDR of 60 dB re-
`sulted in a capacitanceof 20,000 pF and a power dissipation of 10
`W. Using instead the divide-and conquer technique, each of the
`filters need only handle a UDRof20 dB, and it thus requires only
`2 pF and 1 mW! Such savings more than make up for the fact that
`three filters plus supporting circuitry are used. Of course,
`if
`blockers are present, the required headroom (see above) will re-
`duce the savings that can be obtained.
`Companding techniques can also be applied to switched-ca-
`pacitor circuits [31].
`Technique 2: Dynamic Impedance Scaling
`Consider a system designed to handle very small signals in the
`worst case, as in Figure 4(a). Due to the large UDR, the capaci-
`tance values will be large, as seen from (6). However,
`this
`worst-case signal situation may not be present continuously; part
`of the time, this same system may be called to handle large signals
`
`> Filter
`
`(a)
`
`SDNR
`
`0.1
`
`oo
`
`SNRepec
`
`Filter
`1
`
`|
`
`‘
`
`Filter
`2
`
`Filter
`3
`
`UDR = 60 dB
`(b)
`
`>
`
`Input
`
`10. (a) “Divide-and-conquer”signal processor; (b) resulting sig-
`nal-to-noise-plus-distortion ratio (SNDR) versus input RMS value.
`
`Filter 1
`
`Power Down
`
`Vv
`
`°—
`
`:
`
`This, for example, can be the case in
`with limited UDR or
`wireless systems, when the desired signal happens to be strong
`and no strong blocker is present [32]. At those instances, the very
`low noise floor of this system is unnecessary and can be allowed to
`increase by scaling C down [33], resulting, for example, in the sit-
`uation shown in Figure 4(b). Of course, the transconductances or
`conductances of thefilterwill have to be scaledtogether with C, in
`order to leave the frequency response unchanged. The reason one
`may want to do such impedance scaling becomes clear