`
`UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`GREENTHREAD, LLC
`
`
`
`Plaintiff,
`
`
`
`v.
`
`
`INTEL CORPORATION, DELL INC., AND
`DELL TECHNOLOGIES INC.
`
`
`
`
`
`Defendants.
`
`Case No. 6:22-cv-105-ADA
`
`
`
`DEFENDANTS’ OPENING CLAIM CONSTRUCTION BRIEF
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`Dell Ex. 1019
`Page 1
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`
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 2 of 45
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`
`
`I.
`
`II.
`
`TABLE OF CONTENTS
`
`INTRODUCTION............................................................................................................. 1
`
`THE ASSERTED PATENTS........................................................................................... 1
`
`III.
`
`LEGAL STANDARD ....................................................................................................... 2
`
`IV. DISPUTED CLAIM TERMS .......................................................................................... 3
`
`A.
`
`B.
`
`C.
`
`D.
`
`E.
`
`F.
`
`G.
`
`“surface layer” and related terms ............................................................................ 3
`
`“substrate” ............................................................................................................... 8
`
`“active region” ...................................................................................................... 11
`
`“unidirectional electric drift field” terms .............................................................. 14
`
`“to aid the movement of minority carriers from … to …” / “to aid carrier
`movement from … [to/towards] …”..................................................................... 18
`
`“well region” ......................................................................................................... 25
`
`“active region … within which transistors can be formed” .................................. 29
`
`V.
`
`CONCLUSION ............................................................................................................... 35
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`
`
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`i
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`Dell Ex. 1019
`Page 2
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 3 of 45
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`TABLE OF AUTHORITIES
`
`
`
`Page(s)
`
`Cases
`
`Aylus Networks, Inc. v. Apple Inc.,
`856 F.3d 1353 (Fed. Cir. 2017)..............................................................................10, 18, 24, 29
`
`Evicam Int’l, Inc. v. Enf’t Video, LLC,
`No. 4:16-CV-105, 2016 WL 6470967 (E.D. Tex. Nov. 2, 2016) ............................................22
`
`Festo Corp. v. Shoketsu Kinzoku Kogyo Kabushiki Co.,
`535 U.S. 722 (2002) ...................................................................................................................1
`
`Haemonetics Corp. v. Baxter Healthcare Corp.,
`607 F.3d 776 (Fed. Cir. 2010)..................................................................................................35
`
`Infinity Computer Prod., Inc. v. Oki Data Americas, Inc.,
`987 F.3d 1053 (Fed. Cir. 2021), cert. denied, 142 S. Ct. 585 (2021) ............................4, 34, 35
`
`Interval Licensing LLC v. AOL, Inc.
`766 F.3d 1364 (Fed. Cir. 2014)....................................................................................19, 21, 24
`
`JobDiva, Inc. v. Monster Worldwide, Inc,
`No. 13-CV-8229 KBF, 2014 WL 5034674 (S.D.N.Y. Oct. 3, 2014) ......................................22
`
`Media Rts Techs., Inc. v. Cap. One Fin. Corp.,
`800 F.3d 1366 (Fed. Cir. 2015)..................................................................................................7
`
`Nabors Drilling Techs. USA, Inc v. Helmerich & Payne Int’l Drilling Co.,
`No. 3:20-CV-03126-M, 2022 WL 1689444 (N.D. Tex. May 26, 2022) .................................22
`
`Nautilus, Inc. v. Biosig Instruments, Inc.,
`572 U.S. 898 (2014) .....................................................................................................2, 3, 8, 35
`
`O2 Micro Int’l. Ltd. v. Beyond Innovation Tech. Co., Ltd.,
`521 F.3d 1351 (Fed. Cir. 2008)............................................................................................9, 11
`
`Perfectvision Mftg., Inc v PPC Broadband, Inc.,
`No. 4:12CV00623 JLH, 2014 WL 4285786 (E.D. Ark. Aug. 29, 2014) .................................19
`
`Phillips v. AWH Corp.,
`415 F.3d 1303 (Fed. Cir. 2005) (en banc) .................................................................................2
`
`Regents of Univ. of Minnesota v. AGA Med. Corp.,
`717 F.3d 929 (Fed. Cir. 2013)..................................................................................................24
`
`ii
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`Dell Ex. 1019
`Page 3
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`
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 4 of 45
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`SIPCO, LLC v. Emerson Elec. Co.,
`794 F. App’x 946 (Fed. Cir. 2019) ................................................................................9, 11, 35
`
`SpeedTrack, Inc. v. Amazon.com,
`998 F.3d 1373 (Fed. Cir. 2021)................................................................................................17
`
`Teva Pharms. USA, Inc. v. Sandoz, Inc.,
`789 F.3d 1335 (Fed. Cir. 2015)................................................................................................35
`
`TVnGO Ltd. (BVI) v. LG Elecs. Inc.,
`861 F. App’x 453 (Fed. Cir. 2021) ......................................................................................8, 35
`
`U.S. Well Servs., Inc. v. Halliburton Co.,
`No. 6:21-CV-00367-ADA, 2022 WL 819548 (W.D. Tex. Jan. 17, 2022) ..............................22
`
`Statutes
`
`35 U.S.C. § 112 ................................................................................................................................1
`
`
`
`
`
`iii
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`Dell Ex. 1019
`Page 4
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 5 of 45
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`TABLE OF EXHIBITS
`
`Exhibit
`
`Description
`
`A
`
`B
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`C
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`D
`
`E
`
`F
`
`G
`
`H
`
`I
`
`J
`
`K
`
`L
`
`M
`
`N
`
`O
`
`P
`
`Q
`
`R
`
`S
`
`T
`
`U.S. Patent No. 8.421,195
`
`U.S. Patent No. 9,190,502
`
`U.S. Patent No. 11,121,222
`
`U.S. Patent No. 10,510,842
`
`U.S. Patent No. 10,734,481
`
`U.S. Patent No. 11,316,014
`
`File History of U.S. Patent No. 8,421,195
`
`U.S. Patent Application No. 13/854,319
`
`U.S. Patent No. 4,160,985
`
`U.S. Patent No. 4,684,971
`
`U.S. Patent Application Publication No. 2003/0183856 A1.
`
`U.S. Patent Application Publication No. 2003/0042511 A1.
`
`U.S. Patent Application Publication No. 2007/0045682 A1
`
`Silicon Processing for the VLSI Era (2000) Volumes 1-4
`
`Petition for Inter Partes Review of United States Patent No. 8,421,195
`Pursuant to 35 U.S.C. §§ 311-319, 37 C.F.R. § 42, Samsung Electronics Co.
`Ltd., v. Greenthread LLC, IPR2020-00289
`
`Patent Owner Preliminary Response Under 35 U.S.C. § 313 and 37 C.F.R.
`§42.107, Samsung Electronics Co. Ltd., v. Greenthread LLC, IPR2020-
`00289
`
`Declaration of Alexander D. Glew, Samsung Electronics Co. Ltd., v.
`Greenthread LLC, IPR2020-00289
`
`McGraw Hill Dictionary of Scientific and Technical Terms, 6th Ed. (2003)
`
`Microchip Manufacturing, S. Wolf, (2004)
`
`Semiconductor Devices, Physics and Technology, S.M. Sze 2nd Ed., (2001)
`
`iv
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`Dell Ex. 1019
`Page 5
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`
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 6 of 45
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`U
`
`V
`
`W
`
`X
`
`Y
`
`Z
`
`AA
`
`BB
`
`CC
`
`DD
`
`EE
`
`FF
`
`GG
`
`HH
`
`II
`
`JJ
`
`KK
`
`LL
`
`McGraw-Hill Dictionary of Electrical and Computer Engineering, 6th Ed.,
`(2003).
`
`Declaration of Scott Thompson
`
`U.S. Patent No. 8,106,481
`
`U.S. Patent No. 6,633,066
`
`U.S. Patent No. 6,930,336
`
`Lin, W., A Simple Method for Extracting Average Doping Concentration in
`the Polysilicon and Silicon Surface Layer near the Oxide in Polysilicon-Gate
`MOS Structures
`
`Baker, R. J., CMOS Circuit Design, Layout, and Simulation, IEEE (1998)
`
`Chen, J. Y., CMOS Devices and Technology for VLSI, Prentice-Hall (1990)
`
`Webster’s Third New International Dictionary of the English Language
`Unabridged, Merriam-Webster, Inc. (2002),
`
`Weste, N. H. E et al., CMOS VLSI Design: A Circuits and Systems
`Perspective, Addison-Wesley (2011),
`
`Greenthread’s Disclosure of Extrinsic Evidence
`
`U.S. Patent No. 5,536,962
`
`U.S. Patent Application No. 13/854,319
`
`File History of U.S. Patent No. 10,510,842, Office Action, dated July 17,
`2018.
`
`File History of U.S. Patent No. 10,510,842, Amendment, dated September
`16, 2019
`
`File History of U.S. Patent No. 10,510,842, Amendment, dated January 16,
`2019
`
`File History of U.S. Patent No. 10,510,842, Notice of Allowance, dated
`November 5, 2019
`
`File History of U.S. Patent No. 11,121,222, Notice of Allowance, dated
`August 11, 2021
`
`v
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`Dell Ex. 1019
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 7 of 45
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`MM
`
`NN
`
`OO
`
`PP
`
`
`File History of U.S. Patent No. 11,316,014, Notice of Allowance, dated
`August 11, 2021
`
`File History of U.S. Patent No. 10,734,481, Notice of Allowance, dated
`April 7, 2020
`
`File History of U.S. Patent No. 10,510,842, Office Action, dated August 11,
`2021.
`
`File History of U.S. Patent No. 10,510,842, Application, dated May 9, 2017.
`
`Wang, F., Single Event Upset: An Embedded Tutorial, 21 International
`Conference on VLSI Design, IEEE (2008)
`
`
`
`vi
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`Dell Ex. 1019
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 8 of 45
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`
`
`I.
`
`INTRODUCTION
`
`“The [patent] monopoly is a property right; and like any property right, its boundaries
`
`should be clear.” Festo Corp. v. Shoketsu Kinzoku Kogyo Kabushiki Co., 535 U.S. 722, 730 (2002).
`
`As the Supreme Court has explained, “[t]his clarity is essential to promote progress, because it
`
`enables efficient investment in innovation.” Id. at 730-31. “For this reason, the patent laws require
`
`inventors to describe their work in ‘full, clear, concise, and exact terms.’” Id. (citing 35 U.S.C. §
`
`112). Yet several terms of the Asserted Patents fail to meet this standard, leaving Defendants
`
`guessing as to the scope of the claims, and prejudicing Defendants’ ability to defend against
`
`Greenthread’s assertions. The claims that contain these terms are invalid as indefinite.
`
`Even where terms are not so vague as to be indefinite, Greenthread’s request that they be
`
`given, simply, “plain meaning” is not sufficient. Although certain terms are used according to their
`
`ordinary meaning to a person of ordinary skill in the art (“POSITA”), the jurors will almost
`
`certainly not be POSITAs, and construction is necessary to ensure that Greenthread is limited to
`
`that meaning. Moreover, for other terms the prosecution history—including amendments to
`
`overcome prior art and statements to avoid IPR institution—makes clear the meaning intended,
`
`and Greenthread should not be permitted to recapture through “plain meaning” a scope it
`
`disclaimed to receive and keep its patents.
`
`II.
`
`THE ASSERTED PATENTS
`
`Greenthread asserts six patents in this case, all of which share a common, three-column
`
`specification.1 The Asserted Patents describe basic semiconductor devices, such as CMOS
`
`transistors, which include conventional structures found in engineering textbooks. The
`
`
`1 Greenthread asserts U.S. Patents Nos. 8,421,195 (“the ’195 Patent”); 9,190,502 (“the ’502
`Patent”); 10,510,842 (“the ’842 Patent”); 10,734,481 (“the ’481 Patent”); 11,121,222 (“the ’222
`Patent”); and 11,316,014 (“the ’014 Patent”) (collectively, “the Asserted Patents”).
`
`
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`Dell Ex. 1019
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 9 of 45
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`specification states that the claimed devices differ from a conventional device in their use of
`
`specific “graded dopant concentrations.” Semiconductor devices carry electric charges using either
`
`electrons or holes, which together are referred to as charge carriers. See, e.g., Ex. A, ’195 Patent
`
`at 1:26-27; Ex. V, ¶ 10. Doping is the process of introducing impurities into a semiconductor
`
`material, such as silicon, to add surplus carriers. Ex. V, ¶ 11. The relative amount of added dopant
`
`is called the dopant concentration. Id. The Asserted Patents acknowledge that graded dopant
`
`concentrations—where concentration varies at different locations inside the device—were
`
`previously known in the art. See Ex. A, ’195 Patent at 2:13-15. Despite that, the patents purport to
`
`claim that specific graded dopant concentrations will “sweep” certain carriers through the device,
`
`ostensibly improving performance. See id. at 3:30-40, Abstract, 1:32-36. In the claims of the ’195
`
`and ’502 Patents, the graded dopant concentrations that “aid the movement of minority carriers”
`
`are found in a “drift layer” and in a “well region” that is disposed in the drift layer. In the ’842,
`
`’481, ’222, and ’014 Patents, the claims require that an “active region” (and for certain patents,
`
`additionally a “well region”) have a “graded dopant concentration to aid carrier movement.”
`
`III. LEGAL STANDARD
`35 U.S.C. § 112 ¶ 2 requires that “[t]he specification shall conclude with one or more
`
`claims particularly pointing out and distinctly claiming the subject matter which the [applicant]
`
`regards as his invention.” Ordinarily, claim terms are “given their ordinary and customary
`
`meaning” as understood by a POSITA unless the patentee has chosen a specific meaning or
`
`disclaimed its full scope. Phillips v. AWH Corp., 415 F.3d 1303, 1312 (Fed. Cir. 2005) (en banc).
`
`Critically, however, § 112 ¶ 2 demands that patent claims, when read in light of the
`
`specification and prosecution history, must inform, “with reasonable certainty, those skilled in the
`
`art about the scope of the invention.” Nautilus, Inc. v. Biosig Instruments, Inc., 572 U.S. 898, 901
`
`(2014). That is, “a patent must be precise enough to afford clear notice of what is claimed, thereby
`
`2
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 10 of 45
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`‘apprising the public of what is still open to them,’” and avoiding “a zone of uncertainty which
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`enterprise and experimentation may enter only at the risk of infringement claims.” Id. at 899. The
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`Supreme Court has noted that patentees benefit from this uncertainty, “fac[ing] powerful
`
`incentives to inject ambiguity into their claims,” such that it is the responsibility of the patent
`
`drafter “to resolve the ambiguity.” Id. Where a defendant shows by clear and convincing evidence
`
`that this ambiguity is not resolved, the patent is invalid for indefiniteness. Id. at 912 n. 10.
`
`IV. DISPUTED CLAIM TERMS
`
`A.
`
`“surface layer” and related terms
`
`Claim Term
`
`Defendants
`
`Greenthread
`
`Indefinite
`
`Plain Meaning
`
`“surface layer” / “an active
`region . . . disposed on one
`surface of said surface layer”
`/ “a single drift layer
`disposed between the other
`surface of said surface layer
`and [said/the] substrate”
`
`Claim 1 of the ’195 Patent, Claim 7 of the ’502 Patent, and Claim 44 of the ’222 Patent
`
`each requires a “surface layer,” but without anything in the intrinsic evidence to describe what a
`
`“surface layer” means—and without any commonly understood meaning to one skilled in the art—
`
`the term is indefinite and renders these claims invalid. Not only does the term “surface layer” not
`
`appear anywhere in the specification, the specification also does not contain a single example of
`
`what would constitute a “surface layer,” and no embodiment describes a layer that could plausibly
`
`be the claimed “surface layer.”2 Furthermore, “surface layer” is not a term of art having a
`
`commonly accepted definition, as discussed below.
`
`
`2 Defendants are concurrently filing a Motion for Summary Judgment of Invalidity for Lack of
`Written Description on this issue.
`
`3
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`Dell Ex. 1019
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 11 of 45
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`While the words “surface” and “layer” are generally known and each have an
`
`understandable meaning on their own, the dispute is not what “surface layer” might mean in
`
`isolation, but rather, its meaning in the context of the entirety of each claim. Here, the term must
`
`be considered in the context of its spatial relationship with other recited structural elements. See
`
`Infinity Computer Prod., Inc. v. Oki Data Americas, Inc., 987 F.3d 1053, 1062 (Fed. Cir. 2021),
`
`cert. denied, 142 S. Ct. 585 (2021) (“We recognize that, in a vacuum, it might seem odd to hold
`
`‘computer’ indefinite. . . . Yet the indefiniteness here does not reside in the term ‘passive link’ or
`
`‘computer’ on its own but rather in the relationship between the two in the context of these
`
`claims.”). The unambiguous claim language requires a “surface layer” with two “surfaces,” an
`
`“active region” that is “disposed on one surface” of the claimed “surface layer,” and a “single drift
`
`layer” that is “disposed between the other surface” of the surface layer and a “substrate.” A
`
`separate “well region” is “disposed in” the “single drift layer.” Claim 1 of the ’195 Patent,
`
`excerpted below, is representative:
`
`1. A CMOS Semiconductor device comprising:
`a surface layer;
`a substrate;
`an active region including a source and a drain,
`disposed on one surface of said surface
`layer;
`a single drift layer disposed between the other
`surface of said surface layer and said
`substrate, said drift layer having a graded
`concentration
`of
`dopants
`extending
`between said surface layer and said
`substrate; ...
`at least one well region disposed in said single
`drift layer, said well region having a graded
`concentration of dopants ....
`
`4
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 12 of 45
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`Ex. A, ’195 Patent at Claim 1; see also Ex. V, ¶¶ 13-17. Accordingly, “surface layer” is the
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`cornerstone of the claims, as the other elements are defined by their placement relative to the
`
`“surface layer.”
`
`No “surface layer” is disclosed in the specification. When faced with an ambiguous
`
`claim, a skilled artisan would turn to the specification for guidance, but the intrinsic evidence here
`
`injects nothing but uncertainty since the specification does not disclose any layer, of any kind, that
`
`satisfies the claimed spatial relationship of such layer to an “active region” and “single drift layer.”
`
`The Asserted Patents’ scant three-column specification is devoid of any suggestion of a “surface
`
`layer,” nor anything that could plausibly constitute such a layer, either in the text or the figures.
`
`Ex. V, ¶¶ 24-34. In the relevant CMOS embodiments, illustrated in Figures 5(a) and 5(b) shown
`
`below, the active region directly abuts the single drift layer (which, as per the claim, includes the
`
`well region disposed within it) without any intervening layer.
`
`
`
`Ex. V, ¶¶ 32-33 (citing ’195 Patent at Figs. 5(a)-(b) (annotated and coloring added, including to
`
`show the channel in the active region between the source and drain)). The specification confirms
`
`that these figures “illustrate the cross sections of a MOS silicon substrate with two wells, and, an
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`[i.e., singular] underlying layer.” Ex. A, ’195 Patent at 2:27-29. And although the specification
`
`refers to a “surface” in several instances and discloses layers such an “underlying layer,” a POSITA
`
`5
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 13 of 45
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`would not understand any of these references to disclose a “surface layer” exhibiting the spatial
`
`relationships of the claims. Ex. V, ¶ 34.3
`
`“Surface layer” has no plain meaning as used in the claims. Greenthread urges that
`
`“surface layer” be given its “plain meaning.” But the term does not have any commonly accepted
`
`meaning to those of skill in the art. Ex. V, ¶¶ 37-38. Although “surface layer” may sometimes
`
`appear in the prior art, it is used as a nonce word that has varied meanings, which are defined by
`
`the context in which it is used. Id., ¶ 37. Semiconductor devices are complex and consist of many
`
`“layers.” Id., ¶ 38. A POSITA could use “surface layer”—depending on context—to describe a
`
`gate oxide layer, a field oxide layer, the source and drains, mask layers, or any number of other
`
`layers that could be placed at a surface of the semiconductor device—none of which meet the
`
`spatial requirements of the claims because they are either above or within the active region. Id., ¶¶
`
`38-44 (explaining exemplary prior art4). For example, Silicon Processing for the VLSI Era (2000)
`
`(“Wolf”), a widely used textbook, uses “surface layer” to refer to various distinct layers deposited
`
`on the top of the semiconductor wafer, such as a silicon oxide layer. Id., ¶ 39 (citing Ex. N1 at 373
`
`(“Ion implantation can inject dopant atoms into a semiconductor by implantation through a thin
`
`surface layer (e.g., SiO2)”), 385 (“ion implantation is frequently performed through a thin surface
`
`layer (e.g., SiO2, Si3N4, or even a composite layer)”), 419-20 (describing implanting dopants
`
`through a mask or gate oxide layer on the silicon wafer surface)). But Wolf also uses “surface
`
`
`3 Nothing in the prosecution history sheds any additional light on this term. “Surface layer” was
`introduced into the claims nearly six years after the initial patent application was filed. Ex. G at
`164. Greenthread did not identify to the USPTO any “surface layer” in any embodiment described
`in the specification, nor did it describe any such layer at any point in prosecution. Ex. V, ¶¶ 35-36.
`
`4 E.g., Ex. V, ¶43 (discussing Ex. Z at 1; Ex. Y at 10:61-61 (“an ordinary surface layer such as a
`CMOS source/drain”); Ex. X at 3:14-16 (“an oxide surface layer thereon”); Ex. FF at 3:55-61
`(“channel surface layer”).”)).
`
`6
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 14 of 45
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`layer” in an entirely different context to refer to source, drains, and doping in the channel, which
`
`is part of the active region and below the silicon oxide layer discussed above. Ex. V, ¶ 40-41 (citing
`
`Ex. N1 at 358, 427-28; Ex. N3 at 291-295, 307; Ex. N4 at 192, 195). Thus, Wolf confirms that
`
`while “surface layer” may occasionally be used as shorthand, it has no generally accepted meaning
`
`in the field. Importantly, the claims’ usage of “surface layer” is inconsistent with Wolf’s examples
`
`of what a “surface layer” could be because none of the “surface layers” described in Wolf would
`
`satisfy the required spatial limitations of the claims since each is either above the active region or
`
`within the active region itself. Ex. V, ¶ 42. Consequently, Greenthread cannot rely on Wolf to
`
`provide context for the phrase “surface layer” as that term is used in the Asserted Patents. Here,
`
`the specification provides no relevant context thus rendering the term indefinite as used in the
`
`claims. Media Rts Techs., Inc. v. Cap. One Fin. Corp., 800 F.3d 1366, 1371 (Fed. Cir. 2015) (“[A]
`
`claim is indefinite if its language might mean several different things and no informed and
`
`confident choice is available among the contending definitions.”) (internal quotations marks
`
`omitted).
`
`“Surface layer” cannot mean “layer at the surface” in the context of the other
`
`limitations of the claims. To the extent that Greenthread’s “plain meaning” of “surface layer”
`
`amounts to nothing more than a “layer at the surface of the semiconductor device,” as suggested
`
`by the extrinsic evidence it has provided,5 such a generic meaning is incompatible with the
`
`requirements of the claim language and, indeed, underscores why this term is indefinite. Such a
`
`meaning is inconsistent with the claim language that paradoxically requires the “surface layer” to
`
`be disposed under the active region—sandwiched between the active region and the substrate—
`
`rather than at the surface of the semiconductor device. Where the claims themselves reveal
`
`
`5 See Ex. BB at 154, 234-239, 242, 266; Ex. CC at 209, 654, 1281, 1912, 2300.
`
`7
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`Dell Ex. 1019
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`Case 6:22-cv-00105-ADA Document 82 Filed 10/10/22 Page 15 of 45
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`contradictory positions as to the meaning of a claim term, as is the case here, the term is indefinite.
`
`TVnGO Ltd. (BVI) v. LG Elecs. Inc., 861 F. App’x 453, 457-460 (Fed. Cir. 2021) (holding related
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`dependent and independent claims invalid for indefiniteness where they dictated contradictory
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`meanings for a phrase, which necessarily “create[ed] confusion as to which reading is correct”).
`
`In short, “surface layer” has no discernable structure, location, dimensions, composition,
`
`or boundaries. Ex. V, ¶¶ 45-46. Yet it is the cornerstone of the claims used to define the location
`
`of all other elements. Without knowing what the “surface layer” is or what its location or
`
`boundaries are, a POSITA would not be reasonably certain where to deposit the claimed graded
`
`concentrations of dopants—the alleged novel feature—to practice the claims. The specification
`
`provides no guidance as to what differentiates a single drift layer from a surface layer—in terms
`
`of structure or composition. Id. Accordingly, a POSITA would be left to speculate whether a
`
`particular graded concentration of dopants is within a single drift layer or well region (as claimed)
`
`or whether it is within a surface layer (which is outside the scope of the claims). Id. The asserted
`
`claims of the ’195 and ’502 Patents and Claim 44 of the ’222 Patent are therefore indefinite.
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`Nautilus, 572 U.S. at 909 (A claim “must be precise enough to afford clear notice of what is
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`claimed, thereby ‘appris[ing] the public of what is still open to them.’”).
`
`B.
`
`“substrate”
`
`Claim Term
`
`“substrate”
`
`Defendants
`
`Greenthread
`
`“the initial material within
`which or on which the
`semiconductor device is
`fabricated”
`
`Plain Meaning
`
`Each of the asserted claims is directed to a semiconductor device having a “substrate.”
`
`While Greenthread proposes this term should be given its “plain and ordinary meaning,” it has not
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`stated what that meaning is. Instead, Greenthread merely takes issue with the use of the term
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`“initial” in Defendants’ construction, without providing a competing construction.6
`
`Whether the claimed “substrate” is directed to the “initial” material is a dispute concerning
`
`the scope of the claims that the Court must decide. O2 Micro Int’l. Ltd. v. Beyond Innovation Tech.
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`Co., Ltd., 521 F.3d 1351, 1362 (Fed. Cir. 2008). Defendants’ proposed construction is supported
`
`by the intrinsic evidence and consistent with the extrinsic evidence. In contrast, a construction that
`
`omits “initial” (as Greenthread implicitly proposes) could broaden this term to read on essentially
`
`any portion of a semiconductor device—including regions, wells, layers, or other structures formed
`
`while a device is being fabricated—which are not understood by a POSITA to be a “substrate.”
`
`Such a construction would be improper for several reasons.
`
`First, the claims themselves distinguish the “substrate” from other structures that are
`
`subsequently formed in a substrate, such as an “active region,” “well region,” “drift layer,” or
`
`“surface layer.”7 Because the claims use “different terms” to describe these subsequent structures,
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`it is “presume[d] that those . . . terms have different meanings” than “substrate.” See SIPCO, LLC
`
`v. Emerson Elec. Co., 794 F. App’x 946, 949 (Fed. Cir. 2019).
`
`Second, the specification confirms that the claimed substrate is the initial material
`
`providing the mechanical support “on which . . . devices are subsequently fabricated.” Ex. A, ’195
`
`Patent at 1:61-63. This characteristic distinguishes a substrate from the other structures (such as
`
`
`6 See, e.g., Ex. EE at 8-9.
`
`7 Ex. A, ’195 Patent, Cl. 1, Ex. B, ’502 Patent, Cl. 7, Ex. D, ’842 Patent, Cls. 1, 9; Ex. E, ’481
`Patent, Cls. 1, 20; Ex. C, ’222 Patent, Cls. 1, 21, 39, 41-42, 44; Ex. F, ’014 Patent, Cls. 1, 21.
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`wells, layers, or transistors) of a device.8 The initial substrate can be “a uniformly doped ‘bulk’
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`silicon substrate (as is commonly known in the semiconductor industry).”9 Or it can be an
`
`“epitaxial substrate” combining “‘bulk’ silicon” with a layer of “epitaxial silicon.”10 But it cannot
`
`be some other region, well, layer, transistor, or other structure formed later in the fabrication
`
`process. That is, the substrate is the foundation—the initial structure—on which devices are
`
`subsequently built.
`
`Lastly, Greenthread itself has previously confirmed that a “substrate” consists only of the
`
`initial material on which the semiconductor device is fabricated. In a prior IPR, both Greenthread
`
`and its expert witness identified just the initial material, and not any regions, wells, layers, or
`
`other structures that are later fabricated on or in that material, as the claimed “substrate”:
`
`
`
`
`
`
`
`See Ex. P at 29, 46-47 (“semiconductor substrate 16” in blue; “P-substrate” in yellow; Ex. Q, ¶¶
`
`40.11
`
`
`8 Ex. R at INTEL_GREENTHREAD00015553 (defining “substrate” as comprising the “physical
`material on which a microcircuit is fabricated”).
`
`9 Ex. W, U.S. Patent No. 8,106,481 at 2:58-60. U.S. Patent No. 8,106,481 is relevant intrinsic
`evidence because it names the same inventor and claims priority to the same parent application.
`
`10 See, e.g., id. at 2:58-63; Ex. E, ’481 Patent, Cls. 3; Ex. C, ’222 Patent, Cls. 3, 24; Ex. F, ’014
`Patent, Cls. 3, 24.
`
`11 See also Aylus Networks, Inc. v. Apple Inc., 856 F.3d 1353, 1362 (Fed. Cir. 2017) (“[s]tatements
`made by a patent owner during an IPR . . . can be considered for claim construction.”).
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`Conversely, the intrinsic evidence does not describe a region, well, layer, or other structure
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`formed later in the fabrication process as a “substrate.”12 A construction of “substrate” that permits
`
`this term to arbitrarily read on such structures would effectively read the term out of the claims.
`
`See SIPCO, 794 F. App’x at 949.
`
`C.
`
`“active region”
`
`Claim Term
`
`Defendants
`
`Greenthread
`
`“active region”
`
`“region that forms the current
`path of a device”
`
`Plain Meaning
`
`All asserted claims use the term “active region.” The parties agree that this term should be
`
`afforded its ordinary meaning but dispute whether the term requires construction. A POSITA at
`
`the time of the alleged invention would have understood that the active region of a semiconductor
`
`device is the region in which current flows when that device is active, or “turned on”—i.e., the
`
`region that forms the current path of a device. The claims distinguish this region from other
`
`claimed regions such as “well region.” Greenthread’s unspecified “plain meaning” construction
`
`fails to delineate for the jury the active region from these other claimed regions and fails to resolve
`
`the parties’ dispute concerning the scope of the term. See O2 Micro, 521 F.3d at 1361.
`
`The claims of the ’195 and ’502 Patents (and Claim 44 of the ’222 Patent) require “an
`
`active region including a source and a drain . . .,” as well as a “single drift layer” and a “well
`
`region,” both of which must contain “a graded concentration of dopants.” Ex. A, ’195 Patent at
`
`4:14-29; Ex. B, ’502 Patent at 4:55-67; Ex C, ’222 Patent at 8:24-40. The remaining claims require
`
`first and second “active region[s] . . . within which transistors can be formed” where at least one
`
`
`12 For example, the specification describes the “substrate” as being separate from the “active
`devices”/”transistors,” “well region”/”well,” and other “regions” or “layers” comprising the
`fabricated device. Ex. A, ’195 Patent at 1:50-51, 1:61-63, 2:16-22, 3:30-43, Figs. 2-5.
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`of the active regions contains a graded dopant concentration. Ex. A, ’842 Patent at 4:48-60; Ex. E,
`
`’481 Patent at 4:53-5:3; Ex C, ’222 Patent at 4:42-62; Ex. F, ’014 Patent at 4:54-5:7. Many of these
`
`claims also require a “well region” that contains another graded dopant concentration. Id. The
`
`specification also uses the term “active region,” which it distinguishes from an “isolation” region.
`
`See, e.g., Ex. A, ’195 Patent at Abstract; Ex. V, ¶ 55.
`
`During prosecution, Greenthread repeatedly used the term “active region” to describe the
`
`region