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394 SILICON PROCESSING FOR THE VLSI ERA
`
`where q is the electronic charge. Although µ depends strongly on the concentration of doping
`atoms and implantation damage, values of Rs have been tabulated utilizing known mobility
`data. 31 For a known dose, full electrical activity is reached when the predicted Rs is reached.
`Electrical activation of implanted impurities in amorphous layers proceeds differently than in
`layers with primary crystalline damage. As will be discussed, electrical activation in amorphous
`layers occurs as the impurities in the layer are incorporated onto lattice sites during recrys(cid:173)
`tallization. Electrical activation in crystalline damaged regions exhibits more complex behavior.
`For example, Fig. 10-20 shows the isochronal electrical activation behavior of implanted
`boron (i.e., anneals performed at varying temperatures, but for identical times). In this curve, the
`measured surface carrier concentration (normalized for different junction depths to the dose, in
`cm-2) is used to indicate the degree of activation. That is, when P1-1aiil<P = 1, full activation is
`reached. Note that other impurities exhibit similar behavior to that shown in Fig. 10-20,
`provided the implantation does not cause a continuous amorphous layer to be formed.
`The temperature range up to 500°C (Region 1 of Fig. 10-20) shows a monotonic increase in
`~ electrical activity. This is due to the removal of trapping defects and the concomitant large
`increase in free carrier concentration as the traps release the carriers to the valence or
`conduction bands. In Region 2 (500-600°C), substitutional B concentration actually decreases.
`This is postulated to occur as a result of the formation of dislocations at these temperatures.
`Some boron atoms that were already on substitutional sites are believed to precipitate on or near
`these dislocations. In Region 3 (>600°C), the electrical activity increases until full activation is
`achieved at temperatures -800 1000°C. The higher the dose, the more disorder, and the higher
`the final temperature required for full activation. At such elevated temperatures, Si self(cid:173)
`vacancies are generated. They migrate to the B precipitates, allowing boron to dissociate and fill
`the vacancy (i.e., a substitutional site).
`Activation of implanted impurities by rapid thermal processing (RTP, see Chap. 9) has also
`been studied. The time-temperature cycle to reach minimum sheet resistance for As, P, and B is
`~5-10 sec at 1000-1200°C, the exact condition being dependent on implanted species, energy,
`and dose. 33 ,34
`10.3.4.2 Annealing of Primary Crystalline Damage: Isolated point defects and point defect
`clusters (that predominantly occur during light ion implantation), and locally amorphous zones
`(that are typically observed from light doses of heavy ions), are both regions of primary
`crystalline damage that exhibit comparable annealing behavior. At low temperatures (up to
`-500°C}, vacancies and self-interstitials that are in close proximity undergo recombination,
`thereby removing trapping defects. At higher temperatures (500-600°C), as described above,
`dislocations start to form, and these can capture impurity atoms. Temperatures of 900-1000°C
`are required to dissolve these dislocations. Note that the activation energy of impurity diffusion
`in Si is always smaller than that of Si self-diffusion (see Chap. 9). Therefore, the ratio of defect
`annihilation to the rate of impurity diffusion becomes greater as the temperature is raised. This
`implies that the higher the anneal temperature the better, with the upper limit being constrained
`by the maximum allowable junction depth dictated by the device design. 30
`It is also important that the steps used to anneal implantation damage be conducted in a neu(cid:173)
`tral ambient, such as Ar or N2. That is, dislocations which form during annealing35 can serve as
`nucleation sites for oxidation induced stacking faults (OISF, see Chap. 2) if oxidation is carried
`out simultaneously with the anneal (i.e., the annealing is performed in an oxygen ambient).
`
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`396 SILICON PROCESSING FOR THE VLSI ERA
`
`Fig, 10·21 Solid phase regrowth of a 200 keV, 6xl0 15tcm2 antimony implantation at 525°C. TEM cross
`section micrograph. Courtesy of Institute of Physics, Conference Series. 36
`layer. The gives rise to optical interference effects from the light reflected off the subsurface
`damage layers and the surface.
`Some of the crystalline defects in the region beyond the amorphous layer are annealed out
`during subsequent thermal cycles, but others give rise to extended defects (such as dislocation
`loops and stacking faults), which then grow and interact. Under some implantation and
`annealing conditions, these defects move to the surface and eventually disappear, while in others
`they grow into larger structures which intersect the surface or remain in the bulk.
`In a large number of cases, the total number of "excess" Si atoms found in dislocation loops
`after thermal annealing fits a remarkably simple model. Even though hundreds to thousands of
`atoms are displaced from their positions in the Si lattice by each ion impact, the number of
`residual Si atoms left out of the lattice after the completion of thermal annealing increases with
`ion dose and is closely proportional to the number of ions. This is known as the "+l" model,
`where the number of excess Si interstitial atoms is equal to the number of implanted dopant
`atoms that occupy lattice sites after thermal annealing. 38 ,39 These Si interstitials arise from the
`dopant atom replacing the Si-atom in the lattice.
`10.3.f4.f4 Dynamic Annealing Effects: The heating of the wafer during implantation can impact
`the implantation damage and the effects of subsequent annealing. A rise in temperature
`increases the mobility of the point defects caused by the damage, and this gives rise to healing
`of damage even as the implant process is occurring, hence the name dynamic annealing. 40 In the
`case of light ions, sufficient damage healing may occur to prevent the formation of amorphous
`layers, even at very high implantation doses. In the case of heavy ion implantations, dynamic
`annealing can cause amorphous layer regrowth during the implantation step.
`A study by Prussin et al., 41 showed that the wafer cooling capability of an ion implanter can
`impact the structure of the damage following implantation because of dynamic annealing
`effects. That is, if a wafer is prevented from being significantly heated above room temperature
`by adequate heat sinking during implantation, dynamic annealing is minimized. On the other
`hand, if no heat sinking is provided and wafers are allowed to rise to temperatures ~150-300°C,
`dynamic annealing effects can produce changes in implantation damage structures. This
`typically occurs in non-reproducible and unwanted ways, such as the formation of buried
`amorphous layers, or crystalline layers containing high densities of dislocation loops.
`10.3.f4.5 Diffusion of Implanted Impurities: As described in Chap. 9, the diffusion of impurities
`in single-crystal Si is a complex phenomenon. The diffusion of impurities in implanted Si is
`
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