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`United States Patent
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`Phy
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`[15
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`[54]
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`[75]
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`[73]
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`[21]
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`[22]
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`[51]
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`[52]
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`[58]
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`Inventor:
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`Assignee:
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`INTEGRATED CIRCUIT HAVING A
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`PRE-ATTACHED CONDUCTIVE
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`MOUNTING MEDIA AND METHOD OF
`
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`MAKING THE SAME
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`William S. Phy, Los Altos Hills,
`Calif.
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`
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`Fairchild Semiconductor Corporation,
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`Cupertino, Calif.
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`
`
`Appl. No.: 516,019
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`Filed:
`Jul, 22, 1983
`Ent, C14 occ cc eccsscecesssceeseenessseeenenee HO01L 39/02
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`DLS. Cl. oeeccescceesscseeessecsnsesnreessees 357/80; 228/123;
`437/180
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`
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`Field of Search.................00 357/74, 81, 82, 70,
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`357/80; 228/123, 159, 160, 188; 29/590, 591,
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`589, 583, 739, 740; 428/620, 621, 624, 625, 626,
`634, 673
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`[11] Patent Number:
`
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`[45]. Date of Patent:
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`
`
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`4,688,075
`
`
`Aug. 18, 1987
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`4,451,971
`6/1984 Milgram cscsssssssscssesssecseun 29/591
`6/1984 Batinovich ......
`4,451,972
`vane 29/583
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`4,485,553 12/1984 Christian et al. v.ssccsessseesne 29/589
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`FOREIGN PATENT DOCUMENTS
`
`
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`833197
`1/1970 Canada sessssssessssssesssessssseee 357/16
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`1206759
`9/1970 United Kingdom .
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`2084399 4/1982 United Kingdom .
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`Primary Examiner—William L. Sikes
`Assistant Examiner—Frank Gonzalez
`
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`Attorney, Agent, or Firm—Stephen J. Phillips; David H.
`
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`Carroll; James M. Heslin
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`
`ABSTRACT
`[57]
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`A semiconductor wafer having a plurality of integrated
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`circuits is provided. One surface of the wafer includes a
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`plurality of electrical contacts on the circuits which are
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`subsequently attached to leads. The other surface of the
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`wafer is provided with a conductive tape. The waferis
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`cut, e.g., sawed, resulting in each individual circuit
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`having a pre-attached conductive mounting media. The
`individual circuits can then be attached to a substrate
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`through the conductive mounting media. Other em-
`bodiments are disclosed.
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`19 Claims, 11 Drawing Figures
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`
`[56]
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`
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`References Cited
`
`
`U.S. PATENT DOCUMENTS
`
`
`
`
`
`
`
`
`3,978,578
`9/1976 MUrphy .....ccsecesseectensosseees 29/590
`.
`3/1978 Bell et al.
`228/123
`
`
`
`
`
`4,293,587 10/1981 Trueblood 20...
`.cscsesssseseeees 29/590
`
`
`
`
`
`6/1983 Phy «ue
`ee 428/577
`4,390,598
`
`
`
`
`
`
`1/1984 Hulsewehh ........ essere 29/591
`4,423,548
`
`
`
`
`
`
` 4,078,711
`
`
`
`
`
`MICRON 1030
`
`MICRON 1030
`
`

`

`U.S. Patent Aug. 18, 1987
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`Sheetl of2
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`4,688,075
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`J»
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`LTCICIOOMOooDoog
`My Wir RAO
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`Sf a a
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` th" ee———ut
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`4
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`24
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`vn
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`FIG. 2B 2
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`4 (32
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`28
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`FIG.2C
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`Mane
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`26
`3
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`I2
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`32
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`26
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`21
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`27
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`28
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`2 40 og
`FIG.20 0
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`"32
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`°8
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`MICRON 1030
`
`MICRON 1030
`
`

`

`U.S. Patent Aug. 18, 1987
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`Sheet2 of2
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`4,688,075
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`FIG. 3A
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`FIG. 3B
`FIG. 4
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`MICRON 1030
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`MICRON 1030
`
`

`

`
`1
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`4,688,075
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`INTEGRATED CIRCUIT HAVING A
`
`
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`PRE-ATTACHED CONDUCTIVE MOUNTING
`
`
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`MEDIA AND METHOD OF MAKING THE SAME
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`2
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`conductive mounting media attached thereto with the
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`media comprising a portion of the electrically conduc-
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`tive tape.
`BRIEF DESCRIPTION OF THE DRAWINGS
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`For better understanding of the invention, reference
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`may be had to the following description, taken in con-
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`junction with the accompanying drawings, wherein:
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`FIG. 1 is a view of a tape comprising a carrier film
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`having leads positioned above an integrated circuit
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`prior to attaching the integrated circuit to a substrate.
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`FIGS. 2A-2Darepartial elevational viewsillustrat-
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`ing one form ofthe present invention in whichtheinte-
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`grated circuit shown in FIG. 1 is attached to the sub-
`strate.
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`FIGS. 3A-3E are schematic views showing one form
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`of integrated circuit assembly sequence to which the
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`present invention relates.
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`FIG. 4 is an isometric view showing one form of the
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`present invention in which an electrically conductive
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`tape is attached to a semiconductor wafer.
`DETAILED DESCRIPTION
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`Referring to FIG. 1, a tape 10 comprisesa plurality of
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`electrically-conductive leads 12 laminated to the under-
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`side (as viewed in FIG. 1) of a carrier film 14. The leads
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`12 are typically formed from copper, and conventional
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`circuit board processes are used to etch.a copper layer
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`laminated to the film 14 into the desired pattern ofleads.
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`The film 14 is typically formed from glass fiber or a
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`synthetic polymer. It is desirable that the polymer be
`heat and chemical resistant to withstand the various
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`processing steps required in formation of the tape and
`connection of the leads 12 to electrical contacts on a
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`surface 26A of an integrated circuit 26. Preferred poly-
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`mers include Mylar° (polyester), and polyvinyl chlo-
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`ride. Particularly preferred are polyimides. The film 14
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`includes sprocket holes 16 along both edges for use in
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`advancement andregistration of the film.
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`The tape 10 includes a plurality of frames 20 defined
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`by a central opening 22 penetrating thecarrier film 14 at
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`a location typically mid-way between the edges. The
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`frame 20 is further defined by the plurality of leads 12
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`which encompassthe periphery of the opening 22, each
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`extending inward a short distance into the opening. As
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`will be described in more detail hereinafter, the portion
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`24 of each lead 12 which extends into the opening 22 is
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`eventually bonded to the electrical contacts of inte-
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`grated circuit die 26 when the die is brought into posi-
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`tion beneath the opening 22.
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`Referring to FIGS. 2A-2D,the opposing surface 26B
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`of the integrated circuit die 26 is attached to a substrate
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`28 in a multi-step operation, as will now be described.
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`Initially, the integrated circuit 26 is held in a wax
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`form 30,as illustrated in FIG. 2A. The integrated cir-
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`cuit 26 is brought into contact with the tape 10 at the
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`appropriate frame 20 so that the outer portions 24 ofthe
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`leads 12 contact bumps 32 formed on the upper surface
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`26A (as viewed in the Drawings) of the circuit'26. Al-
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`though only a single lead 12 and bump32 areillustrated
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`in FIGS. 2A-2D,it is to be understood that the surface
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`26A of the integrated circuit 26 includes a plurality of
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`bumps 32 corresponding to the number ofelectrical
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`contacts in the particular integrated circuit, and that for
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`the most part each bump 32 will have a corresponding
`electrical lead 12 to which it will be attached. The
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`bumps 32 are typically formed from a gold/tin alloy
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`— 5
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`40
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`BACKGROUND OF THE INVENTION
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`The present invention relates generally to packages
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`for integrated circuits, and more particularly to such
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`packages in which a surface of the integrated circuit is
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`provided with a pre-attached conductive mounting
`media.
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`In the manufactureof integrated circuits, wafers con-
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`taining many separate integrated circuits are fabricated
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`and then cut into individual circuits, often individually
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`referred to as die. Each die is individually packaged,
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`using any one of a variety of known techniques. During
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`packaging,electrically conductive leads are attached to
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`electrical contacts of the die by well known techniques,
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`such as wire bonding or tape automated bonding. A
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`particularly desirable lead attachment techniqueis dis-
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`closed in my copending application of Ser. No. 365,686,
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`filed Apr. 5, 1982, now U.S. Pat. No. 4,390,598, entitled
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`“Lead Format For Tape Automated Bond”, assigned to
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`the assignee of the current application and herebyincor-
`25
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`porated by reference. After the assembly of the die and
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`the conductive leads is completed, the resulting assem-
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`bly is then usually encapsulated in epoxy or some other
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`enclosure for protection.
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`Referring more particularly to the typical die, one
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`surface of the die includes a plurality of the electrical
`contacts to which these leads are attached while the
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`opposing surface of the die is generally conductively
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`bonded to a substrate by conventional means. For ex-
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`ample, as described in my previously mentioned co-
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`pending patent application, one technique is to employ
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`a thin layer of conductive polymide paste placed on the
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`substrate and then apply heat to cure the paste and
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`attach the die to the substrate. Thus, although the elec-
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`trical connections necessary on oneside of the die can
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`be made simply and in an automated fashion, the steps
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`involved in attaching the die to the substrate, often
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`referred to as die-attach, are not easily automated. In
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`this connection, it has been found that, in addition to
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`presenting risk of failure, the steps of dispensing and
`45
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`applying liquid or paste are difficult to automate.
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`Accordingly, it is a general object of this invention to
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`provide an improved die-attach method and structures
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`made by such method.
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`Another object of the present invention is to provide
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`such a die-attach method which avoids problemsassoci-
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`ated with the steps involvedin the use of paste orliquid
`die-attach media.
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`Another object of this invention is to provide a die-
`attach method which can be automated.
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`355
`SUMMARYOF THE INVENTION
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`In one form ofthe invention, a methodis provided for
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`attaching a conductive mounting media to an integrated
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`circuit. The method includes a step of providing a semi-
`60
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`conductor wafer including a plurality of integrated
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`circuits therein. The wafer has a pair of opposing major
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`surfaces with one of the surfaces including a plurality of
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`electrical contacts for each of the integrated circuits.
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`The method includesthe step of attaching the other of
`65
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`the major surfaces of the wafer to a first surface of an
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`electrically conductive tape. The method includes the
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`step of separating individual ones of the integrated cir-
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`cuits, wherein each of the individual ones includes the
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`MICRON 1030
`
`MICRON 1030
`
`

`

`4,688,075
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`35
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`20
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`3
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`which may be thermally bonded to the leads 12 in a
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`conventional manner, typically by thermocompression,
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`ultrasonic, eutectic or reflow solder techniques. The
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`heat from the bonding will melt the wax form 30 and
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`allow the tape 10-to carry the die 26 upward and away.
`After the contacts on the surface 26A of the inte-
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`grated circuit 26 have been bonded tothe leads 12, and
`before the circuit is attached to the substrate 28 in ac-
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`cordance with one form of the present invention, the
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`circuit may be tested by a conventional
`techniques.
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`Testing at this stage of assembly is particularly conve-
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`nient since thecircuits are still mounted on the tape and
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`may be sequentially screened as part of the assembly
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`procedure. Moreover, the circuits have been bonded to
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`the lead frame and any damage which may have re-
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`sulted from such handling and bonding will be uncov-
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`ered in the screening.
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`After the integrated circuit 26 has been tested and
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`found functional, the surface 26B of the circuit 26 is
`attached to the substrate 28 to form a conventional
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`package. Exemplary materials for the substrate 28 in-
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`cludeelectrical insulators, e.g., aluminum oxide, beryl-
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`lium oxide, as well as electrical conductors, e.g., metals
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`and alloys, such as copper alloys; KOVARTM. As
`25
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`shownin FIG. 2B,the circuit 26 is broughtinto position
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`so that it lies adjacent the proper position on the sub-
`strate 28 and is attached thereto. In accordance with
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`one form ofthe present invention, the surface 26B of the
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`integrated circuit 26 is provided with a pre-attached
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`conductive mounting media 27 which is preferably in
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`the form of a solid material. The media 27 preferably
`has a thickness from about0.5 mils to 3.0 mils. Preferred
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`materials for the conductive mounting media 27 include
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`polymides, particularly polymides having a noble metal,
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`e.g., silver, content such that the media 27 exhibits, or
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`can be altered to exhibit an electrical resistivity of less
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`than 100 m ohm/square.
`:
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`Then,the entire assembly shown in FIG.2B is heated
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`40
`and,if desired, pressure is applied to encourage attach-
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`mentof the integrated circuit 26 to the substrate 28. For
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`example, for a conductive polymide media 27, heating
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`may bein the range of about 250° C. to about 350° C.
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`and applied pressure may be in the range of about 20 to
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`about 40 gm/cm?.
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`Conveniently, before the assembly of the substrate 28
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`and the die 26 is heated, the leads 12 will be formed
`downward and attached to the substrate 28, as illus-
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`trated in FIG. 2C. The outer portions of the leads 12 are
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`attached to the substrate 28 by conventional means,
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`typically using gold-tin reflow techniques. It is pre-
`ferred to form the leads 12 and attached both the leads
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`and the die 26 to the substrate 28 in a single step, al-
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`though the order and mannerof attaching the various
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`components is not critical. Stretch loops 40 are pro-
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`vided in the inner portions 24 of each lead 12 to accom-
`modate the downward movementof the leads 12 when
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`attached to the substrate. Particularly preferable is the
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`stretch loop configuration described in my previously
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`referred to copending application.
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`After the outer portions 12 have been attached to the
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`substrate 28, the carrier film is excised, leaving the as-
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`sembly shownin FIG. 2D.
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`An advantage ofthe use of the pre-attached conduc-
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`tive mounting media as described aboveis that the con-
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`ventional die-attach steps dealing with liquid or paste
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`are unnecessary. Thus, in combination with the tape
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`automated bond of my previously preferred application,
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`4
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`a packaging assembly is provided whichis highly auto-
`mated.
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`The pre-attached conductive mounting media struc-
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`ture and method ofthe present invention are generally
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`applicable to integrated circuit packaging.
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`For example,
`in the conventional integrated circuit
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`assembly sequence shown schematically in FIGS.
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`the integrated circuit can be provided with
`3A-3E,
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`pre-attached conductive mounting media in accordance
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`with the present invention. Moreparticularly, as shown
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`in FIG. 3A, a semiconductor wafer 100 is provided and
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`includes a plurality of integrated circuits 126 therein.
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`After testing the individual circuits 126, the circuits are
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`separated, e.g., through sewing, as shown in FIG. 3B.
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`Next, the individual circuits 126 are attached through
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`their conductive mounting media 127 to a substrate 128
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`having. a plurality of electrical contacts 112, 113, as
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`shown in FIG. 3C. Next, leads 115 are provided for
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`connecting the contacts 112, 113 to the corresponding
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`contacts ofthe integrated circuit 126, as shown in FIG.
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`3D. Finally, the assembly is provided with encapsula-
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`tion 130, as shown in FIG.3E.
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`In accordance with one form of the present inven-
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`tion, a preferred manner of providing the pre-attached
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`. conductive mounting media 127 shownin FIG.3Cis to
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`provide the media 127 to the rear surface of the wafer
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`100 such that, after the separating step shown in FIG.
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`3B, each individual circuit
`then includes the pre-
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`attached conductive mounting media 127.
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`Moreparticularly, as shown in FIG. 4, the rear major
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`' surface 100B of the wafer 100 (previously shown in
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`FIG. 3A)is attached to a first major surface 127A of
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`conductive mounting media 127 which is preferably in
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`the form ofa tape. Preferably, for ease of handling, the
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`major surfaces 127A, 127B are each greater in area than
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`the major surface 100B of the wafer 100. For ease of
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`handling, it is desirable to have the other major surface
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`127B of the tape removably attached to a carrier film
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`130. Exemplary carrier films include materials such as
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`‘polyolefine and poly-vinyl-chioride. Of course,
`the
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`conductive tape 127 should exhibit a release characteris-
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`tic wherein it is relatively more strongly attached to the
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`wafer 100 and less strongly attached to the carrier film
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`130. When the structure shownin FIG. 4Ais separated,
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`e.g., sawed, each ofthe resulting integrated circuits 126
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`are provided with conductive mounting media attached
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`thereto. That is, the remaining portion of conductive
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`tape 127 is the conductive mounting media.
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`In the attaching of the tape 127 to the wafer 100,if the
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`tape is a conductive polymide, it is generally desirable
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`to apply sufficient heating to encouragea strong attach-
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`ment as well as to cause the polyimide to develop a
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`desired electrical conductivity. Typically, this heating
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`may be in the range of about 250° C. to about 375° C.
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`While the present invention has been described with
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`reference to specific embodiments thereof, it will be
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`obvious to those skilled in the art that various changes
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`and modifications may be made without departing from
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`the inventionin its broader aspects. It is contemplated in
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`the appendedclaims to coverall variations and modifi-
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`cations of the invention which come within the true
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`spirit and scope of my invention.
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`Whatis claimed as new and desired to be secured by
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`Letters Patent of the United Statesis:
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`i. A semiconductor body comprising:
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`an integrated circuit obtained from a semiconductor
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`wafer, wherein a major surface of said integrated
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`60
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`MICRON 1030
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`MICRON 1030
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`

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`5
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`circuit consists of a portion of a major surface of
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`said wafer; and
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`an electrically conductive mounting medium at-
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`tached to the major surface of said integrated cir-
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`cuit, said conductive mounting medium being ob-
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`tained from an electrically conductive tape at-
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`tached to the major surface of said wafer.
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`2. A semiconductor body as in claim 1, wherein said
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`conductive tape comprises polymide.
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`3. A semiconductor body as in claim 2, wherein said
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`conductive tape comprises a noble metal.
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`4. A semiconductor body as in claim 1, wherein said
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`conductive tape comprises polymide andsilver.
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`5. A method of attaching a conductive mounting
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`media to an integrated circuit, comprising the steps of:
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`(a) providing a semiconductor wafer including a plu-
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`rality of integrated circuits therein, said wafer hav-
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`ing a pair of opposing major surfaces, one of the
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`surfaces including a plurality of electrical contacts
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`for each of the integrated circuits;
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`(b) attaching the other of the major surfaces of the
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`wafer to a first major surface of a preformed elec-
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`trically conductive tape; and
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`(c) separating individual ones of the integrated cir-
`cuits wherein each of said individual ones includes
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`conductive mounting media attached thereto with
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`said media comprising a portion ofthe electrically
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`conductive tape.
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`6. A method in accordance with claim 5 in which the
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`electrically conductive tape includes a second major
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`surface which is removably attached to a carrier film.
`7. A method im accordance with claim 6 in which the
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`conductive tape has a release characteristic whereinit is
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`relatively more strongly attached to the first major
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`—_ 0
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`— 5
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`20
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`25
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`4,688,075
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`6
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`surface of the wafer and less strongly attached to the
`carrier film.
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`8. A method in accordance with claim 6 in which the
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`conductive tape comprises polymide.
`9. A method in accordance with claim 6 in which the
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`conductive tape comprise polymide and a noble metal.
`10. A method in accordance with claim 5 in which
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`the step of separating individual ones of the integrated
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`circuits comprises sawing.
`11. A method in accordance with claim 8 which in-
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`cludes the step of curing the polymideto obtain a prede-
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`terminedresistivity.
`12. A method in accordance with claim 6 in which
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`the carrier film comprises polyolefine.
`13. A method in accordance with claim 6 in which
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`the carrier film comprises poly-viny]-chloride.
`14. A method in accordance with claim 5 in which
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`the major surfaces of the tape are each greater in area
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`than the other major surface of the semiconductor wa-
`fer.
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`-15. A method in accordance with claim 14 which
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`includes the step of attaching the individual ones of the
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`integrated circuits to a substrate through the conductive
`media attached thereto.
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`16. A method in accordance with claim 15 in which
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`the substrate comprises an insulating material.
`17. A method in accordance with claim 16 in which
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`the substrate comprises aluminum oxide.
`18. A method in accordance with claim 15 in which
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`the substrate comprises a conducting material.
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`19. An integrated circuit made by the method of
`claim 5,
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`*
`*
`*
`x*
`*
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`30
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`45
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`50
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`35
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`60
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`65
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`MICRON 1030
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`MICRON 1030
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`