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` UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`APPLE INC.,
`Petitioner,
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`v.
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`Zentian Limited
`Patent Owner.
`____________________
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`Case IPR2023-00037
`Patent No. 10,971,140
`____________________
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`PATENT OWNER’S PRELIMINARY RESPONSE
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`IPR2023-00037
`PATENT OWNER’S PRELIMINARY RESPONSE
`TABLE OF CONTENTS
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`I. Introduction
`II. Background of the ’140 Patent
`III. Person of ordinary skill in the art
`IV. Claim construction
`V. The Board should deny institution under Fintiv
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`1
`2
`2
`2
`3
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`4
`A. Fintiv factors 1-5 favor denial of institution
`B. Fintiv factor 6 requires a “compelling” challenge, which the Petition does
`6
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`not present
`VI. An ordinary artisan would not have been motivated to substitute Chen’s
`supercomputer processing architecture in place of Jiang’s conventional processor
`for a personal computer
`VII. The Petition fails to demonstrate obviousness as to a shared acoustic model
`14
`memory containing acoustic model data for a cluster of processors
`VIII. The Petition fails to demonstrate obviousness as to “each of the plurality of
`processors [being] configured to compute a probability,” as recited in 1(c)
`18
`IX. Conclusion
`21
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`6
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` IPR2023-00037
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`PATENT OWNER’S PRELIMINARY RESPONSE
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`EXHIBIT LIST
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`
`Description
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`Intentionally Left Blank
`Declaration of Deliang Wang, Ph.D in support of Patent
`Owner’s Preliminary Response
`Zentian Ltd. v. Apple. Inc., No. 6:22-cv-00122-ADA, Apple’s
`Preliminary Invalidity Contentions
`Zentian Ltd. v. Apple. Inc., No. 6:22-cv-00122-ADA,
`Scheduling Order
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`Exhibit No.
`2001
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`2002
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`2003
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`2004
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`IPR2023-00037
`PATENT OWNER’S PRELIMINARY RESPONSE
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`I.
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`Introduction
`To meet the claims of the ’140 patent, the Petition argues that it would have
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`been obvious to substitute the clustered processor and memory architecture from
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`one specific embodiment in Chen—which requires at least eight processors in four
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`clusters with four memories—in place of Jiang’s processor.
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`But the Petition omits to address that Jiang’s “exemplary system” in its
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`“Preferred Embodiment” is a “general purpose computing device in the form of a
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`conventional personal computer 20,” with a conventional CPU, Ex. 1004, 5:4-7,
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`whereas Chen’s highly complex eight-processor four-memory clustered design is
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`for a supercomputer. Ex. 1005, 4:4-5, 4:57-5:6, 1:29-31.
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`As this Preliminary Response demonstrates, there was nothing “obvious”
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`about replacing Jiang’s conventional personal computing hardware with Chen’s
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`supercomputer processing and memory architecture, and an ordinary artisan would
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`not have been motivated to make such a fanciful combination.
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`Nor would an ordinary artisan have been motivated to implement Jiang’s
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`speech recognition teachings using Chen’s supercomputer processors and
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`memories. An ordinary artisan would have understood that Jiang’s CPU-based
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`speech recognition system was not suited for combination with Chen’s parallel
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`processing system.
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` IPR2023-00037
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`PATENT OWNER’S PRELIMINARY RESPONSE
`Moreover, beyond simply combining Jiang’s teachings with Chen’s
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`hardware, the Petition relies on further modifications to the combination of Jiang
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`and Chen in order to meet specific requirements of the challenged claims. Those
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`modifications, however, are not supported by any motivation; instead, they are
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`simply hindsight-driven reconstructions of the challenged claims.
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`The Petition thus fails to demonstrate a reasonable likelihood of success, and
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`falls well short of the much more stringent “high likelihood” of success that the
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`Board should apply here in view of Fintiv and recent precedents.
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`II. Background of the ’140 Patent
`U.S. Patent 10,971,140, titled “Speech recognition using parallel
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`processors,” is directed to an improved speech recognition circuit that “uses
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`parallel processors for processing the input speech data in parallel.” Ex. 1001,
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`1:18-20. The ’140 patent teaches multiple processors “arranged in groups or
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`clusters,” with each group or cluster of processors connected to one of several
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`“partial lexical memories” that “contains part of the lexical data.” Ex. 1001, 3:13-
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`18. “Each lexical tree processor is operative to process the speech parameters using
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`a partial lexical memory and the controller controls each lexical tree processor to
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`process a lexical tree corresponding to partial lexical data in a corresponding
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`partial lexical memory.” Ex. 1001, 3:19-24. The ’140 patent further teaches that
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`the invention “provides a circuit in which speech recognition processing is
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`performed in parallel by groups of processors operating in parallel in which each
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`group accesses a common memory of lexical data.” Ex. 1001, 3:62-66.
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`III. Person of ordinary skill in the art
`For purposes of this Preliminary Response, Patent Owner does not dispute
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`the Petition’s proposed level of skill for a person of skill in the art (“POSA”),
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`because the level of skill in the art is not necessary for addressing any disputes
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`between the parties.
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`IV. Claim construction
`The Petition does not propose any particular claim constructions and raises
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`no claim construction issues.
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`Patent Owner’s arguments in this Preliminary Response are based on the
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`plain and ordinary meaning of the words of the claims themselves in view of the
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`associated teachings of the specification. However, to the extent the Board views
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`Patent Owner’s arguments as resting on claim construction positions, the bases for
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`such positions are set forth in the corresponding argument sections below.
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`V. The Board should deny institution under Fintiv
`Whereas inter partes review was created “to establish a more efficient and
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`streamlined patent system that will improve patent quality and limit unnecessary
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`and counterproductive litigation costs,” “[p]arallel district court and AIA
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`proceedings involving the same parties and invalidity challenges can increase,
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`rather than limit, litigation costs.” USPTO Memorandum, Interim Procedure for
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`Discretionary Denials in AIA Post-Grant Proceedings with Parallel District Court
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`Litigation (“Guidance Memo”) (June 21, 2022), at 1.
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`In considering whether to institute an inter partes review proceeding where
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`there is a parallel district court litigation, the Board considers the following six
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`factors set forth in Apple Inc. v. Fintiv, Inc., IPR2020-00019, Paper 11 (PTAB
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`Mar. 20, 2020) (precedential):
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`1. Whether the court granted a stay or evidence exists that one may be
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`granted if a proceeding is instituted;
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`2. Proximity of the court’s trial date to the Board’s projected statutory
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`deadline for a final written decision;
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`3. Investment in the parallel proceeding by the court and the parties;
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`4. Overlap between issues raised in the petition and in the parallel
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`proceeding;
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`5. Whether the petitioner and the defendant in the parallel proceeding are
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`the same party; and
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`6. Other circumstances that impact the Board’s exercise of discretion,
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`including the merits.
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`Fintiv factors 1-5 favor denial of institution
`A.
`Factor 1: The patent at issue in this IPR is the subject of pending litigation in
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`Zentian Ltd. v. Apple, Inc., C.A. No. 6:22-cv-00122-ADA (W.D. Tex.). No stay
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`has been granted, and neither party has sought a stay to the extent this proceeding
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`is instituted.
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`Factors 3 and 5: The parties in the district court case are the same as the
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`parties in this proceeding. That case has continued to proceed since the Petition in
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`this proceeding was filed, and will continue to proceed. The parties have
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`exchanged proposed claim constructions, have completed claim construction
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`briefing, and are awaiting a Markman hearing. Preliminary infringement and
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`invalidity contentions have also been exchanged. Fact discovery will commence on
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`March 24, 2023, and the parties are completing discovery on Apple’s pending
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`motion to transfer to the Northern District of California.
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`Factor 4: Apple’s preliminary invalidity contentions in the district court case
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`rely on Jiang, Chen, Lucke, Robinson, and Wrench, which are all of the references
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`at issue in this IPR. Compare Pet. 6 with Ex. 2003 at 26, 27-28.
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`Factor 2: A trial date has tentatively been set for April 22, 2024, and will
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`more definitively be set after the Markman hearing. Ex. 2004 at 5. By contrast, the
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`Board’s Institution Decision in this proceeding is not due until June 15, 2023,
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`placing the Board’s projected final written decision date at June 15, 2024—several
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`months after the tentative trial date in the district court proceeding. Accordingly,
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`there is a high likelihood that a final written decision in this inter partes review
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`would come later than a decision in the district court litigation, and that the
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`Board’s decision would merely address the same prior art and issues raised in the
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`district court.
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`Accordingly, Fintiv factors 1-5 favor discretionary denial.
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`B.
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`Fintiv factor 6 requires a “compelling” challenge, which the
`Petition does not present
`Because Fintiv factors 1-5 favor discretionary denial, the Board must
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`consider whether the Petition presents “compelling merits.” Commscope Techs.
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`LLC v. Dali Wireless, Inc., IPR2022-01242, Paper 23 at 4 (Feb. 27, 2023)
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`(precedential).
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`“The compelling merits standard is a higher standard than the standard for
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`institution set by statute.” Id. at 3. To meet the “compelling merits” standard, the
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`Petition must demonstrate that it is “highly likely that the petitioner would prevail
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`with respect to at least one challenged claim.” Id. at 3-4 (emphasis added).
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`As this Preliminary Response demonstrates, the Petition fails to demonstrate
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`even a reasonable likelihood of success, much less the “high likelihood” of success
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`standard that the Board should apply in view of Fintiv and Commscope.
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`VI. An ordinary artisan would not have been motivated to substitute Chen’s
`supercomputer processing architecture in place of Jiang’s conventional
`processor for a personal computer
`Claim 1 of the ’140 patent is the sole challenged independent claim in this
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`proceeding. Limitations 1(a) recites “one or more clusters of processors, each of
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`the one or more clusters of processors comprising: a plurality of processors.” Pet.
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`66. Jiang does not teach one or more clusters of processors, as the Petition admits.
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`Pet. 14. To fill that gap, the Petition instead looks to Chen. Pet. 15. The Petition
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`proposes to “substitute[]” Chen’s processing architecture, shown below, in place of
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`Jiang’s disclosed processor. Pet. 19; Ex. 1004, Fig. 4 (annotated).
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`The Petition’s combination, however, fails to address or even consider the
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`highly disparate contexts of Chen and Jiang’s systems, and the fundamental
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`incompatibility of Chen’s processing architecture as a substitute for Jiang’s
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`processor. Ex. 2002 ¶ 25.
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`Jiang teaches that, in its “Preferred Embodiment,” “an exemplary system for
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`implementing the invention includes a general purpose computing device in the
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`form of a conventional personal computer 20, including processing unit 21. . . .”
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`Ex. 1004, 5:4-7; Ex. 2002 ¶ 26. Jiang likewise repeatedly refers to “personal
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`computer 20” throughout its disclosure as the “exemplary system” in which its
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`speech recognition teachings are to be implemented and usable. Ex. 1004, 5:13-16,
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`5:27-30, 5:44-46, 5:55-58, 6:6-10, 6:12-15, 6:28-31, 6:39-42; Ex. 2002 ¶ 26.
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`Indeed, Jiang specifically teaches: “tree search engine 74 is preferably
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`implemented in CPU 21,” which is the CPU shown for personal computer 20, “or
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`may be performed by a dedicated speech recognition processor employed by
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`personal computer 20.” Ex. 1004, 6:39-42; Ex. 2002 ¶ 26. An ordinary artisan
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`would have known at the time that Jiang’s CPU 21 for a conventional personal
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`computer would have been of the nature of the Intel and AMD personal computer
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`processors that dominated the market through the late 1990s and early 2000s. Ex.
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`2002 ¶ 26. An ordinary artisan would have likewise understood that Jiang’s
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`reference to “a dedicated speech recognition processor” referred to another
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`processor of the same nature as the Intel or AMD processor that would have served
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`as CPU 21, or else a digital signal processor of the type sold by Texas Instruments
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`at the time. Ex. 2002 ¶ 26. And While Jiang teaches that CPU 21 in personal
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`computer 20 “may include one or more processors,” Ex. 1004, 6:39-41, an
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`ordinary artisan would have understood that teaching to refer to the possibility of
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`using multiple hardware processors included in a conventional personal computer
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`at the time to form CPU 21. Ex. 2002 ¶ 26.
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`Chen, by contrast, is a patent disclosed by Cray Research, which was known
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`at the time as a leading designer of cutting edge, extremely expensive and complex
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`supercomputing systems. Ex. 1005 at 1 (“Assignee”); Ex. 2002 ¶ 27. Indeed, Chen
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`expressly refers to the “original supercomputer developed by the assignee of the
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`present invention.” Ex. 1005, 4:4-5; Ex. 2002 ¶ 17. Moreover, the Chen reference
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`is expressly directed towards improving upon the prior supercomputers developed
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`by Cray and others. Ex. 1004, 4:57-5:6; Ex. 2002 ¶ 27. Indeed, Chen expressly
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`states “[t]he present invention relates generally to parallel processing computer
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`systems for performing multiple-instruction-multiple-data (MIMD) parallel
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`processing.” Ex. 1004, 1:29-31. A person of ordinary skill would have understood
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`that “parallel processing computer systems for performing . . . MIMD parallel
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`processing” at the time were supercomputers, not conventional personal
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`computers. Ex. 2002 ¶ 27. Moreover, while Chen teaches that its disclosed parallel
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`processing computer system could be built using “commercially [sic] single chip
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`microprocessors, as well as commercially available memory chips,” Ex. 1005,
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`10:18-21, Chen’s system would have nonetheless required four clusters of
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`processors, each cluster containing at least two processors, and each cluster
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`connected to a dedicated cluster shared memory, with multiple clusters also
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`adjacently interconnected to another cluster’s memory. Ex. 1005, 9:10-19; Ex.
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`2002 ¶ 27. In other words, Chen’s system required at least eight processors and
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`four cluster shared memories, as well as complex intra-connections and
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`interconnections between the processors themselves, the processors to various
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`memories, and the memories to one another. Ex. 2002 ¶ 27. An ordinary artisan
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`would have understood that, even using commercially available processors and
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`memory chips, Chen’s architecture would have entailed far greater cost,
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`complexity, and hardware space requirements than what would have been suitable
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`for a conventional personal computer at the time. Ex. 2002 ¶ 27.
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`Indeed, in the late 1990s and early 2000s, the costs of processors and
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`memories were generally known to be the most significant cost categories for
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`personal computers. Ex. 2002 ¶ 28. Thus, for instance, an ordinary artisan would
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`have understood that adding seven more processors and three more memories and
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`creating the necessary interconnections to form Chen’s supercomputer architecture
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`in the context of a personal computing device would have rendered the resulting
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`computing system cost prohibitive for the general public, and thus for the vast
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`majority of automatic speech recognition customers. Ex. 2002 ¶ 28.
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`Moreover, successfully modifying a standard personal computer to
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`implement Chen’s supercomputer processor and memory architecture would have
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`required a level of expertise in parallel computer design that would have exceeded
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`the qualifications that the Petition has identified for the person of ordinary skill in
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`the art. Ex. 2002 ¶ 29. As Dr. Wang explains, ordinary artisans in the field of
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`speech recognition, many of whom he has taught and trained, do not have the
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`expertise to design parallel computing systems of the type taught in Chen. Ex.
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`2002 ¶ 29. Besides processors and memories, such a design would have to address
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`core hardware issues such as registers, busses, controllers, communication
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`protocols, and even cooling fan systems. Ex. 2002 ¶ 29. Such knowledge is not
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`necessary or even particularly relevant to an ordinary artisan in the field of
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`automatic speech recognition. Ex. 2002 ¶ 29. Indeed, even an eminent scholar in
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`the field of automatic speech recognition such as Dr. Wang would not have the
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`expertise to implement Chen’s teachings if asked to modify a personal computer to
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`realize Chen’s parallel processing architecture. Ex. 2002 ¶ 29. Notably, parallel
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`processing is a computer systems area that is distinct from the signal processing
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`and machine learning area where speech recognition belongs. Ex. 2002 ¶ 29.
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`Given that Jiang was expressly directed to “a general purpose computing
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`device in the form of a conventional personal computer 20,” Ex. 1004, 5:4-7, an
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`ordinary artisan would not have been motivated to substitute Jiang’s generic
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`“processing unit 21”/”CPU 21” with the Cray supercomputer “parallel processing
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`computer systems for performing . . . MIMD parallel processing” disclosed in
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`Chen. Ex. 1005, 1:29-31; Ex. 2002 ¶ 30. By way of analogy, such a modification
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`would have been akin to replacing a conventional engine in a conventional
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`automobile with the engine from a Formula One car. Ex. 2002 ¶ 30. Although such
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`a modification would appear on the surface to promise to make the conventional
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`car faster, there is nothing obvious about it, and the potential motivation of “more
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`speed” is not ultimately a motivation to make such a substitution because a
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`Formula One engine is fundamentally unsuitable for use with a conventional
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`commercially available automobile. Ex. 2002 ¶ 30.
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`In the same vein, while replacing a conventional computer processor with a
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`highly complex supercomputer processing architecture may superficially seem
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`poised to make the conventional computer “faster,” an ordinary artisan would have
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`known that such a substitution is anything but “obvious” and would make no
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`sense. Ex. 2002 ¶ 30. Simply put, an ordinary artisan would not have been
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`motivated to implement Jiang’s speech recognition teachings, which were intended
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`for the computing environment of a generic personal computer, using Chen’s
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`eight-processor, four-memory, multiple-instruction-multiple-data parallel
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`processor. Ex. 2002 ¶ 30. Such a combination would have been the work of a
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`highly unusual artisan using highly unordinary creativity, not the work of an
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`ordinary artisan using ordinary creativity, as obviousness requires. Ex. 2002 ¶ 29.
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`Moreover, an ordinary artisan would have understood that Chen’s parallel
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`processing system is the opposite of Jiang’s CPU-based processing system. Ex.
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`2002 ¶ 27. In particular, an ordinary artisan would have known that Jiang’s speech
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`recognition technique is directed by a CPU, which operates in serial, and that
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`Jiang’s teachings are thus not suited for implementation in Chen’s parallel
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`processing environment. Id. Thus, the ordinary artisan would not have been
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`motivated to implement Jiang’s CPU-based speech recognition teachings in Chen’s
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`parallel processing system. Id.
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`Further, as explained above, such modifications would have fundamentally
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`altered the resulting device so that it would no longer be suitable as a “personal
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`computer” due to the resulting cost and even size of the system. Ex. 2002 ¶ 31. The
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`resulting system would have greatly limited the usability of speech recognition
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`systems, including Jiang’s speech recognition techniques. Ex. 2002 ¶ 31. Thus, an
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`ordinary artisan would not have been motivated to modify Jiang in order to use the
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`hardware design of Chen. Ex. 2002 ¶ 31. In addition, for the reasons above, an
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`ordinary artisan also would not have had a reasonable expectation of success in
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`undertaking such a modification. Ex. 2002 ¶ 32.
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`VII. The Petition fails to demonstrate obviousness as to a shared acoustic
`model memory containing acoustic model data for a cluster of processors
`In addition to limitation 1(a)’s requirement of “one or more clusters of
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`processors, each of the one or more clusters of processors comprising: a plurality
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`of processors;” limitation (b) further requires “an acoustic model memory storing
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`acoustic model data,” and limitation (c) recites “wherein each of the plurality of
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`processors is configured to compute a probability using the acoustic model data in
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`the acoustic model memory.”
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`Together, limitation 1(a)-(c) thus require that each of the plurality of
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`processors in a cluster share an acoustic model storing acoustic model data. Ex.
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`2002 ¶ 33.
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`The specification of the ’319 patent describes that same architecture,
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`explaining:
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`“[T]he present invention provides a circuit in which speech
`recognition processing is performed in parallel by groups of
`processors operating in parallel in which each group accesses a
`common memory of lexical data. . . . Each processor within a
`group can access the same lexical data as any other processor in the
`group. The controller can thus control the parallel processing of
`input speech parameters in a more flexible manner. For example, it
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`allows more than one processor to process input speech parameters
`using the same lexical data in a lexical memory. This is because the
`lexical data is segmented into domains which are accessible by
`multiple processors.” Ex. 1001, 3:44-58 (emphasis added).
`Figure 2 of the patent, annotated below, further illustrates that architecture
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`by showing two groups of lexical tree processors, with each group containing
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`multiple processors 1-k, and each group of processors connected to a dedicated
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`“acoustic model memory.” Ex. 2002 ¶ 34, Ex. 1001, Fig. 2 (annotated).
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`The Petition’s sole theory as to limitations 1(a)-(c) relies on the combination
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`of Jiang and Chen. Pet. 14-31, 54. The Petition admits that Jiang does not teach the
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`several processors to one acoustic model memory architecture of the challenged
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`claims. Pet. 14. The Petition therefore again looks to Chen for the teaching of
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`groups of processors placed into “separable clusters, each cluster having a common
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`cluster shared memory that is symmetrically accessible by all of the processors in
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`that cluster.” Pet. 23.
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`According to the Petition’s theory, it would allegedly have been obvious to
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`modify Jiang in view of Chen to create a system with multiple clusters of
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`processors each with a shared memory. Pet. 24. In particular, the Petition proposes
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`to “implement the speech recognition techniques taught by Jiang using the
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`clustered processor computing platform of Chen to expedite the search process by
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`leveraging shared memory among clustered processors.” Pet. 24. The Petition
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`additionally asserts that “a POSITA would have stored at least a portion of the
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`acoustic model data (HMM acoustic model from Jiang’s model memory 72) in the
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`shared cluster memories 104a-d of each of the clusters 100a-d taught by Chen for
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`access by processors 102a-d during speech recognition[.]” Pet. 24. The Petition
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`later states, “in the proposed modified system, each of Chen’s processors 102a-d in
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`respective clusters 100a-d would have computed probability scores as taught by
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`Jiang using the acoustic model data stored in shared cluster memories 104a-d of
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`each of the clusters 100a-d[.]” Pet. 30.
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`The Petition, however, provides no reason why the ordinary artisan would
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`have been motivated to specifically utilize each of Chen’s shared cluster memories
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`104a-d as an “acoustic model memory” storing “acoustic model data,” as recited in
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`limitations 1(a)-(c) of the challenged claims. Ex. 2002 ¶ 37.
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`The Petition’s failure to provide any motivation for that crucial aspect of its
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`combination theory is fatal. PersonalWeb Techs., LLC v. Apple, Inc., 848 F.3d 987,
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`991 (Fed. Cir. 2017); In re NuVasive, Inc., 842 F.3d 1376, 1381-82 (Fed. Cir.
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`2016); In re Warsaw Orthopedic, Inc., 832 F.3d 1327, 1333-34 (Fed. Cir.
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`2016); Ariosa Diagnostics v. Verinata Health, Inc., 805 F.3d 1359, 1364-67 (Fed.
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`Cir. 2015); ActiveVideo Networks v. Verizon, 694 F.3d 1312, 1328 (Fed. Cir.
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`2012). When correctly applied, the requirement of a motivation to combine the
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`prior art elements in the specific manner alleged “serves to prevent hindsight bias.”
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`Medichem, S.A. v. Rolabo, S.L., 437 F.3d 1157, 1164 (Fed. Cir. 2006) (internal
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`citations and quotations omitted).
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`Notably, Chen does not contain any teachings regarding speech recognition
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`systems, and Chen thus could not motivate using each of its cluster shared
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`memories as acoustic model memories storing acoustic model data. Ex. 2002 ¶ 36,
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`37. Jiang, on the other hand, does not teach clusters of processors with each cluster
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`having its own dedicated acoustic model memory storing acoustic model data.
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`Jiang thus likewise could not motivate the Petition’s specific design choice. Ex.
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`2002 ¶ 37.
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`Rather, the Petition’s convenient theory is plainly driven by hindsight, and
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`simply reflects a reconstruction of the challenged claims arrived upon by starting
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`with the claims themselves and working backwards. But “[i]n making obviousness
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`determinations, the test is ‘whether the subject matter of the claimed inventions
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`would have been obvious to one skilled in the art at the time the inventions were
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`made, not what would be obvious to a judge after reading the patents in suit and
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`hearing testimony.” Medichem, 437 F.3d at 1164 (emphasis original) (quoting
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`Panduit Corp. v. Dennison Mfg. Co., 774 F.2d 1082, 1092 (Fed. Cir. 1985)).
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`Because the Petition’s theory as to limitations 1(a)-(c) does not demonstrate
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`why the artisan of ordinary skill “would have combined elements from specific
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`references in the way the claimed invention does,” ActiveVideo, 694 F.3d at 1328
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`(emphasis original), the Petition fails to demonstrate a reasonable likelihood of
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`success, much less a high likelihood of success.
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`VIII. The Petition fails to demonstrate obviousness as to “each of the plurality
`of processors [being] configured to compute a probability,” as recited in
`1(c)
`The Petition’s obviousness theory also fails at a second level. Whereas the
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`Petition alleges it would have been obvious to combine Jiang and Chen such that
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`each of Chen’s processors in a cluster of processors would have been configured to
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`compute a probability, as recited in limitation 1(c), the Petition provides no actual
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`reason why an ordinary artisan would have configured the combination of Jiang
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`and Chen in that manner.
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`Under the heading “Motivation to Combine Chen with Jiang for Claim
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`1(c),” the Petition provides no reason whatsoever. Pet. 31. Instead, the Petition
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`simply makes conclusory assertions as to what purportedly would have happened,
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`without giving any motivation for why those assertions would have occurred. The
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`entirety of the Petition’s “motivation” section for limitation 1(c) is below.
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`Moreover, the Petition’s earlier statement that “[a] POSITA would have
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`recognized it would have been advantageously efficient to use each of the clustered
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`processors of Jiang-Chen to perform speech recognition,” Pet. 30, likewise says
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`nothing at all. As the Federal Circuit has held, the “generic” assertion of
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`“efficiency” is not evidence of a motivation to combine, as it “bears no relation to
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`any specific combination of prior art elements” and “fails to explain why a person
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`of ordinary skill would have combined elements from specific references in the
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`way the claimed invention does.” ActiveVideo, 694 F.3d at 1328 (emphasis
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`original). Furthermore, an ordinary artisan would know that even using each of
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`Chen’s clustered processors for performing the speech recognition taught in Jiang
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`would not necessarily lead to each of the processors being “configured to compute
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`a probability,” as limitation 1(c) requires. Ex. 2002 ¶ 39. Rather, Jiang’s speech
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`recognition technique requires various processing activities, and there is no
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`particular reason why each of Chen’s multiple processors would have been
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`dedicated to the specific task of computing a probability. Ex. 2002 ¶ 39.
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`Likewise inadequate is the Petition’s assertion that “Chen teaches that for
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`each cluster of processors, the plurality of processors in each cluster may perform
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`processing in parallel, such that each processor of each of the clusters performs the
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`intended operation.” Pet. 30 (emphasis removed). The fact that Chen’s processors
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`can work in parallel on a given task is not a reason why they would have been
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`specifically configured to each perform the particular task of computing a
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`probability, as recited in limitation 1(c). Ex. 2002 ¶¶ 38-39.
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`Accordingly, the Petition fails to demonstrate a reasonable likelihood of
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`success as to limitation 1(c), much less a high likelihood of success.
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`IX. Conclusion
`For the reasons above, the Board should decline to institute the Petition.
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`Respectfully submitted,
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`/s/ Peter C. Knops
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`Peter C. Knops, Reg. No. 37,659
`Kayvan B. Noroozi, Pro Hac Vice (to be filed)
`NOROOZI PC
`11601 Wilshire Blvd., Suite 2170
`Los Angeles, CA 90025
`Attorneys for the Patent Owner
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`Date: March 15, 2023
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`CERTIFICATION OF WORD COUNT
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`The undersigned hereby certifies that the portions of the above-captioned
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`PATENT OWNER’S PRELIMINARY RESPONSE specified in 37 C.F.R. §
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`42.24 have 4,175 words, in compliance with the 14,000 word limit set forth in 37
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`C.F.R. § 42.24(b)(1). This word count was prepared using Microsoft Word 365.
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`/Peter Knops/
`Peter Knops
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`Counsel for Patent Owner
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`Date: March 15, 2023
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`CERTIFICATION OF SERVICE
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`The undersigned hereby certifies that the foregoing PATENT OWNER’S
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`PRELIMINARY RESPONSE was served electronically via e-mail on March 15,
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`2023, on the following counsel of record for Petitioner:
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`Adam M. Sandwell
`Adam.Sandwell@eriseip.com
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`Adam P. Seitz
`Adam.Seitz@eriseip.com
`PTAB@eriseip.com
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`Jennifer C. Bailey
`Jennifer.Bailey@eriseip.com
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`Erise IP, P.A.
`7015 College Blvd., Ste. 700
`Overland Park, Kansas 66211
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`Date: March 15, 2023
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`/Peter C. Knops/
`Peter C. Knops
`NOROOZI PC
`11601 Wilshire Blvd., Suite 2170
`Los Angeles, CA 90025
`Tel.: 310-975-7074
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`Counsel for Patent Owner
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