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` UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`APPLE INC.,
`Petitioner,
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`v.
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`Zentian Limited
`Patent Owner.
`____________________
`
`Case IPR2023-00037
`Patent No. 10,971,140
`____________________
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`PATENT OWNER’S RESPONSE
`[CORRECTED]
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`IPR2023-00037
`PATENT OWNER’S RESPONSE
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`TABLE OF CONTENTS
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`I.
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`II.
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`Introduction
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`Background of the ’140 Patent
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`III. Person of ordinary skill in the art
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`IV. The POSA would not have had a reasonable expectation of success with
`respect to the Petition’s combination of Jiang and Chen
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`1
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`3
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`6
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`7
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`The Petition and Mr. Schmandt fail to demonstrate a motivation to combine
`V.
`Jiang with Chen
`16
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`VI. The Petition fails to show obviousness as to limitations 1(d) and 1(e)
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`VII. Conclusion
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`PATENT OWNER’S RESPONSE
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`EXHIBIT LIST
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`Exhibit No.
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`Description
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`2017
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`Deposition of Christopher Schmandt dated September 6, 2023
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`2018
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`Intentionally left blank
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`2019
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`Hennessy & Patterson, Computer Architecture, A Quantitative
`Approach, Third Edition (2003) (“Hennessy & Patterson”)
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`2020
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`Declaration of David Anderson, Ph.D
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`2021
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`Binu K. Mathew et al., A Gaussian Probability Accelerator for
`SPHINX 3, (“Mathew I”)
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`I.
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`Introduction
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`The Petition proposes that an ordinary speech recognition artisan would
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`have been motivated to implement Jiang’s speech recognition teachings in Chen’s
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`clustered processor and memory architecture with a reasonable expectation of
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`success.
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`But neither Jiang nor Chen enables such a combination, so the Petition must
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`prove enablement through evidence outside those references. The Petition and Mr.
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`Schmandt, however, fail to make that showing. Indeed, Mr. Schmandt admitted
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`under cross-examination that he has never built or designed the processor to
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`memory architecture for any of the speech recognition systems he identifies in the
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`background of his declaration. Mr. Schmandt further admitted he has never
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`supervised anyone in the process of mapping speech recognition software to a
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`hardware architecture like Chen’s.
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`As Dr. Anderson explains in detail, the Petition’s combination would have
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`raised a number of complications and conflicts that the POSA would not have been
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`qualified to address or resolve. Indeed, Jiang and Chen are inherently ill-suited for
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`combination, since Jiang’s technique requires extensive communication between
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`computational components whereas Chen does not allow communication between
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`some of its processors and memories.
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`Moreover, real-world evidence from contemporaneous references teaches
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`that the combination would not be expected to speed up Jiang’s recognition
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`process, and that the POSA would not have been motivated by such an expectation.
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`To the contrary, Mathew I teaches that a five-processor parallel processing system
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`slowed down the speech recognition process compared to a two-processor system
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`due to the associated synchronization overhead. Mr. Schmandt’s other purported
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`motivations—alleged cost benefits and “flexibility and scalability”—are likewise
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`baseless, as Mr. Schmandt’s deposition revealed. By contrast, Dr. Anderson
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`explains in detail why the POSA would not have been motivated to combine Jiang
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`with Chen in view of the known challenges and disadvantages of such a
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`combination balanced against the low likelihood of benefits.
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`Finally, the Petition further fails because it provides no theory as to how the
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`combination of Jiang and Chen would operate to meet limitations 1(d) and 1(e). As
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`Mr. Schmandt admitted, his theory requires that Jiang modified to use Chen’s
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`hardware would practice both limitations, but his declaration does not even
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`mention Chen with respect to limitations 1(d) and 1(e), much less explain how the
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`combination of Jiang and Chen would meet them. And although Mr. Schmandt
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`attempted to fill the void with a new, ad hoc theory presented for the first time at
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`his deposition, the evidence demonstrates that theory would not have been enabled.
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`Mr. Schmandt’s failure to present a workable explanation as to how the POSA
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`could have arrived at the invention of the challenged claims by combining Jiang
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`and Chen is definitive evidence that the claims are far from obvious.
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`Accordingly, the Board should not find any challenged claim unpatentable.
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`II. Background of the ’140 Patent
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`U.S. Patent 10,971,140, titled “Speech recognition using parallel
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`processors,” is directed to an improved speech recognition circuit that “uses
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`parallel processors for processing the input speech data in parallel.” Ex. 1001,
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`1:18-20. The ’140 patent teaches multiple processors “arranged in groups or
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`clusters,” with each group or cluster of processors connected to one of several
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`“partial lexical memories” that “contains part of the lexical data.” Ex. 1001, 3:13-
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`18. “Each lexical tree processor is operative to process the speech parameters using
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`a partial lexical memory and the controller controls each lexical tree processor to
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`process a lexical tree corresponding to partial lexical data in a corresponding
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`partial lexical memory.” Ex. 1001, 3:19-24. The ’140 patent further teaches that
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`the invention “provides a circuit in which speech recognition processing is
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`performed in parallel by groups of processors operating in parallel in which each
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`group accesses a common memory of lexical data.” Ex. 1001, 3:62-66.
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`The specification of the ’140 patent thus provides: “[T]he present invention
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`provides a circuit in which speech recognition processing is performed in parallel
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`by groups of processors operating in parallel in which each group accesses a
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`common memory of lexical data. . . . Each processor within a group can access the
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`same lexical data as any other processor in the group. The controller can thus
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`control the parallel processing of input speech parameters in a more flexible
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`manner. For example, it allows more than one processor to process input speech
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`parameters using the same lexical data in a lexical memory. This is because the
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`lexical data is segmented into domains which are accessible by multiple
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`processors.” Ex. 1001, 3:62-4:18.
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`Figure 2 of the patent, annotated below, further illustrates that architecture
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`by showing two groups of lexical tree processors, with each group containing
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`multiple processors 1-k, and each group of processors connected to a dedicated
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`“acoustic model memory,” such that there are least two acoustic model memories
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`for at least two groups of processors. Ex. 1001, Fig. 2 (annotated).
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`Moreover, the ’140 patent expressly distinguishes its novel architecture from
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`two prior known alternative designs, which the patent describes as less
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`advantageous. In particular, the ’140 patent teaches that: “By providing a plurality
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`of processors in a group with a common memory, flexibility in the processing is
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`provided without being bandwidth limited by the interface to the memory that
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`would occur if only a single memory were used for all processors. The
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`arrangement is more flexible than the parallel processing arrangement in which
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`each processor only has access to its own local memory and requires fewer
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`memory interfaces (i.e. chip pins).” Ex. 1001, 4:1-9. The patent thus distinguishes
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`its design from (1) a one-memory-to-all-processors design, which it describes as
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`bandwidth limited in the processor to memory interface; and (2) a one-memory-to-
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`one-processor design, which would require more memory interfaces and would be
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`less flexible.
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`III. Person of ordinary skill in the art
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`This Response addresses the Petition’s deficiencies by assuming the Petition’s
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`proffered definition of the person of ordinary skill in the art.
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`As Dr. Anderson explains, however, the field of electrical engineering
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`encompasses many specialties, including fiber optics, analog circuits, digital
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`circuits, very large-scale integration (VLSI), systems and controls, digital signal
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`processing, bio-medical sensors and systems, electrical energy, electromagnetics,
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`nanotechnology, telecommunications, computer systems and software, and others.
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`Ex. 2020 ¶ 17.
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`Thus, if a student desires to study speech recognition, they would specialize
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`in the area of digital signal processing (DSP) and then pursue studies specific to the
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`advanced subspecialty of DSP in their graduate studies. On the other hand, a student
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`who desires to learn computer architecture would take a different set of core courses
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`in one of the computer engineering specialties. Ex. 2020 ¶ 17.
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`Mr. Schmandt’s proposed person of ordinary skill in the art is a specialist in
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`speech recognition. Any such person of ordinary skill would not also be expected to
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`have specialized in parallel processing architectures and methods or high
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`performance computing in addition to speech recognition. Ex. 2020 ¶ 18. Indeed,
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`Dr. Anderson has never taught a course that would have equipped a masters-level
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`student in speech recognition to apply a parallel processing architecture like Chen’s
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`to known speech recognition techniques. Ex. 2020 ¶ 18. While a person with a
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`master’s degree in one of the fields identified in Mr. Schmandt’s POSA definition
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`could be a person of ordinary skill in speech recognition or a person of ordinary skill
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`in high performance computing and parallel processing, that person would not be
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`both. Ex. 2020 ¶ 19.
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`IV. The POSA would not have had a reasonable expectation of success with
`respect to the Petition’s combination of Jiang and Chen
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`The Petition’s theory as to all challenged claims relies on at least a
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`combination of Jiang and Chen. In particular, the Petition and Mr. Schmandt
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`propose that the ordinary artisan would have found it obvious “to configure a
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`computing platform comprising clusters of processors as taught by Chen to
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`perform the speech recognition techniques of Jiang.” Ex. 1003 ¶ 68.
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`“To render a claim obvious, the prior art, taken as a whole, must enable a
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`skilled artisan to make and use the claimed invention.” Raytheon Techs. Corp. v.
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`GE, 993 F.3d 1374, 1380 (Fed. Cir. 2021) (emphasis added). “[E]ven though a
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`non-enabling reference can play a role in an obviousness analysis, the evidence of
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`record must still establish that a skilled artisan could have made the claimed
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`invention.” Id. at 1381.
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`Here, Jiang does not enable performing its speech recognition techniques
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`using the particular clustered processor embodiment the Petition has selected from
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`Chen, and Chen does not enable using that clustered processor embodiment to
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`perform Jiang’s speech recognition techniques. Ex. 2020 ¶ 24. Mr. Schmandt
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`admitted that reality at his deposition.
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`Ex. 2017 at 86:9-17.
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`Accordingly, the evidence of record beyond Jiang and Chen must establish
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`that the ordinary artisan could have “configure[d] a computing platform
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`comprising clusters of processors as taught by Chen to perform the speech
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`recognition techniques of Jiang,” as the Petition’s theory requires. Ex. 1003 ¶ 68.
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`Mr. Schmandt and the Petition, however, do not provide that evidence.
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`Instead, Mr. Schmandt’s declaration simply states the sweeping and conclusory
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`generalization that the “modifications necessary, such as configuring Chen’s
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`circuitry to specifically recognize speech pursuant to Jiang would have required
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`only software programming and well-known computing techniques and
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`structures, and thus would have led a POSITA to a reasonable expectation of
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`success.” Ex. 1003 ¶ 68 (emphasis added).
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`As Mr. Schmandt admitted under cross-examination, his declaration is thus
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`silent as to any underlying details to support his conclusion as to the POSA’s
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`capability; instead, his declaration merely states the conclusion without any
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`underlying explanation.
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`Ex. 2017 at 48:13-21.
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`An expert’s “ipse dixit declaration,” however, cannot prove obviousness. TQ
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`Delta, LLC v. Cisco Sys., 942 F.3d 1352, 1362 (Fed. Cir. 2019). Mr. Schmandt’s
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`“conclusory statements and unspecific expert testimony are [ ] thus inadequate to
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`support the Board’s finding” of obviousness. Id. at 1363.
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`In addition to being devoid of evidentiary value, Mr. Schmandt’s conclusory
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`assurances as to the POSA’s capabilities are also not credible in view of his
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`deposition testimony.
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`Although Mr. Schmandt’s declaration claims he has “built” a number of
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`speech recognition systems, see Ex. 1003 ¶¶ 4, 6, Mr. Schmandt admitted under
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`cross-examination that he has never built the processor to memory architecture of
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`any speech recognition system identified in his declaration.
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`Ex. 2017 at 34:24-35:5.
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`Ex. 2017 at 32:3-9.
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`Moreover, Mr. Schmandt has never supervised anyone involved in the
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`process of mapping a speech recognition model to a clustered processor and
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`memory architecture like Chen’s.
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`Ex. 2017 at 146:20-24.
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`Mr. Schmandt thus lacks an adequate basis from his personal knowledge and
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`experience to opine that the combination of Jiang and Chen was within the skill
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`level of ordinary artisan in the field of speech recognition.
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`By contrast, as Dr. David Anderson explains, implementing Jiang’s speech
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`recognition techniques on Chen’s clustered processor and memory architecture
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`would have been highly complex, and far outside the skill level of the ordinary
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`artisan in the field of speech recognition as defined by the Petition, without the
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`benefit of the ’140 Patent. Ex. 2020 ¶ 27. In particular, moving Jiang’s speech
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`recognition techniques to Chen’s clustered, parallel processors and memories
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`would have required coordinating multiple caches, avoiding memory conflicts,
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`controlling task sharing in an efficient manner, resolving synchronous bottlenecks,
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`and addressing communication bandwidth and latency issues among the various
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`hardware components, and developing a messaging strategy to coordinate
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`information sharing between and within clusters, among other challenges. Ex. 2020
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`¶ 27.
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`Such tasks were not within the skill level of the ordinary artisan in the field
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`of speech recognition as defined by the Petition prior to the ’140 Patent. Ex. 2020 ¶
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`27. As Dr. Anderson explains, the field of electrical engineering encompasses
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`many specialties, including fiber optics, analog circuits, digital circuits, very large-
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`scale integration (VLSI), systems and controls, digital signal processing, bio-
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`medical sensors and systems, electrical energy, electromagnetics, nanotechnology,
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`telecommunications, computer systems and software, and others. Ex. 2020 ¶¶ 17-
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`19, 28 (pp. 7-9, 17). Students of electrical or computer engineering specialize in
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`one of these areas after taking some general courses. Id. The ordinary artisan in the
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`field of speech recognition would have specialized in the area of digital signal
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`processing (DSP), and would have further pursued studies specific to speech
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`recognition, an advanced subspecialty of DSP, in their graduate studies. Id. The
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`POSA in the field of speech recognition would not have been capable of
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`addressing the complex challenges of combining Chen with Jiang in the manner
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`the Petition has proposed any more than a dermatologist could be expected to also
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`perform open heart surgery. Ex. 2020 ¶ 28 (p. 17).
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`Moreover, speech recognition requires evaluating the comparative
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`likelihoods of many possible outcomes for each incoming frame of samples. Ex.
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`2020 ¶ 29 (p. 17). Jiang teaches the use of the Viterbi decoding algorithm. Ex.
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`1004 at 1:19-39, 2:1-46. The Viterbi algorithm compares the likelihoods of all
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`possible sequences for a given input frame, given the most likely outcomes from
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`the previous frame. Id.; Ex. 2020 ¶ 29 (p. 18). To perform these comparisons
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`requires extensive communication between computational components that can
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`have a drastic impact on the system design and performance. Ex. 2020 ¶ 29 (p. 18).
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`By contrast, Chen teaches that the memory associated with one cluster is not
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`directly or adjacently accessible by the processors and memories in each other
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`cluster. See Ex. 1003 ¶ 95; Ex. 1005 at 9:10-39; Ex. 2020 ¶ 29 (p. 18). As a result,
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`performing Viterbi decoding when the information needed by each node may be in
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`a cluster that is not directly accessible, as in Chen, is not likely to be successful in a
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`practical speech recognition system. Ex. 2020 ¶ 29 (p. 18).
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`As explained by Hennesy & Patterson and Dr. Anderson, communication
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`between parallel processing nodes is one of several considerations that can
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`determine the feasibility of a particular parallel architecture for use with a
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`particular problem. Ex. 2019 at 534-535; Ex. 2020 ¶ 30 (p. 18). Hennesy &
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`Patterson also points out that the private memory model in which memory is
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`connected only within a cluster may be suitable “for applications that require little
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`or no communication.” Ex. 2019 at 533; Ex. 2020 ¶ 30 (p. 18). Chen implements
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`such a private memory architecture but the speech recognition search stage is an
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`application that requires significant communication. Ex. 2020 ¶ 30 (p. 18).
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`Therefore, based on teachings at the time of the ’140 Patent, the POSA would not
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`expect the proposed combination of Chen with Jiang to be successful. Ex. 2020 ¶
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`30 (pp. 18-19).
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`Dr. Anderson’s own experience in supervising a team that attempted to
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`implement an application within a parallel processing environment is illustrative.
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`Ex. 2020 ¶ 31. In addition to support from Dr. Anderson, this team of engineers
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`worked in close collaboration with a DSP application expert at Texas Instruments
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`for six months in order to implement a custom computer vision application on a
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`multi-processor system supplied by Texas Instruments (Texas Instrument’s multi-
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`processor daVinci platform). Id. Even with training, expert oversight, and
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`extensive efforts on behalf of the team, the inter-processor communication details
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`prevented the successful implementation of their system. Id. Rather, the final
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`product was only able to do a simple tracking of a black ball on a white
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`background—something that could have more easily been performed on a single
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`processor. Id. While this system was not a speech recognition system, it was a
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`signal processing system that was simpler than a speech recognition system in
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`terms of complexity (only a few hundreds of lines of code). Id. The failure of this
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`design example merely demonstrates that transitioning a signal processing system
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`to any particular multi-processing architecture is not necessarily trivial or practical,
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`and that even those beyond the level of ordinary skill in the field of speech
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`recognition could not necessarily expect success with respect to far simpler
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`combinations than the one the Petition has proposed. Id.; Kloster Speedsteel AB v.
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`Crucible, Inc., 793 F.2d 1565, 1574 (Fed. Cir. 1986) (“If the invention here would
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`not have been obvious to one of extraordinary skill, it follows that in this case it
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`would not be obvious to one with lesser skills.”).
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`Thus, even accepting arguendo that Jiang and Chen both contemplate the
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`use of a plurality of processors, a POSA would not have “been capable of simply
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`substituting” Chen’s clustered processors to implement Jiang’s speech recognition
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`techniques, as Mr. Schmandt’s declaration simplistically presumes. Compare Ex.
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`1003 ¶¶ 67, 74 with Ex. 2020 ¶¶ 27-32 (pp. 16-20).
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`The evidence of record thus does not demonstrate that an ordinary artisan in
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`the field of speech recognition could have configured Chen’s clustered processor
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`and memory architecture to perform Jiang’s speech recognition techniques with a
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`reasonable expectation of success.
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`V. The Petition and Mr. Schmandt fail to demonstrate a motivation to
`combine Jiang with Chen
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`Apple and Mr. Schmandt allege that the POSA would have been motivated
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`to combine Jiang with Chen due to the alleged benefits of improved speed and
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`power, a relaxed pruning threshold, and reduced cost. Ex. 1003 ¶¶ 67, 74.
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`Separately, Mr. Schmandt contends that “the flexibility and scalability afforded to
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`the MARS machine by its clustered architecture [ ] would have motivated a
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`POSITA to implement clustered architecture in other speech recognition circuits.”
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`Ex. 1003 ¶ 71. The evidence, however, does not support any such benefits, or the
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`existence of a motivation to combine.
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`Mr. Schmandt’s declaration assumes that the clustered processor and
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`memory arrangement of Chen would have necessarily improved the speed and
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`power of Jiang’s speech recognition, and thus allowed for relaxed pruning
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`threshold. Ex. 1003 ¶¶ 67, 74. Notably, Mr. Schmandt’s declaration does not
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`undertake any quantitative or other particularized analysis to demonstrate why
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`Chen would allegedly speed up Jiang and relax its pruning threshold, or by how
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`much. Ex. 2020 ¶ 35. Rather, Mr. Schmandt seems to simply assume the
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`conclusion that more processors would have been better. Id.
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`Contemporaneous real-world evidence, however, refutes Mr. Schmandt’s
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`assumptions. Ex. 2020 ¶ 36. Mathew I provides a detailed report on computer
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`architecture modifications intended to improve the speed of a speech recognizer,
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`and in particular through the addition more processors. Ex. 2021 at 11. Mathew I
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`explains that it developed “a parallel version” of the Sphinx speech recognition
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`system in which the distance calculation (GAU, or Gaussian probability
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`estimation) was run on a separate processor from the search stage (HMM
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`processing) with parallelization. Id. This two-processor parallel processing design
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`was only 1.67x faster than the “original sequential version,” not 1.97x faster as the
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`authors had predicted based on Amdahl’s law. Ex. 2021 at 11; Ex. 2020 ¶ 36. The
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`authors then further modified the search stage (HMM phase) “to use 4 processors
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`instead of 1,” thus moving from a two-processor system (one for distance
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`calculation and one for search) to a five-processor system (one processor for the
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`calculation stage, and four for search). Ex. 2021 at 11; Ex. 2020 ¶ 36. As Mathew I
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`reports, “the resulting 5 processor version was slower than the 2 processor version
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`due to the high synchronization overhead.” Ex. 2021 at 11 (emphasis added); Ex.
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`2020 ¶ 36.
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`As Dr. Anderson explains, Mathew I demonstrates that the ordinary artisan
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`could not have assumed that Chen’s complex, clustered parallel processing
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`architecture with numerous processors in each cluster and multiple distributed
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`memories would have improved the speed of Jiang’s speech recognition system or
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`relaxed its pruning threshold in view of the high synchronization overhead and
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`other complications that such a system would have implicated. Ex. 2020 ¶ 37.
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`Mr. Schmandt’s declaration testimony as to the alleged cost-based
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`motivations of the combination are likewise entirely baseless. As Mr. Schmandt
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`admitted at his deposition, his declaration opines that the combination of Jiang and
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`Chen would have been less expensive, but never states what the combination
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`would have been less expensive than, or on what basis.
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`Ex. 2017 at 61:14-62:9. Mr. Schmandt also made clear that his declaration
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`testimony was not based on a cost comparison between Chen’s clustered
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`processing architecture and any other allegedly alternative clustered processing
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`architectures.
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`Ex. 2017 at 63:8-15. And Mr. Schmandt likewise admitted that his declaration
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`provides no quantitative cost comparison between Jiang’s unmodified architecture
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`and his proposed modified architecture in combination with Chen. Ex. 2017 at
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`40:23-41:4.
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`In sum, there is no basis for Mr. Schmandt’s declaration testimony that the
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`POSA would have been motivated to combine Jiang with Chen based on a
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`purported cost or expense benefit from the combination. Ex. 2020 ¶ 39.
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`Moreover, Mr. Schmandt testified that a motivation to modify would require
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`the ordinary artisan to first assess the cost implications of a potential modification
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`against the imputed or actual value of the modification, considering both any
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`specific performance improvements and the value of those improvements to end
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`users. Ex. 2017 at 41:18-42:13. According to Mr. Schmandt: “Cost would be part
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`of a design tradeoff and also looking at your customer base.” Ex. 2017 at 42:12-
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`42:13. Yet Mr. Schmandt readily admitted he did not undertake any qualitative or
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`quantitative cost-benefit analysis in reaching his opinions regarding a motivation to
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`combine.
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`Ex. 2017 at 42:14-19.
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`Mr. Schmandt’s declaration testimony as to a cost-based motivation thus
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`does not meet his own criteria for what a POSA would need to consider before
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`forming a motivation.
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`Nor does it meet the Federal Circuit’s requirement as to proving a
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`motivation to combine. Winner Int’l Royalty Corp. v. Wang, 202 F.3d 1340, 1349
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`(Fed. Cir. 2000) (holding that “[m]otivation to combine requires” evidence the
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`alleged benefits of the combination, in view of the associated tradeoffs and costs,
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`would have been “on balance, desirable.”).
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`Equally without merit is Mr. Schmandt’s “flexibility and scalability”
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`motivation. Ex. 1003 ¶¶ 71, 72. Mr. Schmandt’s declaration cites Hon as
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`purportedly teaching that clustered processing architectures in general present the
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`benefits of flexibility and scalability, and that this would have motivated the
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`combination of Jiang and Chen. Id. But Mr. Schmandt’s deposition testimony
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`clarifies that Hon’s cited passages instead teach that MARS was flexible because
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`its pipeline was programmable, and that it was scalable because more processors
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`could be added to it. Ex. 2017 at 105:8-106:4; Ex. 2020 ¶ 40. In both instances,
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`Hon was comparing the MARS system to another system, SRI-Berkeley, which did
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`not have a programmable pipeline or extendable processor architecture. Ex. 2017
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`at 105:8-106:4; Ex. 2020 ¶ 40; Ex. 1006 at 24. Hon’s discussion of MARS is thus
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`specific to two particular advantages of MARS over SRI-Berkeley, and Hon thus
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`does not provide a generalized “flexibility and scalability” motivation for
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`combining Jiang with a clustered processing architecture, much less Chen’s in
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`particular. Ex. 2020 ¶ 40. Indeed, Mr. Schmandt has made no showing that Jiang
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`itself, without modification, was not already both flexible and scalable in the same
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`manner that Hon describes with respect to MARS. Ex. 2020 ¶ 41.
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`Ultimately, Mr. Schmandt testified that it is never desirable to add another
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`processor to a speech recognition system when that system can already perform
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`adequately.
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`Ex. 2017 at 163:4-12 (emphasis added). Yet Mr. Schmandt and Apple have made
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`no showing that Jiang’s system could not perform adequately without being
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`combined with Chen. Accordingly, there is no motivation to combine here under
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`Mr. Schmandt’s own criteria.
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`As Dr. Anderson further explains, the POSA would not have been motivated
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`to implement Jiang’s speech recognition techniques in Chen’s clustered processing
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`architecture. Ex. 2020 ¶¶ 42-45. Jiang’s existing architecture relies on a shared
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`memory structure in which all components have access to the same memory. Ex.
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`1004, Fig. 1; Ex. 2020 ¶ 42. The relevant embodiment the Petition selects from
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`Chen, however, relies on a distributed memory consisting of multiple private
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`memories, with one memory per cluster, in which access to those private memories
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`is extended also to directly adjacent clusters. Ex. 2020 ¶ 42. As Chen itself states,
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`“[t]o effectively port an existing software program from a shared memory model to
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`a private memory model can require significant reprogramming effort.” Ex. 1005
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`at 2:6-9 (emphasis added); Ex. 2020 ¶ 42. That is because “a distributed memory
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`model necessarily requires that the processes and data which comprise a parallel
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`programming problem be partitioned into separate tasks that are each small enough
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`to fit into the private local memory of a processor and at the same time are large
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`enough to recover the overhead required to establish a parallel task in a message
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`passing environment.” Ex. 1005 at 2:9-17 (emphasis added); Ex. 2020 ¶ 42. The
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`POSA would have been aware of Chen’s warning that porting Jiang’s speech
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`recognition techniques to Chen’s distributed memory architecture would require
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`“significant reprogramming effort,” including the complex task of finding the
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`optimal approach to partitioning the processes and data of Jiang’s speech
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`recognition techniques to balance the competing problems of memory size and
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`overhead. Ex. 2020 ¶ 43. In addition, the overhead required to perform message
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`passing (communications for information sharing) between private-memory
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`clusters can be onerous. Ex. 2020 ¶ 43. One example of this problem was
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`demonstrated in Mathew I and cited previously. Id. Since speech recognition
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`search requires information to be shared among multiple recognition paths
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`(candidate HMM state sequences) during the Viterbi decoding, the design of the
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`communication and memory architecture would be critical. Id. Chen presents a
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`particularly poor choice for the speech recognition search stage because it
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`explicitly does not have direct communication between all the clusters. Ex. 1003 ¶
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`95; Ex. 1005, 9:10-39; Ex. 2020 ¶ 43. The POSA would not have been motivated
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`to combine Jiang with Chen in the manner proposed in view of those obstacles. Ex.
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`2020 ¶ 44. Indeed, the POSA would not have expected to successfully manage the
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`overhead implications of such a combination in order to reasonably expect
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`benefits. Ex. 2020 ¶ 44. As already explained, Mathew I teaches that even a five-
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`processor parallel processing system ended up performing more slowly than a two-
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`processor system “due to the high synchronization overhead.” Ex. 2021 at 11; Ex.
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`2020 ¶ 44. The Petition’s combination, by contrast, requires at least eight
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`processors and four distributed memories running in parallel across four clusters.
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`Ex. 1003 ¶ 73.
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`The ordinary artisan would have known that mapping Jiang’s speech recognition
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`techniques to such a complex architecture would have not, on balance, have been
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`desirable in view of the high downsides and the low likelihood of benefits. Ex.
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`2020 ¶ 45.
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`Accordingly, the POSA would not have been motivated to combine Jiang
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