IPR2023-00037
`Apple Inc.
`v.
`Zentian Limited
`Patent 10,971,140
`
`Patent Owner’s Demonstratives
`
`Presented March 11, 2024
`
`1
`
`
`Apple Inc.
`v.
`Zentian Limited
`Patent 10,971,140
`
`Patent Owner’s Demonstratives
`
`Presented March 11, 2024
`
`1
`
`
`
`Argument Roadmap
`
`v Petitioner has failed to show obviousness for
`limitations 1(d) and 1(e)
`v The evidence proves a POSA would not have had a
`reasonable expectation of success
`v Petitioner’s counter-arguments rest on false logic
`v The evidence proves no motivation to combine
`
`2
`
`
`
`Argument Roadmap
`
`v Petitioner has failed to show obviousness for
`limitations 1(d) and 1(e)
`v The evidence proves a POSA would not have had a
`reasonable expectation of success
`v Petitioner’s counter-arguments rest on false logic
`v The evidence proves no motivation to combine
`
`3
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Limitation 1(d): “the speech recognition circuit is
`configured to generate an initial score for an audio
`sample;”
`
`Limitation 1(e): “the initial score is used to determine
`whether to continue processing to determine a final
`score via processing a larger amount of model data
`than that was processed to generate the initial score”
`
`Sur-reply at 1
`
`4
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Mr. Schmandt admitted his declaration does not state
`how Jiang’s tree search engine 74 modified in view of
`Chen would operate to meet limitations 1(d) and 1(e)
`
`Sur-reply at 1, Ex. 2017 at 46:12-22, 68:17-25, 83:10-14, 79:11-23, 81:8-22, 83:15-18
`
`5
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Mr. Schmandt’s deposition proposed a new “one
`processor” theory for limitations 1(d) and 1(e)
`
`Sur-reply at 1-2, Ex. 2017 at 102:5-103:3
`
`6
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Patent Owner proved Mr. Schmandt’s new “one
`processor” theory would not function to meet 1(d) & 1(e)
`
`1.
`
`“One processor” theory would require one processor in one
`cluster to receive necessary information from all four memories
`in Chen’s Fig. 4 embodiment
`2. Mr. Schmandt’s declaration states, and Chen teaches, that the
`four memories are not all “interconnected”
`3. No one processor in one cluster can directly or adjacently access
`all of the data stored across the four memories
`
`Sur-reply at 1-2, POR at 32-35, Ex. 1003 ¶ 95, Ex. 2020 ¶¶ 5—51, Ex. 1005, 9:10-39
`
`7
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`No one processor in one cluster can directly or adjacently
`access all of the data stored across the four memories
`
`Sur-reply at 1-2, POR at 32-35, Ex. 1003 ¶ 95, Ex. 2020 ¶¶ 5—51, Ex. 1005, 9:10-39
`
`8
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Petitioner’s Reply pivoted to an “all processors” theory
`
`“Jiang’s algorithm of generating an initial score
`and using the initial score to determine whether
`to continue processing (the functionality of claims
`1(d)-1(e)) would be replicated across Chen’s
`processors.”
`
`Sur-reply at 3, Paper 22 at 2
`
`9
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Petitioner’s new “all processors” theory also fails
`
`1. “All processors” theory abandons Schmandt’s “one processor” theory and
`undermines both
`2. Requires every processor across four clusters to calculate the same initial
`score and make the same determination whether to continue, which is both
`illogical and not shown to have been obvious
`3. Contradicted by Schmandt’s testimony that “at that point, we have finished
`our parallel processing operation and we’re back to serial operation”
`4. Still requires each processor to obtain necessary information from every
`memory, whereas no processor can directly or adjacently access every
`memory
`5. Not disclosed in Petition and thus improper
`
`Sur-reply at 3-4, Ex. 2020 ¶¶ 50-51, Ex. 1003 ¶ 95, Ex. 2017 at 102:5-103:3
`
`10
`
`
`
`Petitioner has failed to show obviousness
`for limitations 1(d) and 1(e)
`
`Petitioner’s new “all processors” theory also fails
`
`Sur-reply at 3-4, Ex. 2020 ¶¶ 50-51, Ex. 1003 ¶ 95, Ex. 2017 at 102:5-103:3
`
`11
`
`
`
`Argument Roadmap
`
`v Petitioner has failed to show obviousness for
`limitations 1(d) and 1(e)
`v The evidence proves a POSA would not have had a
`reasonable expectation of success
`v Petitioner’s counter-arguments rest on false logic
`v The evidence proves no motivation to combine
`
`12
`
`
`
`An ordinary artisan would not have had
`a reasonable expectation of success
`
`The Petition’s combination requires performing Jiang’s techniques on Chen’s
`clustered processor and memory architecture
`
`But Jiang does not enable performing its speech recognition on Chen’s
`clusters, and Chen does not enable using its clusters to perform Jiang
`
`Sur-reply at 4-5, Ex. 1003 ¶¶ 67-68, Ex. 2017, 86:9-17, Ex. 2020 ¶ 24
`
`13
`
`
`
`An ordinary artisan would not have had
`a reasonable expectation of success
`
`Mr. Schmandt’s admissions refute a reasonable expectation of success
`
`Mr. Schmandt admitted he has not:
`
`Mr. Schmandt admitted he has not:
`
`v Provided the underlying details to
`support his conclusion as to the
`POSA’s capability, Ex. 2017 at
`48:1—21
`
`v Supervised anyone involved in
`mapping a speech recognition
`model to a clustered processor
`and memory architecture like
`Chen’s, Ex. 2017 at 145:20-24
`
`v Built the processor to memory
`architecture of any speech
`recognition system identified in his
`background experience, Ex. 2017,
`34:24-35:5, 32:3-9, 106:10-23;
`
`v Explained how the POSA could
`have achieved his combination. Ex.
`2017 at 48:13-21.
`
`Mr. Schmandt’s conclusion of reasonable success is not credible
`
`Sur-reply at 4-5
`
`14
`
`
`
`An ordinary artisan would not have had
`a reasonable expectation of success
`
`Dr. Anderson’s testimony disproves a reasonable expectation of success
`
`v Jiang’s Viterbi algorithm was
`unlikely to run successfully on
`Chen’s clusters in a practical
`system, Ex. 2020 ¶¶ 29-30
`
`v Jiang’s Viterbi algorithm
`requires extensive
`communication, whereas
`Chen’s cluster memories are
`not all directly or adjacently
`accessible to other clusters
`
`v Even Dr. Anderson, a person of
`extraordinary skill, and a team of
`engineers including a DSP expert,
`could not successfully port a far
`simpler signal processing software
`to a parallel processing
`architecture after six months, Ex.
`2020 ¶ 31
`
`Sur-reply at 6-7
`
`15
`
`
`
`An ordinary artisan would not have had
`a reasonable expectation of success
`
`Dr. Anderson’s testimony disproves a reasonable expectation of success
`
`v Petitioner’s combination would have
`been beyond the capabilities of the
`POSA, Ex. 2020 ¶¶ 17-19, 27 (p. 16)
`
`v Coordinating multiple caches,
`avoiding memory conflicts,
`controlling task sharing efficiently,
`resolving synchronous
`bottlenecks, addressing
`bandwidth and latency issues, and
`developing messaging strategy
`across and within clusters
`
`v Person of ordinary skill specialized in
`digital signal processing and speech
`recognition, not parallel processing
`architectures or high performance
`computing, id. ¶ 28
`
`Sur-reply at 6-7
`
`16
`
`
`
`Argument Roadmap
`
`v Petitioner has failed to show obviousness for
`limitations 1(d) and 1(e)
`v The evidence proves a POSA would not have had a
`reasonable expectation of success
`v Petitioner’s counter-arguments rest on false logic
`v The evidence proves no motivation to combine
`
`17
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 1: POSITA must be assumed to have requisite knowledge because
`’140 Patent did not address Petitioner’s problems
`
`The problems with Petitioner’s combination arise out of
`the combination, not the invention of the ’140 Patent
`
`The ’140 Patent does not teach Petitioner’s specific
`combination, and its silence cannot support Petitioner
`
`Dr. Anderson testified that the’140 Patent does provide
`novel teachings that are distinct from the combination
`
`Sur-reply at 8-15, Ex. 1035, 23:6-27:3
`
`18
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 2: A POSA’s general knowledge of parallel processing architectures
`for speech recognition would have sufficed to achieve the combination
`
`Prior art is only enabled for what it teaches. None of the
`cited art taught implementing Jiang’s techniques on a
`clustered processor/memory architecture like Chen’s
`
`General knowledge of parallel processing architectures is
`not adequate knowledge to achieve the combination
`
`Chen cannot be assumed to be enabled for every speech
`recognition architecture imaginable
`
`Sur-reply at 15-18
`
`19
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 2: A POSA’s general knowledge of parallel processing architectures
`for speech recognition would have sufficed to achieve the combination
`
`v Even Dr. Anderson, a person of
`extraordinary skill, and a team of
`engineers including a DSP expert,
`could not successfully port a far
`simpler signal processing software
`to a parallel processing
`architecture after six months, Ex.
`2020 ¶ 31
`
`v Petitioner’s combination would
`v Jiang’s Viterbi algorithm was
`cause extensive memory collisions
`unlikely to run successfully on
`Chen’s clusters in a practical
`v every processor in a cluster
`system, Ex. 2020 ¶¶ 29-30
`would be required to
`simultaneously request “the
`v Jiang’s Viterbi algorithm
`particular subset of vocabulary
`requires extensive
`. . . that’s germane to its
`communication, whereas
`context” from a single
`Chen’s cluster memories are
`memory, Ex. 2017, 125:8-
`not all directly or adjacently
`126:5, Ex. 2020 ¶¶ 43-44
`accessible to other clusters
`
`v Petitioner’s combination would not
`operate in real time, Ex. 2020 ¶ 45
`
`Sur-reply at 15-18
`
`20
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 3: “Zentian does not argue that the combination is inoperable, [or]
`could not be done”
`
`Patent Owner need only show Petitioner’s failure of proof
`
`Patent Owner need not show impossibility
`
`Petitioner conflates ordinary skill with extraordinary skill
`
`Sur-reply at 18-19
`
`21
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 4: Zentian’s alleged complications would arise with any clustered
`processor architecture
`
`Petitioner has no evidence to support its allegation
`
`Petitioner again attempts to improperly shift its burden
`
`Petitioner’s problems arise out of Petitioner’s own
`requirements and the prior art’s teachings
`
`Sur-reply at 19, Ex. 2020 ¶¶ 23-32, Ex. 1035 at 23:6-27:3
`
`22
`
`
`
`Petitioner’s arguments rest on false logic
`
`Pet. Arg. 5: Chen envisions its processors and memories are directly and
`adjacently accessible
`
`Chen’s “node switching mechanism” relates to access by
`processors within a cluster to that cluster’s memory, not
`across clusters
`
`Mr. Schmandt, Dr. Anderson, and Chen itself all explain
`that Chen’s relevant embodiment does not permit direct
`or adjacent access to all memories
`
`Sur-reply at 19-22, Ex. 2020 ¶¶ 50-51; Ex. 1003 ¶ 95, Ex. 1005, 9:10-39
`
`23
`
`
`
`Argument Roadmap
`
`v Petitioner has failed to show obviousness for
`limitations 1(d) and 1(e)
`v The evidence proves a POSA would not have had a
`reasonable expectation of success
`v Petitioner’s counter-arguments rest on false logic
`v The evidence proves no motivation to combine
`
`24
`
`
`
`The evidence proves no motivation to combine
`
`Dr. Anderson’s testimony disproves a motivation to combine
`
`v Converting Jiang’s shared memory
`architecture to Chen’s memory
`architecture would require
`significant reprogramming effort
`that would defeat a motivation to
`combine
`
`v Chen’s memory architecture would
`require onerous messaging
`overhead to pass information
`across its memory clusters, as
`shown by Mathew I
`
`v Chen does not allow direct
`communication between all
`clusters, which would be critical for
`Jiang’s Viterbi technique
`
`v The POSA would not have expected
`to successfully manage the
`combination’s complications to
`achieve worthwhile benefits
`
`Sur-reply 22-23, 25-26, Ex. 2020 ¶¶ 42-45
`
`25
`
`
`
`The evidence proves no motivation to combine
`
`Pet. false motivation 1: increased power and speed
`
`Mr. Schmandt provided no analysis as to why Chen would
`allegedly speed up Jiang or relax its pruning threshold, or
`by how much
`
`Mathew I taught that a five-processor parallel processing
`speech recognition system was slower than a two-
`processor one due to high synchronization overhead
`
`POSA would not have assumed the combination of Jiang
`and Chen would have improved processing or relaxed
`Jiang’s pruning threshold
`
`Sur-reply at 21-22; Ex. 2020 ¶¶ 36-37, Ex. 2021 at 11
`
`26
`
`
`
`The evidence proves no motivation to combine
`
`Pet. false motivation 2: cost
`
`v Cost alone would not suffice as a
`motivation in view of the
`incompatibility between Jiang and
`Chen and the POSA’s level of skill
`
`v Mr. Schmandt admitted he did not
`specify any costs that would be
`saved, nor did he state what the
`combination would be cheaper
`than
`
`v He did not compare the cost of
`Chen’s clustered processing
`architecture to any other system
`
`v He did not compare the cost of
`Jiang’s unmodified system with the
`cost of Jiang modified by Chen
`
`Sur-reply at 22, 23-25, Ex. 2017 at 61:14-62:9, 63:8-15, 40:23-41:4, Ex. 2020 ¶¶ 38-39
`
`27
`
`
`
`The evidence proves no motivation to combine
`
`Pet. false motivation 3: flexibility and scalability
`
`v Mr. Schmandt admitted that MARS
`was flexible because its pipeline
`was programmable, and scalable
`because more processors could be
`added to it
`
`v Mr. Schmandt further admitted that
`MARS was being compared to SRI-
`Berkeley, which did not have those
`features
`
`v Petitioner has no showing that
`Jiang or Chen were not already
`flexible (programmable pipeline) or
`scalable (more processors could be
`added)
`
`Sur-reply at 22, 26; Ex. 2017 at 105:8-106:4, Ex. 2020 ¶¶ 40-41
`
`28
`
`
`
`The evidence proves no motivation to combine
`
`Pet. false motivation 4: known technique to improve a similar device in a
`similar way
`
`1. Chen’s clustered processor and memory architecture was not
`“known” for use in speech recognition
`2. Chen’s architecture was not known to improve speech
`recognition
`3. Using more processors was not “known” to improve parallel
`processing speech recognition systems, per Mathew I
`Evidence proves that the combination would not have improved
`Jiang and that Jiang and Chen were ill-suited for combination
`
`4.
`
`Sur-reply at 26, Ex. 2020 ¶¶ 33-45
`
`29
`
`
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