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` UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`APPLE INC.,
`Petitioner,
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`v.
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`Zentian Limited
`Patent Owner.
`____________________
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`Case IPR2023-00037
`Patent No. 10,971,140
`____________________
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`PATENT OWNER’S SUR-REPLY
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`Case IPR2023-00037
`PATENT OWNER’S SUR-REPLY
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`TABLE OF CONTENTS
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`I.
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`II.
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`4
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`1
`4
`8
`15
`18
`19
`19
`21
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`21
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`23
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`A.
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`B.
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`Petitioner has failed to show obviousness as to limitations 1(d) and 1(e)
`The Petition’s combination lacks a reasonable expectation of success
`Patent Owner’s Response presented detailed evidence directed to the
`Petition’s combination and the abilities of the Petition’s POSA
`Petitioner’s Reply fails to rebut Patent Owner’s evidence, and instead
`relies on incorrect premises
`7
`Petitioner’s false logic 1: “a POSITA is assumed to have
`requisite knowledge” to enable the Petition’s combination
`Petitioner’s false logic 2: A POSA would have known how to
`achieve Petitioner’s combination through general knowledge of
`parallel processing architectures and various speech recognition
`systems
`Petitioner’s false logic 3: “Zentian does not argue that the
`combination is inoperable, [or] could not be done. . . .”
`Petitioner’s false logic 4: “Zentian’s alleged complications . . .
`would occur regardless of the type of information being
`processed.” Paper 22 at 14.
`Petitioner’s false logic 5: “Chen envisions its processors and
`memories are directly and adjacently accessible.” Paper 22 at
`16.
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`1.
`2.
`3.
`4.
`5.
`III. The evidence proves no motivation to combine
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`A.
`B.
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`Patent Owner’s Response disproved Petitioner’s motivations
`Petitioner’s attempts to rehabilitate its motivations to combine are
`ineffective
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`Exhibit No.
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`2017
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`2018
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`2019
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`2020
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`2021
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` Case IPR2023-00037
`PATENT OWNER’S SUR-REPLY
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`EXHIBIT LIST
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`Description
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`Deposition of Christopher Schmandt dated September 6, 2023
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`Intentionally left blank
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`Intentionally left blank
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`Declaration of David Anderson, Ph.D
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`Binu K. Mathew et al., A Gaussian Probability Accelerator for
`SPHINX 3, (“Mathew I”)
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`I.
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`Case IPR2023-00037
`PATENT OWNER’S SUR-REPLY
`Petitioner has failed to show obviousness as to limitations 1(d) and 1(e)
`Limitations 1(d) and 1(e) require that the “speech recognition circuit is
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`configured to generate an initial score,” 1(d), which is “used to determine whether
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`to continue processing to determine a final score via processing a larger amount of
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`data than that was processed to generate the initial score.” 1(e).
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`To demonstrate obviousness, Mr. Schmandt and Petitioner were required to
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`explain how Jiang’s tree search 74 modified in view of Chen, i.e., the combination
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`as a whole, would allegedly operate to meet limitations 1(d) and 1(e). ActiveVideo
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`Networks, Inc. v. Verizon, 694 F.3d 1312, 1327 (Fed. Cir. 2012); Ex. 2017 at
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`46:12-22 (Schmandt admitting his theory requires modifying Jiang’s tree search
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`engine 74 to use Chen’s clustered processor architecture); Ex. 2017 at 68:17-25,
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`83:10-14 (Schmandt admitting his theory relies on tree search engine 74 for
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`limitations 1(d) and 1(e)).
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`Mr. Schmandt admitted, however, that his declaration’s discussions of
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`limitations 1(d) and 1(e) contains no such explanation. Ex. 2017 at 79:11-23, 81:8-
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`22, 83:15-18. The Petition fails on that basis alone. ActiveVideo, 694 F.3d at 1327.
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`Moreover, the only theory Mr. Schmandt offered at his deposition was that
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`one processor in one cluster in Chen would have been used to generate the “initial
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` Case IPR2023-00037
`PATENT OWNER’S SUR-REPLY
`score” of limitation 1(d) and to determine whether to continue processing as
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`recited in limitation 1(e). Ex. 2017 at 102:5-103:3.
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`As Patent Owner’s Response demonstrated, however, that theory would fail
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`because it would require one processor in one of Chen’s clusters to receive
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`necessary information from all four memories within Chen’s Fig. 4 embodiment,
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`Paper 19 at 32-34, whereas Mr. Schmandt’s declaration admits that the four
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`memories are not all “interconnected,” and that no one processor in one cluster can
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`directly or adjacently access all of the data stored across the four memories. Paper
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`19 at 34-35; Ex. 1003 ¶ 95; Ex. 2020 ¶¶ 50-51; Ex. 1005, 9:10-39.
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` Case IPR2023-00037
`PATENT OWNER’S SUR-REPLY
`Accordingly, Patent Owner demonstrated that Petitioner has not proven that
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`its combination would meet limitations 1(d) and 1(e).
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`Petitioner’s Reply arguments only further prove that reality. Petitioner
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`argues that “Jiang’s algorithm of generating an initial score and using the initial
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`score to determine whether to continue processing (the functionality of claims
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`1(d)-1(e)) would be replicated across Chen’s processors.” Paper 22 at 2 (emphasis
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`Petitioner’s). That theory, however, does not solve Petitioner’s problems; it makes
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`them worse.
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`First, Petitioner’s Reply theory requires every processor in Chen’s four
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`clusters to perform limitations 1(d) and 1(e), and is thus not Mr. Schmandt’s
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`deposition theory, which required only one processor in one cluster to do so.
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`Petitioner thus abandons its own expert’s testimony, discrediting Mr. Schmandt.
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`Second, Petitioner’s Reply theory would require every processor in Chen’s
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`four clusters to calculate the same initial score and make the same determination
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`whether to continue processing towards a final score—a design proposal that
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`makes no sense and for which Petitioner has provided neither a reasonable
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`expectation of success nor a motivation.
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`Third, Mr. Schmandt’s deposition testimony explained that there would be
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`no advantage from using all of Chen’s processors to calculate the initial score and
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`determine whether to continue processing because “[a]t that point, we have
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`finished our parallel processing operation and we’re back to serial operation.” Ex.
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`2017 at 102:5-103:3.
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`Fourth, Petitioner’s Reply theory would still require each processor to
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`obtain necessary information stored across all four memories 104(a)-(d) in Chen,
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`Ex. 2020 ¶ 51, whereas none of Chen’s processors can directly or adjacently access
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`all cluster memories. Ex. 1003 ¶ 95; Ex. 2020 ¶¶ 50-51; Ex. 1005, 9:10-39. Indeed,
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`Petitioner’s Reply admits that “[o]nce the cumulative probability score is
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`calculated, inter-cluster processing of the results for each tree search would be
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`communicated[.]” Paper 22 at 16. Petitioner’s Reply theory is thus no more
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`feasible than Mr. Schmandt’s deposition theory.
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`Fifth, Petitioner’s Reply theory was not set forth in the Petition. Petitioner’s
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`Reply citations are to aspects of the Petition discussing other limitations, not
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`limitations 1(d) and 1(e). Paper 22 at 2 (citing Pet. at 1, 17-18, 24, 30, Ex. 1003 ¶¶
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`74, 76-77, 83). Petitioner’s Reply theory is thus foreclosed.
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`Accordingly, Petitioner has not proven unpatentability.
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`II. The Petition’s combination lacks a reasonable expectation of success
`A.
`Patent Owner’s Response presented detailed evidence directed to
`the Petition’s combination and the abilities of the Petition’s POSA
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`Patent Owner’s Response demonstrated through extensive evidence that the
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`Petition’s combination lacks a reasonable expectation of success. Paper 19 at 7-16.
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`Each aspect of Patent Owner’s argument was directed to problems and deficiencies
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`arising out of the Petition’s specific combination, not the ’140 Patent. Id.
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`In particular, Patent Owner’s Response proved:
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`• The Petition’s combination requires performing the speech recognition
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`techniques of Jiang on the clustered processor and memory architecture of
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`Chen, Ex. 1003 ¶ 68;
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`• Jiang does not enable performing its speech recognition on Chen’s clustered
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`processors, nor does Chen enable using its hardware to perform Jiang’s
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`speech recognition, Ex. 2017 at 86:9-17, Ex. 2020 ¶ 24;
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`• Mr. Schmandt’s declaration did not provide any underlying details to
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`support his conclusion as to the POSA’s capability, Ex. 2017 at 48:13-21;
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`• Mr. Schmandt has never supervised anyone involved in mapping a speech
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`recognition model to a clustered processor and memory architecture like
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`Chen’s, Ex. 2017 at 145:20-24, nor has he built the processor to memory
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`architecture of any speech recognition system identified in his background
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`experience, Id. at 34:24-35:5, 32:3-9, 106:10-23.
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`• Implementing the Petition’s combination of Jiang and Chen would have
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`been highly complex and well beyond the skill level of the POSA prior to
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`the ’140 Patent, Ex. 2020 ¶¶ 17-19, 27 (page 16), because:
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`o porting Jiang’s speech recognition techniques to Chen’s clustered
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`parallel processors and memories would have required coordinating
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`multiple caches, avoiding memory conflicts, controlling task sharing
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`in an efficient manner, resolving synchronous bottlenecks, addressing
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`communication bandwidth and latency issues among the various
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`hardware, and developing a messaging strategy to coordinate
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`information sharing between and within the clusters, Ex. 2020 ¶ 27,
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`whereas;
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`o the ordinary artisan in the field of speech recognition was a specialist
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`in digital signal processing and speech recognition, not parallel
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`processing architectures or high performance computing, Ex. 2020 ¶
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`28, and further because;
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`o Jiang teaches the use of the Viterbi decoding algorithm, which
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`requires extensive communication between computational
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`components of a system, whereas Chen’s cluster memories are not all
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`directly or adjacently accessible to the processors and memories in
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`each other cluster, rendering it unlikely that Jiang’s Viterbi algorithm
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`could successfully be run on Chen’s clustered processors in a practical
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`system. Ex. 2020 ¶ 29;
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`o It was known in the art that communication between parallel
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`processing nodes can determine the feasibility of a parallel processing
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`architecture for a given problem, and that a memory model in which
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`memory is connected only within a cluster (as in Chen) may be
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`appropriate “for applications that require little or no communication,”
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`whereas Jiang’s speech recognition stage requires significant
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`communication, and is thus poorly suited for Chen. Ex. 2020 ¶ 30;
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`o Even Dr. Anderson, who is a person of extraordinary skill, along with
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`a team of engineers and a DSP expert from Texas Instruments, could
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`not successfully transition existing signal processing software to a
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`parallel processing architecture after six months. Ex. 2020 ¶ 31.
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`B.
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`Petitioner’s Reply fails to rebut Patent Owner’s evidence, and
`instead relies on incorrect premises
`In the face of the extensive evidence summarized above, Petitioner does not
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`present a supplemental declaration from Mr. Schmandt. Moreover, Petitioner
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`abandoned its deposition of Dr. Anderson after merely one hour, and thus has
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`nothing substantive to introduce from Dr. Anderson’s testimony. Ex. 1035.
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`Instead, Petitioner’s Reply presents a series of incorrect conclusions built on
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`inaccurate or inapplicable premises. Each of Petitioner’s logically false arguments
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`is addressed and refuted in turn below.
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`1.
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`Petitioner’s false logic 1: “a POSITA is assumed to have
`requisite knowledge” to enable the Petition’s combination
`Petitioner attempts to conflate the Petition’s combination with the
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`embodiments and claims of the ’140 Patent. Petitioner argues that if the patent did
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`not discuss the problems with the Petition’s combination, it must be assumed that
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`the POSA would have known how to overcome the problems with the Petition’s
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`combination. Paper 22 at 4-6. That logic is false.
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`“Skill in the art does not act as a bridge over gaps in substantive presentation
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`of an obviousness case, but instead supplies an important guarantee of objectivity
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`in the process.” Al-Site Corp. v. VSI Int'l, Inc., 174 F.3d 1308, 1324 (Fed. Cir.
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`1999) (emphasis added).
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`Here, the Petition’s combination begins with Jiang and Chen, and proposes
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`to combine those references in particular ways that neither reference enables.
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`Section II.A, supra. Petitioner has failed to demonstrate through actual evidence
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`that the POSA, as defined in the Petition, would have the necessary skill or
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`knowledge to in fact achieve the Petition’s combination with a reasonable
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`expectation of success. Section II.A, supra. Patent Owner has demonstrated
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`through detailed evidence that the POSA could not. Section II.A, supra.
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`Petitioner’s assertion that the POSA should be “assumed to have requisite
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`knowledge” to achieve the Petition’s contorted and highly complex combination,
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`Paper 22 at 4, is the essence of hindsight bias. Petitioner cannot weaponize the
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`level of ordinary skill in the art, which is a safeguard against hindsight bias, to fill
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`substantive gaps in its obviousness case. Al-Site, 174 F.3d at 1324.
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`Petitioner’s premise is that if the ’140 Patent did not teach how to solve the
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`specific problems arising out of Petition’s combination, then the Board must
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`conclude that the POSA would know how to solve Petitioner’s problems. Paper 22
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`at 2-5. That reasoning is false: the ’140 Patent does not teach performing Jiang’s
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`speech recognition techniques, which require extensive communication between a
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`system’s computational components, within memory and processor clusters that
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`are not all directly or adjacently accessible to each other, as Petitioner’s
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`combination requires. Ex. 2020 ¶¶ 29-30. The ’140 Patent thus has no reason to
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`teach solutions to problems arising out of Petitioner’s combination. Paper 22 at 4.
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`The patent’s silence on those issues is certainly not evidence that the solutions
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`were within the skill level of the Petition’s POSA. The consequence of the
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`Petition’s absurd combination theory lies with Petitioner, not Patent Owner.
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`Moreover, Dr. Anderson explained at his deposition that the ’140 Patent
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`does provide important teachings and solutions that Petitioner has not shown were
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`known in the prior art, and that are distinct in key respects from Petitioner’s
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`combination of Jiang and Chen. Ex. 1035 at 23:6-27:3.
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`Petitioner may not, of course, demonstrate obviousness based on the ’140
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`Patent’s own teachings. “[T]he inventor’s own path itself never leads to a
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`conclusion of obviousness; that is hindsight.” Univ. of Strathclyde v. Clear-Vu
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`Lighting LLC, 17 F.4th 155, 162 (Fed. Cir. 2021) (emphasis added); TQ Delta,
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`LLC v. Cisco Sys., 942 F.3d 1352, 1362 (Fed. Cir. 2019).
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`Petitioner’s case law citations do not establish otherwise. In Uber Techs.,
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`Inc. v. X One, Inc., 957 F.3d 1334, 1339 (Fed. Cir. 2020), the issue was whether a
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`POSA would have been motivated to select between one of only two known, finite
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`approaches. Because the challenged patent was directed to both solutions, the
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`Federal Circuit held that the appropriate choice was within the level of skill of the
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`POSA. Id. Here, the issue is expectation of success, not motivation to combine,
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`there are not finite choices, and the ’140 Patent does not teach Petitioner’s
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`combination.
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`In In re Publicover, 813 F. App’x 527, 531-32 (Fed. Cir. 2020), the prior art
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`and the challenged patent both taught identification of vestibulo-ocular movement,
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`a type of eye movement. Patent Owner presented only “attorney argument,” not
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`evidence, that the prior art’s disclosures failed to adequately explain how to
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`identify that type of eye movement. Id. The Federal Circuit rejected that “attorney
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`argument” because the challenged patent likewise taught identifying that type of
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`eye movement but did not provide a detailed teaching of how to do so. Id. Here,
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`neither Jiang nor Chen teaches implementing Jiang’s speech recognition
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`techniques on a clustered parallel processing, shared cluster-memory
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`architecture—much less in the manner Petitioner has proposed. Ex. 2017 at 86:9-
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`17, Ex. 2020 ¶ 24. Accordingly, the prior art does not and cannot carry any
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`presumption of enablement as to Petitioner’s combination. In re Antor Media
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`Corp., 689 F.3d 1282, 1287-88 (Fed. Cir. 2012) (prior art only presumed enabling
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`for what it teaches). Moreover, the ’140 Patent teaches approaches that are distinct
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`in key respects from Petitioner’s combination of Jiang and Chen, and provides
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`solutions that, in any case, have not been shown in the prior art. Ex. 1035 at 23:6-
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`27:3. Thus, the ’140 Patent provides no assumption that Petitioner’s combination
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`was within the POSA’s skill. Finally, Patent Owner’s demonstration of a lack of a
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`reasonable expectation of success in this proceeding is based on extensive
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`evidence, not “attorney argument.” Publicover is thus inapposite.
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`In re Epstein, 32 F.3d 1559, 1568 (Fed. Cir. 1994), fails to support Petitioner
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`for the same reasons. There, the Federal Circuit simply held that “one of skill in the
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`art would have known how to implement the features of the references” as taught
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`in each reference individually. Id. (emphasis added). Here, Petitioner’s
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`combination does not simply require practicing what Jiang or Chen taught
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`individually—it requires a combination that neither reference taught, and that a
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`POSA would not have been able to achieve. Ex. 2020 ¶¶ 23-32 (pages 15-20).
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`Petitioner’s reliance on the Board’s decisions in Walmart and Samsung is
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`misplaced because those decisions do not carry legal authority. Nonetheless, both
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`decisions also fail to support Petitioner’s argument.
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`In Walmart, the Board relied on the challenged patent’s teaching that “a
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`plurality of light panels 40 may be disposed end to end,” and the patent’s silence as
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`to how to address challenges that would arise “when disposing the panels in
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`electrical series.” IPR2022-00534, Paper 50 at 32 (emphasis added). By contrast,
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`the problems Patent Owner has identified with Petitioner’s combination do not
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`arise out of practicing what the ’140 patent itself teaches; they arise out of
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`Petitioner’s combination design. The Board’s decision in Walmart is thus
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`inapposite.
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`In Samsung, the prior art disclosed wireless communication, and thus was
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`entitled to a presumption of enablement for its own teachings. IPR2022-00324,
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`Paper 33 at 36-37. Moreover, the challenged patent itself disclosed the same
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`wireless communication techniques as the prior art without implementation details.
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`By contrast, the problems with Petitioner’s combination here do not arise out of the
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`individual teachings of any reference, but from a combination of teachings that is
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`neither disclosed nor enabled by either reference. Section II.A, supra. Petitioner’s
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`combination thus carries no presumption of enablement. Nor does the ’140 patent
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`disclose Petitioner’s combination without implementation details. Ex. 1035 at
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`23:6-27:3.
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`Petitioner’s reliance on Keynetik is further misplaced. Paper 22 at 6. There,
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`the patent owner had “cited no evidence” to contradict petitioner’s assertions of a
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`reasonable expectation of success, and had instead relied only on “attorney
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`argument.” Keynetik, Inc. v. Samsung Elecs. Co., Ltd., 2023 U.S. App. LEXIS
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`3567, at *3-4 (Fed. Cir. 2023). The Federal Circuit held that even though
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`petitioner’s alleged evidence was “brief, in the absence of any contradictory
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`evidence, it constitutes substantial evidence to support the Board’s finding.” Id.
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`Here, by contrast, Patent Owner has presented extensive evidence disproving a
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`reasonable expectation of success, and showing that Petitioner’s combination
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`would not have simply required routine and simple software programming within
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`the POSA’s skill. Section II.A, supra. In particular, Dr. Anderson (one of
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`extraordinary skill) has testified that he and a team of engineers failed to
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`successfully port far simpler signal processing software to a parallel processing
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`hardware architecture. Ex. 2020 ¶ 31. Keynetik is thus inapposite.
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`Finally, the problems Patent Owner has identified with respect to
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`Petitioner’s combination are not “generic,” as Petitioner contends. Paper 22 at 7.
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`They are highly detailed and specific to Petitioner’s combination, and supported by
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`the testimony of both experts. Section II.A, supra; Ex. 1035 at 23:6-27:3. For the
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`same reasons, the challenged claims do not need to recite either the problems
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`arising from Petitioner’s combination theory or the solutions to those problems, as
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`Petitioner argues. Paper 22 at 7. The question of a reasonable expectation of
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`success for the combination must be assessed based on the details Petitioner has
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`proposed for the combination, not the words of the challenged claims. Arctic Cat
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`Inc. v. Bombardier Rec. Prods., 876 F.3d 1350, 1360-61 (Fed. Cir. 2017)
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`(requiring proof that “an ordinarily skilled artisan would [ ] believe that a
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`particular combination would have a reasonable expectation of ‘anticipated
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`success’) (emphasis added).
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`2.
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`Petitioner’s false logic 2: A POSA would have known how
`to achieve Petitioner’s combination through general
`knowledge of parallel processing architectures and various
`speech recognition systems
`Petitioner argues that because Jiang allegedly taught “using multiple
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`processors,” and because references like Mathew taught parallel processing in
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`speech recognition, it follows that the POSA would have known how to achieve
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`Petitioner’s specific combination of Jiang and Chen. Paper 22 at 11-15.
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`That logic is false. Prior art is only presumptively enabled for what it
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`teaches. In re Antor Media Corp., 689 F.3d 1282, 1287-88 (Fed. Cir. 2012). Mr.
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`Schmandt has admitted that neither Chen nor Jiang teaches Petitioner’s
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`combination, and thus neither reference is entitled to a presumption of enablement
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`with respect to Petitioner’s combination, as Petitioner contends. Compare Paper 22
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`at 12-15 with Ex. 2017 at 86:9-17, Ex. 2020 ¶¶ 23-32 (p. 15-19); Raytheon Techs.
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`Corp. v. GE, 993 F.3d 1374, 1380-81 (Fed. Cir. 2021). Even assuming Chen
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`teaches an “operable clustered processor architecture,” Paper 22 at 15, Chen does
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`not teach or enable using its architecture to run Jiang’s speech recognition
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`techniques (much less in the manner the Petition has proposed), or to run any
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`speech recognition. Ex. 2017 at 86:9-17.
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`And Petitioner itself states that “Mathew is dissimilar architecture” to the
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`combination, so Mathew could not have enabled the combination. Paper 22 at 21
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`(emphasis added). The same is true for Hon and Ravishankar. Indeed, the evidence
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`is uncontroverted that Petitioner’s combination appears nowhere in the prior art,
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`but is instead a novel fabrication concocted from multiple modifications to the
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`teachings of two entirely distinct references, one of which (Chen) is not even in the
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`field of speech recognition, in a manner not taught or enabled by any reference.
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`Section II.A, supra. The law does not permit assuming a combination to be
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`enabled when the prior art of record does not enable the combination. Raytheon,
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`993 F.3d at 1380-81.
`
`
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`Moreover, Dr. Anderson’s detailed testimony refutes Petitioner’s conclusory
`
`assumptions of a reasonable expectation of success. Ex. 2020 ¶¶ 23-32. Indeed, Dr.
`
`Anderson has explained that, despite his extraordinary level of skill, and the help
`
`of multiple other engineers, he could not successfully transition existing signal
`
`processing software to a parallel processing architecture after many months. Ex.
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`2020 ¶ 31.
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`Petitioner argues that Dr. Anderson’s testimony merely “impugns Dr.
`
`
`
`
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`Anderson’s credibility,” but “does not prove a POSITA would lack the knowledge
`
`to reasonably succeed in the combination.” Paper 22 at 10-11. That is incorrect. Dr.
`
`Anderson’s testimony demonstrates that even a person of extraordinary skill in the
`
`art “could not necessarily expect success with respect to far simpler combinations
`
`than the one the Petition has proposed,” Ex. 2020 ¶ 31, and thus supports the
`
`credibility of Dr. Anderson’s testimony that the Petition’s combination was beyond
`
`the level of ordinary skill. Ex. 2020 ¶¶ 23-32 (pages 15-20). Petitioner
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`hypothecates that “[p]erhaps Dr. Anderson simply did not have the necessary
`
`skills,” Paper 22 at 11, but Dr. Anderson’s qualifications and experience far exceed
`
`Mr. Schmandt’s, and Petitioner did not even attempt to question Dr. Anderson
`
`regarding the challenges he faced in porting existing signal processing software to
`
`a parallel processing architecture. Ex. 1035.
`
`
`
`By contrast, Mr. Schmandt’s lack of experience in building the processor to
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`memory architecture of any speech recognition system, Ex. 2017 at 34:24-35:5,
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`32:3-9, 106:10-23, or supervising anyone involved in mapping a speech
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`recognition model to a clustered memory and processor architecture, id. at 145:20-
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`24, greatly undermines his opinions regarding a reasonable expectation of success.
`
`And Mr. Schmandt’s opinion is further discredited by his testimony that his
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`declaration does not explain how a POSA could have achieved his combination,
`
`
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`Ex. 2017 at 48:13-21.
`
`
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`Petitioner argues that Mr. Schmandt’s testimony is admissible despite those
`
`flaws, Paper 22 at 9-10, but the issue here is not admissibility but rather credibility.
`
`Mr. Schmandt’s conclusory assertions of a reasonable expectation of success
`
`should be given no weight in view of the evidence of record, including his own
`
`admissions.
`
`3.
`
`Petitioner’s false logic 3: “Zentian does not argue that the
`combination is inoperable, [or] could not be done. . . .”
`Petitioner appears to suggest that Patent Owner must prove that Petitioner’s
`
`
`
`combination could never be achieved even with unlimited knowledge, skill, and
`
`resources. Paper 22 at 18. That is false. Patent Owner need only demonstrate that
`
`Petitioner has not proven that a person of ordinary skill in the art at the time of the
`
`invention would have reasonably expected to succeed in combining the prior art
`
`elements in the way Petitioner has proposed. KEYnetik, Inc. v. Samsung Elecs.
`
`Co., 841 F. App’x 219, 227 (Fed. Cir. 2021); Arctic Cat Inc. v. Bombardier Rec.
`
`Prods., 876 F.3d 1350, 1360-61 (Fed. Cir. 2017); In re Cyclobenzaprine
`
`Hydrochloride Extended-Release Capsule Patent Litig., 676 F.3d 1063, 1069 (Fed.
`
`Cir. 2012). Patent Owner has met and exceeded that requirement. Section II.A,
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` Case IPR2023-00037
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`supra. Petitioner’s arguments fundamentally ignore the crucial distinction between
`
`
`
`persons of ordinary skill and those of extraordinary skill.
`
`4.
`
`Petitioner’s false logic 4: “Zentian’s alleged complications
`. . . would occur regardless of the type of information being
`processed.” Paper 22 at 14.
`Petitioner contends that the problems arising out of its combination would
`
`
`
`occur in any clustered processing architecture. Paper 22 at 14. But Petitioner cites
`
`no evidence in support of that assertion. Id.
`
`
`
`Petitioner later attempts to flip its burden onto Patent Owner, arguing that
`
`Zentian never explains why certain problems “would be present in the combination
`
`but not” in the system of Claim 1. Paper 22 at 20. That argument also fails.
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`Petitioner cannot shift its burden of proof to Patent Owner. Nonetheless, Patent
`
`Owner has demonstrated in detail that Petitioner’s problems arise out of the
`
`requirements Petitioner and its expert have identified for Petitioner’s combination,
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`and the teachings of the prior art references they have relied upon, Ex. 2020 ¶¶ 23-
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`32, not the ’140 Patent. Ex. 1035 at 23:6-27:3.
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`5.
`
`Petitioner’s false logic 5: “Chen envisions its processors and
`memories are directly and adjacently accessible.” Paper 22
`at 16.
`Petitioner admits that its combination must communicate the probability
`
`
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`scores calculated by the various processors and stored within the various memories
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`of Chen’s clusters across the different clusters. Paper 22 at 16 (“Once the
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`
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`cumulative probability score is calculated, inter-cluster processing of the results of
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`each tree search would be communicated”).
`
`
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`Petitioner instead contends that Chen’s “processors and memories are
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`directly and adjacently accessible.” Id. But Petitioner cites no testimony from its
`
`expert witness. Instead, it cites to Chen’s “Prior Art” discussion, where Chen
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`theorizes an idealized parallel processing system in general terms. Id. (citing Ex.
`
`1005 at 1:56-2:1). That passage of Chen does not describe the embodiment
`
`Petitioner relies upon. Rather, Mr. Schmandt’s own declaration stated that in the
`
`relevant embodiment of Chen, “not all[ ] the clusters are interconnected,” and “the
`
`processors 102a in cluster 100a . . . cannot directly or adjacently access the
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`memory 104d of cluster 100d, while processors 102d in cluster 100d . . . cannot
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`directly or adjacently access the memory 104a.” Ex. 1003 ¶ 95. That fact is further
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`set forth in Chen, Ex. 1005 at 9:10-39, and is demonstrated by Dr. Anderson. Ex.
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`2020 ¶¶ 50-51. Petitioner’s Reply contention is thus false.
`
`
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`Petitioner next argues that Chen’s “node switching mechanism” permits the
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`necessary communications between different cluster processors and memories.
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`Paper 22 at 17. Again, Petitioner does not cite to any testimony from Mr.
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`Schmandt. And once again, Petitioner’s assertions are false. Petitioner cites to
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`Chen at 5:54-6:3, which explains that the “two or more processors, and one or
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`
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`more input/output ports” within a single cluster are “symmetrically connected by a
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`node switching mechanism to a homogenous cluster shared memory.” Id.
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`(emphasis added). Thus, Chen’s “node switching mechanism” allows processors
`
`within one cluster to access the “cluster shared memory” of that same cluster, and
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`thus does not support Petitioner or disprove Patent Owner. Petitioner’s citation to
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`Chen at 10:36-55 contains the same teaching, describing access by processors 102a
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`within cluster 104a to the memory 100a of that same cluster. Ex. 1005 at 10:36-
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`55. Petitioner’s citation to Chen at 8:52-64 is likewise off the mark. That passage
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`does not address or negate Chen’s express teachings at 9:34-39 that the processors
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`in cluster 100a cannot directly or adjacently access the memory of cluster 100d,
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`and the processors of cluster 100d cannot directly or access the memory of cluster
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`100a. Ex. 1005 at 9:34-39, Ex. 1003 ¶ 95, Ex. 2020 ¶¶ 50-51.
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`III. The evidence proves no motivation to combine
`A.
`Patent Owner’s Response disproved Petitioner’s motivations
`Patent Owner’s Response refuted each of the Petition’s motivations through
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`
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`
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`the testimony of both experts. Paper 19 at 17-28.
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`
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`With respect to increasing processing power and speed, Mr. Schmandt’s
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`declaration did not provide any analysis to explain why Chen would allegedly
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`speed up Jiang or relax its pruning threshold, or by how much. Ex. 2020 ¶ 35. To
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`
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`the contrary, Mathew I taught that a five-processor system parallel processing
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`speech recognition system was slower than a two-processor system due to high
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`synchronization

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