(12) United States Patent
`Hwang
`
`USOO6252907B1
`(10) Patent No.:
`US 6,252,907 B1
`(45) Date of Patent:
`Jun. 26, 2001
`
`(54) DEMULTIPLEXER AND TRANSPORT
`DECORDER EMPLOYING THE SAME
`
`(75) Inventor: Sung Bae Hwang, Seoul (KR)
`(73) Assignee: LG Electronics Inc., Seoul (KR)
`(*) Notice:
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(21) Appl. No.:
`08/998,076
`(22) Filed:
`Dec. 24, 1997
`Foreign Application Priority Data
`(30)
`Dec. 27, 1996 (KR) ................................................. 96/73516
`(51) Int. Cl." ................................................... H04N 7/18
`(52) U.S. Cl. ................................. 375/240.25; 375/240.26
`(58) Field of Search ..................................... 348/387, 423,
`348/462, 465, 845, 845.1, 845.2, 845.3,
`10; 370/465, 477, 516; 386/68, 81, 88;
`375/240.25, 240.26
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`5,966,385 * 10/1999 Fujii et al. ........................... 348/423
`6,021,440
`2/2000 Post et al. ............................ 348/423
`6,031,960
`2/2000 Lane ..................................... 348/423
`
`* cited by examiner
`
`Primary Examiner Andy Rao
`(57)
`ABSTRACT
`The transport decoder is disclosed including: a demulti
`plexer for demultiplexing an input transport Stream, to
`output PID streams desired by a user in the form of transport
`Stream, and outputting the transport Stream other than the
`PID Stream according to an output control Signal Selected by
`the user; a storage for Storing the transport Stream output
`from the demultiplexer; Second, third and fourth decoders
`for decoding Video data, audio data and additional data
`according to a Select control Signal Selected by the Suer,
`respectively; a first decoder for decoding the transport
`Stream, to decode the Stream other than the currently being
`decoded Video data Stream, audio data Stream and additional
`data Stream according to a Selection of the user, and to
`transmit it; and control means for providing the output
`control Signal.
`
`5,742,361
`
`4/1998 Nakase et al. ....................... 348/845
`
`19 Claims, 8 Drawing Sheets
`
`---------------------------------
`
`transport
`streom
`
`error.
`correction
`interface
`
`first
`
`106
`
`Sync.
`detector
`
`108
`
`107
`
`first
`
`first
`
`100 1 NL
`
`109
`
`SeCOO
`
`113
`
`
`
`decoder
`
`
`
`
`
`third
`
`-
`
`10.
`103
`
`400
`
`interface
`
`117
`
`116
`
`Second
`interface
`
`buffer
`
`fost doto
`port
`
`118
`
`intere
`
`video doto
`audio do to
`
`controller(500)
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 1 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 1 of 8
`
`US 6,252,907 B1
`
`FIG.1A
`background art
`
`10
`
`
`
`12
`
`14
`
`video data
`
`first
`encoder
`
`first
`pocketizer
`
`Oudio doto
`
`
`
`second
`encoder
`
`Second
`pocketizer
`
`11
`
`13
`
`multi
`plexer
`
`transport
`stream
`
`FIG.1B
`background Ort
`
`transport
`hedder
`
`
`
`PES
`heoder
`
`PES
`hedder
`
`HE PA - A PAH Pv H
`
`.
`
`H Py
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 2 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 2 of 8
`
`US 6,252,907 B1
`
`FIG.2A
`background art
`
`23
`
`SeCdnd
`decoder
`
`
`
`home first decod
`
`demultipl
`
`clock
`
`
`
`video do to
`
`
`
`
`
`third
`decoder
`
`Oudio data
`
`24
`
`FIG.2B
`background art
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 3 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 3 of 8
`
`US 6,252,907 B1
`
`FIG.2C
`background art
`
`FIG.2d
`background Ort
`
`transport
`bit Streom
`
`31
`
`audio, video(MPEG)
`
`first transport
`deCOder
`
`33
`
`
`
`
`
`Second transport
`decoder
`
`
`
`
`
`Writing Oudio, video
`doto including header
`
`recording
`medium
`
`
`
`34
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 4 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 4 of 8
`
`US 6,252,907 B1
`
`FIG.5O
`
`transport bit stream
`
`
`
`
`
`
`
`tronsport bit stream
`
`51
`
`Controller
`
`to recording
`device
`
`( PES/PS
`TS hedder y
`
`decoder
`
`decoder
`
`audio/video/PS
`(MPEG)
`
`control signal
`
`53
`
`to display
`
`FIG.3b
`
`
`
`
`
`transport stream
`
`buffer header
`
`51
`-1
`
`500
`
`to recording
`device
`
`le al 51-2
`
`
`
`51-3
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 5 of 15
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`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 5 of 8
`
`US 6,252,907 B1
`
`FIG.5C
`
`clock controller
`
`200
`
`100
`
`transport
`StreOm
`
`
`
`
`
`demultiplexer
`
`
`
`
`
`
`
`Controller
`
`300
`
`400
`
`first decoder
`
`500
`
`second decoder
`third decoder
`fourth decoder
`
`600
`
`700
`800
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 6 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 6 of 8
`
`US 6,252,907 B1
`
`quod
`
`
`
`D?Dp ?SD)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 7 of 15
`
`

`

`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 7 of 8
`
`US 6,252,907 B1
`
`FIG.5
`
`101
`
`doto
`clock
`P/S mode
`
`t
`error COrrectOn
`interface
`
`to first
`O TrS
`buffer
`
`FIG.6
`
`7
`
`5 4
`
`FIG.7
`
`15
`
`DENDS FOR
`
`12
`
`PD
`
`O
`
`O
`
`7
`
`6
`
`4 3
`
`O
`
`
`
`FIG.8
`
`114
`
`third interfoCe
`
`deC-doto
`video Strb
`Oudio Strb
`Aux-Strb
`Audio-serial
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 8 of 15
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`

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`U.S. Patent
`
`Jun. 26, 2001
`
`Sheet 8 of 8
`
`US 6,252,907 B1
`
`FIG.9
`
`103
`
`first interfoce
`
`Oddress
`row 0
`row 0
`Colume 0
`Colume 1
`
`FIG.10
`
`
`
`118
`
`fourth interface
`
`
`
`
`
`16/8mode outd
`
`Oddr
`
`Strb
`
`r/W
`
`reddy
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 9 of 15
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`

`

`1
`DEMULTIPLEXER AND TRANSPORT
`DECORDER EMPLOYING THE SAME
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`The present invention relates to a demultiplexer and
`transport decoder employing the demultiplexer.
`2. Discussion of Related Art
`There have been proposed a lot of methods for
`transmission/reception format for digital processed picture
`and audio data between media. One of them is MPEG 2
`system part proposed by MPEG 2, which makes picture
`compressed and audio-compressed data in a format which
`can be easily used, to transmit and receive the data between
`media. In the transmission and reception of Video data and
`audio data, the Video data and audio data are encoded,
`compressed, and multiplexed by MPEG transport encoder,
`to be transmitted. The multiplexed Stream is received, and
`demultiplexed by MPEG transport decoder, and the video
`data and audio data are decoded by MPEG video decoder
`and audio decoder respectively, to be Supplied to a user.
`FIG. 1A is a block diagram of a conventional MPEG
`decoder. The configuration and operation of the conven
`tional MPEG decoder is explained with reference to FIG.
`1A. The MPEG encoder includes; first and second encoders
`10 and 11 for encoding input video data and audio data, to
`output video bit Stream and audio bit Stream, respectively,
`first and Second packetizers 12 and 13 for packetizing the
`video bit stream and audio bit stream sent from first and
`second encoders 10 and 11; and a multiplexer 14 for
`multiplexing the packetized bit Streams, to make one bit
`Stream, and Store or transmit it.
`When video data is received, first encoder 10 compresses/
`codes the video data, to convert is into MPEG video bit
`Stream. When audio data is received, Second encoder 11
`35
`compresses/codes the audio data, to convert it into MPEG
`audio bit stream. The MPEG video bit stream converted by
`first encoder 10 is sent to first packetizer 12, to be packetized
`in a proper length and output to multiplexer 14. The audio
`bit Stream compressed by Second encoder 11 is Sent to
`Second packetizer 13, to be packetized in a proper length and
`output to multiplexer 14.
`The Video and audio Streams are multiplexed by
`multiplexer, 14, to be converted into one bit Stream, and
`stored or transmitted through a channel. Multiplexer 14, the
`transport multiplexer, not only receives MPEG video bit
`Stream and audio bit stream but multiplexed compressed/
`coded Video Stored or transmitted through a channel. Mul
`tiplexer 14, the transport multiplexer, not only receives
`MPEG video bit stream and audio bit stream but multiplexes
`compressed/coded Video Stream and audio Stream other than
`the MPEG video and audio bit streams, to store them as one
`bit stream and transmit it through a channel. To decode a
`program consisting of Video data and audio data and provide
`a user with it, a desired bit Stream must be Selected. For this,
`it is required that a specific identification (ID) is given to
`each bit stream, and information on the ID is additionally
`provided. Accordingly, the additional data is Sent to the
`transport Stream by multiplexer 14, to be Stored or trans
`mitted. The configuration of the transport bit Stream is
`shown in FIG. 1B. In FIG. 1B, reference numeral H repre
`Sents headers of the transport bit Stream, PA and PA
`represent audio signal Sections, PV and PV represent video
`Signal Sections, and hatched portion represents headers of
`packetized element stream (PEG).
`FIG. 2A illustrates a conventional typical MPEG transport
`decoder. The streams stored in multiplexer 14 shown in FIG.
`
`50
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`40
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`US 6,252,907 B1
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`1O
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`15
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`25
`
`2
`1A or transmitted through a channel, that is, the Streams
`transmitted through the airwaves, or stored is a CD-ROM
`and then reproduced, are applied to a first decoder 20 shown
`in FIG. 2A. First decoder 20 tunes and demodulates a signal
`input and audio Stream, and outputs them to Second and third
`decoderS 23 and 24, respectively.
`Second decoder 23 decodes the Video Stream, to repro
`duce a Video signal according to an output timing Signal
`supplied from a clock controller 22. Third decoder 24
`decodes the audio Stream, to reproduce an audio signal
`according to the output timing control Signal applied from
`clock controller 22. The Video and audio signals output from
`second and third decoders 23 and 24 are MPEG signals
`which do not include the above-described headers as shown
`in FIG. 2C. These signals are not used for recording but used
`for displaying. In other words, demultiplexer 21 outputs the
`audio data and Video data having no headers, decodes and
`displays them. Thus, when the data having no header is
`Stored in a recording medium, it is impossible to reproduce
`the data from the medium.
`That is, data is output from demultiplexer 21 in the form
`of packet, and multiple packets are divided into audio packet
`and Video packet depending on their header information.
`Accordingly, because the conventional transport decoders
`output only audio data and Video data which do not include
`header information, when the data is recorded in a recording
`medium, and then reproduced, it is impossible to confirm if
`the reproduced data is the audio packet or Video packet.
`Thus, correct decoding cannot be performed. To enable the
`transport decoder to output both audio and Video data for
`display as shown in FIG. 2C and audio Video data including
`headers for recording as shown in FIG. 2B, it requires two
`transport decoders 31 and 32 shown in FIG. 2D.
`First transport decoder 31 outputs the data for displaying,
`and Second transport decoder 32 outputs the data including
`headers for recording. The data for displaying is displayed
`through a display 33, and data for recording is recorded in
`a recording medium 34. Here, clock controller 22 controls
`timing between Second decoder 23, third decoder 24, demul
`tiplexer 21, to adjust lip Sync or decoding rate between Video
`data and audio data. Due to the broad and complicated
`transport Stream of the conventional transport decoder, there
`are developing lots of program type transport demultiplex
`erS. However, these demultiplexers can be variously applied
`according to programs, but their operation Speed is deterio
`rated. Furthermore, the demultiplexerS require additional
`cores other than necessary logics, increasing their sizes.
`SUMMARY OF THE INVENTION
`Accordingly, the present invention is directed to a demul
`tiplexer and transport employing the same that Substantially
`obviates one or more of the problems due to limitations and
`disadvantages or the related art.
`An object of the present invention is to provide a transport
`demultiplexer which outputs recording data including
`headers, and Simultaneously, outputs displaying data includ
`ing no deader.
`Another object of the present invention is to provide a
`hard-wired transport demultiplexer having Smaller size and
`faster Speed.
`Still another object of the present invention is to provide
`a transport decoder which employing the aforementioned
`transport demultiplexer.
`Additional features and advantages of the invention will
`be set forth in the description which follows, and in part will
`be apparent from the description, or maybe learned by
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 10 of 15
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`

`3
`practice of the invention. The objectives and other advan
`tages of the invention will be realized and attained by the
`Structure particularly pointed out in the written description
`and claims hereof as well as the appended drawings.
`To achieve these and other advantages and in accordance
`with the purpose of the present invention, as embodied and
`broadly described, the demultiplexer, includes: a buffer for
`temporarily Storing and outputting a transport Stream, the
`transport Stream consisting of header portion and payload
`portion, the header portion including a transport header and
`PES/PSI header; a controller for receiving the transport
`Stream output from the buffer, and being operated according
`a mode Signal applied thereto, to output the header portion
`and payload portion of the transport Stream without any
`changes, a PES/PSI decoder for receiving the transport
`Stream output from the buffer, and being operated according
`to the mode signal applied thereto, to decode only PES/PSI
`header and output only payload portion; and a transport
`header decoder for detecting the transport header from the
`transport Stream Sent from the buffer, and Supplying the
`mode signal to the controller and PES/PSI decoder accord
`ing to the content of the detected header, the mode Signal
`being one of a signal for operating only PES/PSI decoder, a
`Signal for operating only controller, and a signal for oper
`ating both the PES/PSI decoder and controller.
`The transport decoder according to the invention includes;
`a demultiplexer for demultiplexing an input transport
`stream, to output PID streams desired by a user in the form
`of transport Stream, and outputting the transport Stream other
`than the PID Streams according to an output control Signal
`Selected by the user, a Storage for Storing the transport
`Stream output from the demultiplexer; Second, third and
`fourth decoders for decoding video data, audio data and
`additional data according to a Select control Signal Selected
`by the user, respectively; a first decoder for decoding the
`transport Stream, to decode the Stream other than the cur
`rently being decoded Video data Stream, audio data Stream
`and additional data Stream according to a Selection of the
`user, and to transmit it; and control means for providing the
`output control Signal.
`The demultiplexer is constructed is hard-wired. The
`demultiplexer uses an external Storage, for example,
`DRAM, to reduce the capacitor of the buffers included
`therein. Furthermore, the demultiplexer combines the
`memories added to the docoders for audio data and addi
`tional data into one external Storage.
`It is to be understood that both the foregoing general
`description and the following detailed description are exem
`plary and explanatory and are intended to provide further
`explanation of the invention as claimed.
`
`BRIEF DESCRIPTION OF THE ATTACHED
`DRAWINGS
`The accompanying drawings, which are included to pro
`vide a further understanding of the invention and are incor
`porated in and constitute a part of this Specification, illustrate
`embodiments of the invention and together with the descrip
`tion Serve to explain the principles of the invention:
`In the drawings:
`FIG. 1A is a block diagram illustrating a conventional
`MPEG-2 encoder;
`FIG. 1B a diagram illustrating a configuration of a trans
`port Stream;
`FIG. 2A is a block diagram illustrating a conventional
`transport decoder;
`
`1O
`
`15
`
`25
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`35
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`40
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`45
`
`50
`
`55
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`60
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`US 6,252,907 B1
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`4
`FIG. 2B is a diagram illustrating a configuration of a data
`Stream for recording,
`FIG. 2C is a diagram illustrating a configuration of data
`Stream for displaying,
`FIG. 2D is a diagram for explaining a convention method
`of outputting displaying data Stream and recording data
`Stream together;
`FIG. 3A is a conceptional diagram of a demultiplexer
`according to the present invention;
`FIG. 3B is a block diagram of the controller of FIG. 3A;
`FIG. 3C is a block diagram of a transport decoder
`according to the present invention;
`FIG. 4 is a diagram illustrating a detailed configuration of
`the demultiplexer of FIG. 3C;
`FIG. 5 is a diagram illustrating the input/output ports of
`error corrector of FIG. 4 in detail.
`FIG. 6 is a diagram illustrating an inner data format of the
`sync detector of FIG. 4;
`FIG. 7 is a diagram illustrating an inner data format of the
`first memory of FIG. 4;
`FIG. 8 is a diagram illustrating the data input/output ports
`of the third interface of FIG. 4;
`FIG. 9 is a diagram illustrating the data input/output ports
`of the first interface of FIG. 4; and
`FIG. 10 is a diagram illustrating the input/output parts of
`the fourth interface of FIG. 4.
`
`DETAILED DESCRIPTION OF PREFERRED
`EMBODIMENT
`Reference will now be made in detail to the preferred
`embodiments of the present invention, examples of which
`are illustrated in the accompanying drawings.
`FIG. 3A illustrates a transport demultiplexer according to
`the present invention. Referring to FIG.3A, transport Stream
`externally input is temporarily stored in a butter 50, and than
`output therefrom without any change. This transport Stream
`is constructed in 188 bytes. The transport stream which
`passed through buffer 50 is shown in FIG. 1B. A transport
`header decoder 52 detects a transport header from the
`transport Stream, to determine the type of each packet data
`of the transport Stream. For example, when the detected
`header is desired data 1 of FIG. 1A, data P1 is output through
`a controller 51 of PES/PSI (packetized elementary stream/
`program Specific information decoder 53 according to the
`detected header.
`Controller 51 outputs the transport Stream in packet unit
`without any changes. That is, a desired packet is input,
`controller 51 externally outputs data of the packet to a
`recording device. The output Signal of controller 51 in
`shown in FIG.2B, which includes headers. Accordingly, this
`Signal can be recorded in a recording device, or recorded and
`then reproduced. PES/PSI decoder 53 decodes the payload
`of the transport Stream. The payload represents data other
`than the headers of the transport stream. PES/PSI decoder 53
`outputs the audio data and video data of FIG. 2C to external
`audio video decoders. PSI data is checked if it is desired, and
`then output to a memory or microcomputer.
`The configuration and operation of the transport demul
`tiplexer of the invention is explained below in detail. To
`perform the above-described operation, it requires that three
`cases to be described below are available. The first case in
`that PES/PSI decoding is carried out. When the transport
`header is detected by transport header decoder 52, and it is
`judged that packet data, which is input according to the
`
`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
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`S
`detected header, decoded only PES/PSI header, transport
`header decoder 52 gives the control authority to PES/PSI
`decoder 51. Transport header decoder 52 operates according
`to a control signal externally applied. PES/PSI decoder 53
`reads packet data from buffer 50, decodes the PES/PSI
`header when it is included in the packet data, divides the
`payload into audio data, Video data and PSI data and outputs
`them.
`The Second case is that only controller 51 operates. AS
`shown in FIG. 3B, controller 51 includes a header buffer
`51-1 for temporarily storing the headers, a payload buffer
`51-2 for Storing data other than the headers, and a control
`circuit 51-3 for controlling the operation of header buffer
`51-1 and payload buffer 51-2 according to the headers output
`from transport header decoder 52. When transport header
`decoder 52 detects the transport header from the transport
`Stream, and it is judges that the detected header operates
`only controller 51, transport header decoder 52 gives the
`control authority to controller 51. In this case, since the
`transport header must be also transmitted, payload buffer
`51-2 stores data other than the headers and header buffer
`51-1 stores the headers which transport header decoder 52
`roads the transport header from the transport Stream output
`from buffer 50. Given control authority by transport header
`decoder 52, controller 51 outputs the stored header from
`header buffer 51-1 first, and then reads and outputs data from
`payload buffer 51-2. Header buffer 51-1 must have the size
`lager than four bytes because the transport header has at least
`four bytes in size.
`The third case is that PES/PSI decoder 53 and controller
`51 operates Simultaneously. Through the aforementioned
`procedure, transport header decoder 52 gives the control
`authority to PES/PSI decoder 52, and simultaneously,
`applies a signal to controller 51 to operate it, PES/PSI
`decoder 53 reads the transport stream from buffer 50 as the
`first case, and outputs audio data, Video data and PSI data
`which include no header. Controller 51 outputs the 4 byte
`header stored in header buffer 51-1 first, similar to the
`Second case, and then outputs audio data, Video data and PSI
`data stored in payload buffer 51-2. That is, payload buffer
`51-2 stores the payload data read by PES/PSI decoder 53,
`and outputs it under control of control circuit 51-3 when
`header buffer 51-1 outputs headers. Controller 51 and PES/
`PSI decoder 53 operate independently so that controller 51
`includes payload buffer 51-2 therein to store the payload
`data road by PES/PSI decoder 53. As described above,
`header buffer 51-1 storing the transport header and payload
`buffer 51-2 Storing the payload data are separately included
`in controller 51, and control circuit 51-3 controls the input/
`output of each buffer in response to a signal from transport
`header decoder 52. Data output from controller 51 is trans
`mitted to a recording device through a faar port.
`The transport decoder of the present invention outputs the
`recording data including header as well as the displaying
`data including no header when data in output by the demul
`tiplexer before MPEG signal is decoder. The header includes
`information representing if the following payload data is
`audio packet or Video packet So that the data output from
`controller 51 can be recorded in the recording medium by
`the recording device for reproduction. Accordingly, with the
`demultiplexer of the invention. P1 of FIG. 1B can be
`recorded while it is seen, P2 can be recorded while P1 is
`seen, and P1 can be also recorded while P2 is seen.
`FIG. 3C is a block diagram of the transport decoder of the
`invention, and FIG. 4 is a detailed block diagram of the
`demultiplexer of FIG. 3C. Referring to FIG. 3C, the trans
`port decoder includes, a demultiplexer 100 for demultiplex
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`ing an input transport Stream, a Storage 400 for Storing the
`transport stream output from demultiplexer 100; second,
`third and fourth decoders 600, 700 and 800 for decoding
`Video data, audio data and additional data of the transport
`Stream, which are Selected according to a Select control
`signal of a controller 300 by a user; and a first decoder 600
`or decoding the transport Stream and transmitting portions of
`the Stream other than currently being decoded Video data,
`audio data and additional data in the form of transport Stream
`according to the user's Selection.
`Controller 100 acts various parameters required to operate
`demultiplexer 100, a transport demultiplexer, and checks its
`inner state. Demultiplexer 100 includes a fast data port for
`Supplying a Signal for timing controlling clock controller
`200 and outputting a stream of packet data desired by the
`user in the form of transport Stream. This transport Stream is
`provided for first decoder 500. First decoder 500 is used for
`the following operation. For example, it is assumed that a
`broadcasting program, constructed of Video data, audio data
`and additional data which are currently being Sent from
`second, third and fourth decoders 600, 700 and 800 and
`watched by the user, is a program of KBS (Korean Broad
`casting System). When the user wants to record a program
`of another broadcasting System using a VCR, first decoder
`500 selectively decoders the streams of the program and
`supplies them to the VCW. Storage 400 configured of
`DRAM is used as a buffer for the video data, audio data and
`additional data. Thus, it reduces the capacity of memories
`included in demultiplexer 100.
`Demultiplexer 100 of FIG. 3C can have the configuration
`shown in FIG. 4. Referring to FIG. 4, demultiplexer 100
`includes: an error correction interface 101 for receiving a
`transport Stream sent from an external error corrector (not
`shown); a first buffer 102 for temporarily storing the trans
`port stream; a first interface 103 for interfacing the buffered
`stream and storing it in storage 400, a second buffer 105 for
`Storing the transport Stream Stored in Storage 400 through
`first interface 103 according to the decoding Signal of
`controller 300, a sync detector 106 for detecting synchro
`nization for the stream output from second buffer 105; a first
`decoder 107 for decoding the headers of the stream output
`from second buffer 105 and detecting a desired packet
`according in the decoding result, a Second decoder 109 for
`detecting and decoding adaptation field of the Stream output
`from second buffer 105, a descrambler for descrambling
`video data, audio data and additional data; a third buffer 112
`for storing the descrambled data; a third decoder 113 for
`decoding the descrambled data stored in third buffer 112; a
`third interface 114 for storing the decoded audio data and
`additional data in storage 400 through first interface 103, and
`interfacing the video bit stream to second decoder 600 of
`video decoder; fourth and fifth buffers 115 and 116 for
`reading the audio data and additional data Stored in Storage
`400, temporarily storing them, and outputting them to third
`and fourth decoders 700 and 800 shown in FIG. 3C, which
`are audio and additional decoders, through third interface
`114, a third memory 104 for, when data is written or read to
`or from storage 400 through first interface 103, storing start,
`end, read and write pointers corresponding to the data buffer
`of the storage, a first memory 108 for storing PID and type
`of a packet to be decoded by first decoder 107; a second
`interface 117 for externally outputting the transport Stream
`without any change; a Second memory 111 for Storing a
`clock for the descrambling; and a fourth interface 118 for
`interfacing control Signals for each Section, which are Sup
`plied from controller 300.
`Error correction interface 101 stores the input transport
`stream in first buffer 102. This buffered transport stream is
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`VIZIO, Inc. Exhibit 1017
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
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`stored in storage 400 through first interface 103. Storage 400
`is configured of DRAM. The Stream is read against accord
`ing to the decoding signal of controller 300 and stored in
`second buffer 105. Accordingly, even if the amount of data
`of the input transport Stream is lager, overflow can be
`prevented by storage 400, and first and second buffers 102
`and 105 can be made in Smaller size.
`Sync detector 106 detects the sync bite (0x47) of the data
`stored in second buffer 105. When it detects a reliable sync
`byte, for example, when the Sync byte placed at every
`188-byte transport packet is detected a predetermined num
`ber of times the user wants, first decoder 107 decodes the
`headers of the transport stream stored in second buffer 106
`and Sync checking is continuously performed. First decoder
`109 decodes the transport stream header to detect a desired
`packet, and Stores data other than Video, audio and addi
`tional data in storage 400 through first interface 103. This
`data Stored in Storage 400 may be read according to read
`signal of controller 300, to be decoded.
`Second decoder 109 decodes the adaptation field of the
`Stream, and Stored necessary data in Storage 400 through first
`interface 103. PES data for the video, audio and additional
`data is descrambled by descrambler 110. The descrambling
`algorithm employed for this is for digital Video broadcasting
`(DVB), and it is also applied to Korea DVB. The
`descrambled data is stored in third buffer 112, and decoded
`by third decoder 113. A portion of the decoded PES header
`is stored in storage 400 through first interface 103. The video
`bit stream is output to second decoder 600 of FIG. 3, which
`is a video decoder, through third interface 114.
`The audio data and additional data are Stored in Storage
`400 through first interface 103, read by fourth and fifth
`buffers 115 and 116, and then output to third and fourth
`decoders 700 and 800 shown in FIG. 3C through third
`interface 114. Third decoder 700 is a decoder for audio data,
`and fourth decoder 800 is a decoder for additional data.
`There is no memory added to third and fourth decoders 700
`and 800, and storage 400 serves as a common buffer in the
`demultiplexer. When data is read and written from/to Storage
`400 through first interface 103, third memory 104 stores
`Start, end, road and write pointers corresponding to the data
`buffer of the storage. First memory 108 stores PID (program
`identification) and type of packer to be decoded, and decod
`ing is carried out according to the PID and type Stored in first
`memory 108. Second interface 117, which is a block for
`outputting the transport stream to first decoder 500 as shown
`in FIG. 3C, outputs video and audio data other than currently
`being decoded and displayed Video and audio data, accord
`ing to the user's Selection. That is, the data output through
`Second interface 117 includes broader data, and thus can be
`used for displaying.
`FIG. 5 illustrated the input/output ports of error correction
`interface 101 of FIG. 4 in detail, FIG. 6 illustrate the inner
`data format of sync detector 106 of FIG. 4, and FIG. 7
`illustrates the inner data format of first memory 108 of FIG.
`4. Referring to FIG. 5, error correction interface 101
`receives the input transport Stream in bit Serial or byte
`parallel. When P/S mode value is “0”, error correction
`interface 101 receives the transport stream in byte parallel,
`and, when “1”, receives bit serial stream with LSB of
`forward error correction (PEC) data.
`Sync detector 100 includes a sync register. More, Trans
`port sync byte is 0x47. There is data of 0x47 in the transport
`Stream data. Thus, the data of 0x47 can be recognized as
`Sync data. To prevent this, Synchronization test must be
`performed several times as shown in FIG. 6. The sync
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`register can record the number of Synchronization tests and
`number of lost synchronization. Only when the synchroni
`Zation corresponds to the number of Synchronization tests,
`Sync detector 106 detects the Synchronization and gives the
`control authority to first decoder 107. First decoder 107
`checks if Sync data is input to every packet correctly while
`decoding operation. When the Synchronization does not
`coincide, first decoder 107 checks if the synchronization
`does not correspond to the number of lost Synchronization in
`the Sync register, and, when asynchronization continues,
`transfers the control authority to sync detector 106, to
`request the correct detection of Synchronization. The packet
`to be decoded is determined by the PID information and
`types of the packet, stored in first memory 108. FIG. 7
`illustrate a register configuration showing an format of
`information about the packet stored in first memory 108.
`As shown in FIG. 7, when DEN value is “1”, a packet
`whose