(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2005/0094036A1
`(43) Pub. Date:
`May 5, 2005
`Tichelaar
`
`US 2005OO94036A1
`
`(54) POWER STANDBY MODE CIRCUITRY FOR
`AUDIOVISUAL DEVICE
`
`(76) Inventor: Johannes Yzebrand Tichelaar,
`Eindhoven (NL)
`
`Correspondence Address:
`PHILIPS INTELLECTUAL PROPERTY &
`STANDARDS
`P.O. BOX 3001
`BRIARCLIFF MANOR, NY 10510 (US)
`(21) Appl. No.:
`10/505,505
`(22) PCT Filed:
`Feb. 12, 2003
`(86) PCT No.:
`PCT/IB03/00568
`(30)
`Foreign Application Priority Data
`
`Feb. 27, 2002 (EP)........................................ O2O75768.8
`
`Publication Classification
`
`(51) Int. Cl." ....................................................... H04N 5/63
`(52) U.S. Cl. .............................................................. 348/730
`
`(57)
`
`ABSTRACT
`
`The problem of increased power consumption due to infra
`red remote control false alarm handling by a main TV
`controller (88) and power dissipation due to leakage current
`is addressed by fully delegating Standby tasks to a low power
`delegate controller (90) with minimal local resources and
`having high performance and many dissipating System parts
`disabled. In low power standby mode the delegate controller
`(90) validates autonomously a remote control (42) com
`mand, a keypad (34) press, a timer alarm, and external
`interrupt etc. The TV system is powered up only when a
`command is valid. Use of a Switched power Supply Voltage
`(70) reduces the leakage current problem. The delegate
`micro-controller is included on the same integrated circuit
`(IC) package as the main micro-controller, advantageously
`on the same IC die.
`
`
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`VIZIO, Inc. Exhibit 1008
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`Patent Application Publication May 5, 2005 Sheet 2 of 4
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`Patent Application Publication May 5, 2005 Sheet 3 of 4
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`Patent Application Publication May 5, 2005 Sheet 4 of 4
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`POWER STANDBY MODE CIRCUITRY FOR
`AUDIOVISUAL DEVICE
`0001. This invention relates to power standby circuitry
`and to a method of achieving low power Standby.
`0002 The ever-growing number of transistors per square
`millimeter allows larger and larger Systems-on-chip (SoC)
`potentially working at ever increasing clock Speed and
`power dissipation. Hence, power management is becoming
`an important issue.
`0.003
`State of the art power dissipation reduction meth
`ods for SoC allow individual modules to be shutdown by
`gating module clock when not used. Additional techniques
`for reducing power are the reduction of clock frequency,
`reducing power Supply Voltage (at the cost of slower cir
`cuitry), applying asynchronous circuits in module design,
`etc (see for example Neil H. E. Weste and Kamran
`Eshraghian, “Principles of CMOS VLSI Design-A Sys
`tems Perspective,” 2" ed., Addison-Wesley, New York,
`1993; Kees van Berkel and Martin Rem, “VLSI Program
`ming of Asynchronous Circuits for Low Power', Nat. Lab.
`Unclassified Report No. UR 005/94, Philips Research, 1994;
`Kaushik Roy and Sharat C. Prasad, “Low-Power CMOS
`VLSI Circuit Design”, John Wiley & Sons, Inc., New York,
`2000).
`0004 Low-power standby mode is a special mode that
`has to be Supported by power management Schemes in for
`instance TV, VCR and digital TV Set-top boxes. Legislation
`in Europe and Star compliance in the USA advise or require
`3 W power consumption in low-power standby mode (see
`for instance “Code of Conduct on Energy Efficiency of
`Digital TV Service Systems,” Rev. 8, European Commis
`Sion, Directorate-General Energy and Transport, New Ener
`gies & Demand Management, Promotion of Renewable
`Energy Sources & Demand Management, Brussels, Bel
`gium, 28 Feb. 2001). It is expected that legislation will
`decrease standby power consumption to less than 0.5 W in
`the near fixture. Note that in state of the art TV systems,
`about 10 percent of the total power budget of low-power
`Standby mode are given to a main controller IC like, for
`instance, the Television Control Processor (TCP) (see Ole
`Steinfatt, Peter Klapproth and Hans Tichelaar, “TCP: A Next
`Generation TV Control Processor”, ICCE 1999, THPM
`19.5, pp. 354-355, Los Angeles USA, June 1999).
`0005. In power standby mode, only a small subset of the
`system's functionality has to be active. For example, a TV
`System is Supposed to wake up from, for instance, an
`appropriate command from the remote control, a key-pad
`preSS, an internal timer, a real-time clock, an external
`interrupt, etc. A digital TV set-top box (STB) and hybrid TV
`(capable of analog and digital TV standards reception) have
`additional requirements like for instance waking up from
`Specific packets passing via the input transport Stream.
`However, these additional requirements are only covered by
`a code of conduct and are defined as Standby active/low
`mode dissipating less than 10 W.
`0006 The standby power dissipation stays in general
`within the limits of the power budget when no external
`triggers are present and leakage current is negligible. The
`Situation gets complicated when false triggers try to wake up
`the System. The instantaneous power consumption is raised
`because the System has to validate the alarm by its main
`
`controller. The power consumption can rise far above budget
`when false triggers are not taken away and the System keeps
`validating false alarms. Especially false alarm handling from
`infrared remote control is a problem as will be explained
`below in relation to the prior art.
`0007 Another fast upcoming problem is leakage current.
`Mainstream CMOS IC process technology is going below
`0.18 um size Structures, to lower threshold Voltage transis
`tors and lower power Supply Voltage. Power Supply Voltage
`is for instance 1.8V in the case of 0.18 um CMOS. Leakage
`current is becoming fast the dominant factor in one-chip TV
`IC power consumption at least during power Standby mode
`(see Roy & Prasad above).
`0008 Asimplified block diagram of a prior art state of the
`art one-chip TV is depicted by FIG. 1. In general, its
`functionality can be decomposed into Video, audio and
`control processing. Input composite Video 10 is first decoded
`12 into component video, then put through a Source Selector
`14, and followed by front-end features (histogram, noise
`measurements, etc). Thereafter, memory based features 16
`are applied (picture-in-picture, double window, temporal
`noise reduction, Scan-rate conversion, etc), followed by
`back-end features 18 (transient improvement, etc), and dis
`play adaptation functions 19, which part has a video output
`to a display (not shown). Input video is also directed to a
`teletext decoder module 20 for applying first teletext decod
`ing functionality. Audio functionality is not decomposed in
`FIG. 1 for the sake of simplicity. An audio module 22
`contains audio demodulation and decoding functionality,
`Sound Switching, and features processing (tone, Volume,
`balance, etc), with input 23a and output 23b. The general
`infrastructure contains a micro-controller 24 for TV set
`control, one or more memory interfaces 26a, b (to flash
`memory, ROM or RAM 26c), a bus 27 and bus controller,
`graphics unit (not shown), interrupt controller 28, and
`peripherals 30. Among the controller peripherals, a Software
`ADC 32 is shown for keypad decoding, an interrupt con
`troller 28 for handling interrupts 36, a timer 38 for gener
`ating timer events, a remote control unit 40 for interfacing
`an infrared receiver 42 front-end, and power, clock and reset
`elements 31. Note that most prior art does not have a
`one-chip TV with an embedded micro-controller on the
`same die yet, (see JP 10336336, U.S. Pat. No. 5,953,080, JP
`2000059710, JP 2000209665). However, the Micronas
`VCT38XXAIC family claims it has. Other IC manufacturers
`have the micro-controller 24 in the Same IC package-a
`Multi-Chip-Module (MCM)—or in an external IC. Let's
`focus on the remote control receiver functionality.
`0009. A state of the art infrared remote control receiver
`function for TV, VCR and set-top box consists of an infrared
`receiver front-end 42, pulse-width detector, optionally Some
`buffering for time or pulse-width captures and command
`decoder. An example of infrared receiver front-end func
`tionality is given by the U2538B from Temic Semiconduc
`tors, (U2538B, “IR receiver for data communication”, Pre
`liminary data sheet, Temic Semiconductors, 31 May 1995).
`The infrared receiver 42 front-end takes care of converting
`infrared light into the electric domain, does pre- and gain
`controlled amplification, 36 kHz bandpass filtering, glitch
`removal, two-level slicing and outputs a two-level (binary)
`Signal.
`0010. The output of the infrared receiver 42 is input into
`an on-chip pulse-width detector. The basis functionality of
`
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`this detector is to measure time between edges on the binary
`input signal (delta time) and optionally the polarity of the
`edge (positive=rising or negative=falling). A basic imple
`mentation of Such pulse-width detector is an edge triggered
`timer/counter and edge polarity register, which is generally
`referred to as capture timer. Note that this capture timer can
`be part of a micro-controller (uC) 24 like an 80C51, referred
`to above. Note that a capture timer can also be simulated by
`a timer 38 and an interrupt 28 on a micro-controller 24 like
`an 80C51. The value of the capture timer is read by the uC
`24 when Signalled by an edge detect interrupt and then first
`wakes up. Then the uC 24 takes care of the remote control
`command decoding. A valid command like channel key,
`on-key or Standby key press results in leaving Standby mode
`and entering another (operational) power mode. An invalid
`command results in Status quo.
`0.011
`The problem regarding power consumption in
`standby mode is that in state of the art SoC the high
`performance main uC 24 and part of its general infrastruc
`ture is doing the task of infrared remote control command
`decoding. Consider the following example.
`0012 Let's assume the reception of infrared by a TV
`from a non-TV infrared remote control like VCR, audio set,
`or Set-top box. It is obvious that Such reception should result
`in false alarm detection after command decoding. Note that
`neither the infrared receiver front-end nor the capture timer
`38 is capable of rejecting the false alarm. The uC 24 is
`interrupted for handling the capture timer's results. The uC
`24 wakes up when Sleeping (from non-triggered low-power
`Standby mode), starts checking the cause of the interrupt,
`and then decides to start infrared remote control command
`decoding. Note that the main uC 24 needs additional (high
`performance) SoC resources for doing loads and stores of
`code and data like, for instance, cache, Scratch-pad memory
`21, maybe even external memory 29, internal bus 27, and the
`remote control unit 40. In the most optimal case the uC 24
`runs the Standby program from locked cache or internal
`scratch-pad memory 21 but still needs the internal bus 27 for
`access to for instance a capture timer 38 peripheral. The
`result is that still a significant part of the SoC's infrastructure
`and potentially a few external components are activated. The
`luC 24 detects a false alarm after a few tens to hundreds of
`milliseconds and decides to bring back the System into
`low-power Standby mode. Note that during processing the
`false alarm, the power consumption can easily be tens to
`hundreds times the power consumption during (non-trig
`gered) low-power standby. Some external power Supplies
`allow for a short duration a considerable increase of power
`consumption but others don't. For instance, in some TV
`systems the Extra High Tension (EHT) generator has to be
`powered first in order to get additional power. It is obvious
`that this situation is unwanted every time Someone pushes a
`VCR or audio remote control key.
`0013 The problem with standby power consumption gets
`worse when going to Smaller mainstream CMOS proceSS
`technology for SoC as already mentioned in the introduc
`tion. Leakage current is the additional problem. A State of the
`art solution is to tune the mainstream CMOS IC process for
`low leakage current at the cost of Speed. However, there is
`no guarantee that this Solution works for Smaller Sizes than
`0.18 um and leakage current is still too large in low-power
`Standby mode.
`
`0014 U.S. Pat. No. 6,292.233 discloses a device control
`ler that controls access to a device, Such as a television,
`having a power input for receiving power and a data input
`for receiving control data. When instandby mode, the device
`controller disconnects the device from a power Source, Such
`as the AC mains of the building in which the device is
`Situated. As a result, in Standby mode only the device
`controller is powered, which uses much less power than
`prior art devices in standby mode. The device controller
`includes an input device Structured to provide control data
`based on control instructions received from a user, a power
`Switch coupled between a power Source and the device
`power input, and a data coupler coupled to the device data
`input and Structured to convert electrical data into non
`electrical data and back to the electrical data for delivery to
`the device data input. The device controller also includes a
`controller Structured to cause the data coupler to provide the
`control data to the device data input, decode the control data,
`and if the control data indicates that the user desires to turn
`on the device when in Standby mode, then causes the power
`Switch to deliver power from the power source to the device
`power input. The controller board, and Specifically uC, has
`been Separated (electrically-see the optocoupler) from the
`TV chassis.
`0015. An object of the invention is to provide improved
`low power standby circuitry. To this end, the invention
`provides low power Standby circuitry as defined in claim 1.
`Advantageous embodiments are defined by the dependent
`claims.
`0016. The audiovisual device is preferably a TV, a VCR,
`a set-top box, DVD, and/or time-shift recorder. The audio
`Visual device is preferably a Silicon chip controlled audio
`Visual device.
`0017. The delegate controller is preferably operable to
`control the Supply of at least one clock Signal to Said at least
`part of the System-on-chip of the audiovisual device.
`0018. The provision of the delegate micro-controller
`operable to control either power or power and clock signals
`to at least part of the System-on-chip advantageously reduces
`power consumption in a Standby mode. The provision of the
`delegate micro-controller as a separate micro-controller to a
`main micro-controller provides advantageous reduction of
`current leakage.
`0019. The received signal may be a remote control signal,
`which may be an IR signal. The low power standby circuitry
`is preferably operable to maintain the audiovisual device in
`a Standby condition and power up the audiovisual device on
`receipt of a validated Signal.
`0020. The delegate micro-controller is preferably embed
`ded in a System-on-chip of an audiovisual device. The low
`power Standby circuitry preferably forms a part of the
`System-on-chip of the audiovisual device.
`0021. The delegate micro-controller is preferably adja
`cent, or close to, the main micro-controller of the System
`on-chip. The delegate micro-controller may be a central
`processing unit (CPU) or a Digital Signal Processor (DSP).
`0022. The delegate micro-controller is included on the
`same integrated circuit (IC) package as the main micro
`controller, preferably on the same IC die. This distinguishes
`the present invention from U.S. Pat. No. 6,292.233 and
`
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`provides the advantage of avoiding additional costs and an
`additional interface caused by the prior art micro-controller
`being on a controller board Separate from the main micro
`controller unit in the television chassis. Advantageously, the
`standby micro-controller is a very small part of the SoC on
`which the main micro-controller is placed, and uses pins of
`the SoC, which pins can be shared.
`0023 The low power standby circuitry may be operable
`to reduce a frequency of a clock Signal and/or Switch and/or
`reduce a Voltage of a Voltage Supply to the System-on-chip
`on entering a Standby mode. The Voltage Supply reduction
`may be gradual.
`0024. The low power standby circuitry may be operable
`to enable or increase at least one clock frequency and/or
`increase or enable at least one Voltage Supply on ending a
`Standby mode. The Voltage Supply increase may be gradual.
`0.025 The low power standby circuitry is preferably
`operable to first reduce or disable a clock frequency before
`reducing or disabling at least one voltage Supply on entering
`a Standby mode.
`0026. The low power standby circuitry preferably
`receives input from at least one of the Signal reception
`means, which may be IR signal reception means, timing
`means, and power Supply means, which power Supply
`means may be connected to power reset means.
`0027. The low power standby circuitry preferably has
`output connections to at least one of a main power Supply
`means, horizontal drive circuit means of the audiovisual
`device; the main micro-controller; and/or a clock signal
`distribution means.
`0028. The delegate micro-controller is preferably
`located, in use, in a first voltage domain, Separate to a Second
`Voltage domain for the main micro-controller of the System
`on-chip.
`0029 Specific embodiments of the present invention will
`now be described by way of example and with reference to
`the accompanying drawings, in which:
`0030 FIG. 1 is a schematic diagram of a prior art
`one-chip TV system layout;
`0.031
`FIG. 2 is a schematic diagram of an extended TV
`System according to the invention;
`0.032
`FIG. 3 is a schematic diagram of an embedded
`micro-controller for a TV; and
`0.033
`FIG. 4 is a schematic diagram of the layout for a
`one-chip TV with on-chip delegate micro-controller for
`low-power Standby modes.
`0034 Specific description in relation to the Figs. is given
`further below. The immediately following description is by
`way of introduction.
`0.035 A solution for the infrared false alarm problem of
`temporarily, relatively strong increase of power consump
`tion is a stepwise waking up by delegating low power
`Standby tasks from a main micro-controller (uC) to a sepa
`rate module. Hence, this separate module does at least the
`remote control command decoder task. The remote control
`command decoder task is preferably put on, or better,
`delegated to a low speed, (ultra) low-power and Small but
`adequate “delegate' controller. This delegate controller is
`
`preferably a complex instruction set computer (CISC) like,
`for instance, an 80C51 because of its effective code packing
`(Small code size) in comparison with RISC, see John L.
`Hennessy and David A Patterson, “Computer Architec
`ture-AQuantitative Approach", 2" ed., Morgan Kaufmann
`Publ. Inc., San Franciso, 1996. The delegate controller
`communicates with the main uC and its infrastructure via
`preferably a very thin Standard interface in order to keep the
`parallel execution of the remote control command decoder
`task Simple and (ultra) low power. This can be achieved by
`giving the delegate uC its own minimal Set of local
`resources. These are for instance local embedded memory
`for code and data, like FLASH (non-volatile) or RAM and
`ROM or OTP, local interrupt handling, local (capture) timer,
`and a thin (light weight) interface towards the main uC. This
`interface should be designed for crossing different Supply
`voltage domains. An I°C interface would be an excellent
`choice. The delegate uC can have its own local power
`management control and is sleeping when the TV System is
`in low-power Standby mode and no external triggers are
`present. An infrared false alarm is handled as follows.
`0036) Let's assume that the TV and thus its SoC is in low
`power standby mode. The clock is removed from the main
`tiC and other modules except the capture timer and power
`management unit of the delegate uC. A non-TV remote
`control is activated (key-press), which obviously should
`result in false alarm detection. Its signal is received and fed
`to the input of the capture timer. The latter sends an interrupt
`to the delegate controller and its power management unit.
`The power management unit wakes up the delegate uC. The
`latter uC Starts its remote control decoding task and checks
`whether the received command is valid and Such that the TV
`should be powered up from low-power standby mode (for
`example, TV on-key pressed). The delegate uC detects after
`receiving a certain Set of timing captures and command
`decoding thereon, a false alarm and goes back to low-power
`Standby State. In this case, a false alarm will only wake up
`a low power controller with its own minimal infrastructure
`of a total of about 10 kgates running at about 1 MHz. Power
`consumption can be as low as 4 mW (2.5 mW U2538B and
`1 mW delegate controller) in 0.18 um mainstream CMOS
`when handling false alarm.
`0037. A first solution focuses on an on-chip implemen
`tation of the delegate controller. The advantage of low power
`dissipation and low leakage current in low-power Standby
`mode is obtained by implementation of the following mea
`SUCS
`
`0038 1. The modules on the SoC that are not active
`in low-power standby mode are switched off by first
`deactivating functionality, then taking away the
`clocks, thereafter Switching off clock PLLs when
`appropriate, and last taking away power Supply
`voltage(s). Note that only the latter measure takes
`away leakage current.
`0039 2. Modules that are active in low-power
`Standby mode are implemented preferably with high
`V transistors or other techniques to reduce leakage
`current at the cost of performance degradation (addi
`tional delay in cells). This can be achieved by the
`application of CMOS process option like thick oxide
`(when Supplied) at the expense of one additional
`
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`process Step (and mask). A further enhancement is
`the application of the dual-Vth concept (see Roy and
`Prasad above).
`0040. 3. The delegate uC module is powered by prefer
`ably a reduced power Supply Voltage in order to decrease
`dynamic dissipation. Power Supply Voltage can be reduced
`because rather low Speed signal processing and control is
`required.
`0041. The protocols for entering and leaving power
`standby mode are as follows. To enter standby mode:
`Optionally, deactivate functions or modules that are not used
`in power standby mode. Switch-off clock domains of mod
`ules inactive during standby. Switch-off clocks PLLs when
`appropriate and desirable (slower start up). This is necessary
`when executing the next Step. Switch off power Supply
`Voltages or activate logic cells Sleep mode in a dual Vth
`concept.
`0042. The return from standby mode is the inverse pro
`tocol of entering power Standby mode: Switch-on power
`Supply Voltages or deactivate logic cells Sleep mode in a
`dual Vth concept. Switch on appropriate clocks PLLs.
`Switch on clock domains of modules inactive during
`Standby. Activate (finalize) appropriate modules.
`0043. Note that in power standby mode speed is not the
`issue. The delegate controller can control via a power
`regulator or (e.g. internal or external DC-DC converter) the
`power Supply voltage to part(s) or the whole SoC and thus
`Solve the problem of leakage current. It is preferred that the
`power Supply Voltage is rather slowly falling and raising
`relative to the Speed of the Standby taskS. E.g. if the Standby
`tasks are running at 1 MHZ clock frequency then the power
`Supply Voltage should drop or rise gradually in about a few
`milliseconds. This measure prevents high currents drawn by
`the SoC at power on.
`0044) A second solution is moving the delegate uC and its
`tiny infrastructure to an external die but inside the same
`package. This external die is processed in a large CMOS IC
`proceSS technology than mainstream, like for instance 0.25
`tim, which has negligible leakage current. The infrared
`decoder can be combined with a DC power Switch, power
`regulator or DC-DC converter. The SoC is fully powered off
`in low-power Standby mode.
`0.045. A hybrid TV, a TV capable of receiving analog as
`well as digital TV Standards, has in general four power
`modes of operation: Off, Low-power standby (or standby
`passive), Active standby, Running (System operational).
`0046) The low-power standby mode is characterized by
`preferably very low power consumption and the capability
`of waking up from a set of Specific interrupts. These are for
`instance specific infrared commands (channel, Standby or
`power-on key press), keypad on-key press, timer event,
`modern ring, and (user defined) external interrupts.
`0047 The TV active standby mode has different possi
`bilities. When related to an analog broadcast TV set, all
`Small signal functions are available. Hence, it is possible to
`activate for instance FM radio, to route SCART signals and
`to fetch VBI data. When related to hybrid TV, the task list
`is further extended with for instance MPEG transport stream
`(TS) monitoring for specific data or programs. Monitoring
`of the TS requires the additional tasks of demultiplexing,
`
`descrambling, Software downloads, etc. It is obvious that the
`active Standby mode is considerably less low power than
`low-power TV standby. The focus of the embodiment will be
`on the low-power Standby mode.
`0048 Embodiments of the invention will now be
`described in relation to the drawings.
`0049 FIG. 2 presents a simplified block diagram of an
`extended TV system. The upper section shows a Switched
`mode power supply (SMPS) 70 and an extra high tension
`(EHT) generator 72 providing all required power Supply
`Voltages. The middle Section from left to right shows a tuner
`74, SCART interface 76 and audio IO 78 connected to a
`multi-platform interface (MPIF) 80. The MPIF 80 takes care
`of IF processing of the tuner output, routing of SCART
`signals and SCART output buffers, audio and video base
`band Switching and AD conversion. The MPIF 80 interfaces
`to a digital one-chip TV IC 82. The digital one-chip TV IC
`82 implements Video decoding, memory based features
`(picture-in-picture/double window, Scan-rate conversion,
`noise reductions, etc), picture improvements (CTI, LTI,
`color correction), digital output processing (DOP) 83 for
`CRT display adaptation (RGB processing, SCAVEM,
`deflection control), audio processing, VBI services, TV
`control keypad, remote control, P50 commands, etc), and
`graphics. It connects to RGB and audio amplifiers 84, 86
`Supplying a Screen 85 and Speakers 87 respectively.
`0050. The digital one-chip TV IC 82 is a system-on-chip
`(SoC) that has next to its main TV micro-controller 88 an
`embedded delegate micro-controller 90 to deal with low
`power standby tasks. The delegate micro-controller 90 in
`combination with a small part of the DOP83 to generate the
`H-drive signal 92 for a line transistor (not shown) of the
`EHT circuit 72, has its own voltage domain(s) in the SoC82.
`It is connected to the SMPS 70 standby Supply via two
`DC-to-DC converters 94, 96 for delivering 1.8 Volt and 3.3
`Volt respectively. Note that the 3.3 V supply voltage is
`required only for Supplying the analog part in the (open
`drain) IC pad that connects to the line transistor (not shown)
`for compatibility. In low-power standby mode, only the
`delegate micro-controller 90 and a small part of the DOP83
`is powered by SMPS 70 standby supply via the two DC-to
`DC converters 94 and 96, whereas the rest of the SoC 82 is
`not powered. The delegate controller 90 is very loosely
`coupled with the Surrounding System-on-chip 82 So that it
`takes a minimum effort to give it its own voltage domain.
`The delegate micro-controller has a Standby mode on/off
`line 93 (burst mode control) to the SMPS 70. The system
`on-chip has a flash memory 91.
`0051. An example of a Switch mode power supply
`(SMPS) 70 very suitable for TV and monitors is fully
`described in reference, J. Kleuskens, R. Kennis, “75 W
`SMPS with TEA 1507 Quai-Resonant Flyback Controller”,
`Application Note No. ANO0047, Philips Semiconductors, 6
`Jun. 2000 and is hereby incorporated by reference herein.
`This SMPS 70 has frequency reduction at low power
`Standby for improved System efficiency (power consump
`tion<3 W) and burst mode operation for very low power
`standby levels (power consumption<1 W).
`0.052 The SMPS 70 stabilizes its output voltage to the
`extra high tension (EHT) generator 72 to within a few
`percent. All other outputs of the SMPS 70 are not being
`individually Stabilized So they are inherently less accurate
`
`VIZIO, Inc. Exhibit 1008
`VIZIO, Inc. v. Maxell, LTD, IPR2022-01459
`Page 9 of 12
`
`

`

`US 2005/0094036A1
`
`May 5, 2005
`
`and may deviate depending on load conditions. Before any
`output to the EHT generator 72, this output needs loading.
`If the output to the EHT generator 72 is not being loaded, a
`Small amount of energy will keep up the Voltage to this
`output. Other Voltages will drop as Soon as they are loaded
`or are deliberately kept low. When in low-power start-up
`mode, the H-drive 92 is being started up using only little
`power from the 3.3V Supply 96 by a horizontal deflection
`generator (not shown) in the digital output processor (DOP)
`83, which is controlled by the delegate controller 90. Typi
`cally, the delegate controller 90 will issue a signal or
`command to the horizontal deflection generator to initiate
`this start-up from low power. The start of the horizontal
`deflection automatically forms the load to the SMPS 70
`supply voltage to the EHT generator 72 that is needed to
`make other outputs from the SMPS 70 available. Alterna
`tively but not preferred, if low-power Start-up cannot be
`adopted it is possible to first load the SMPS 70 supply
`voltage to EHT generator 72 with a load resistor to make
`more power available.
`0053. In low-power standby mode, about 10 mA will be
`available at the 5 V output. To achieve low-power standby
`mode the SMPS 70 is being operated in burst mode. Primary
`supply power will be less than 1 W. In this mode the 5 V
`Stabilizer Services to derive a proper DC voltage from a
`large-amplitude Sawtooth. All other outputs will have a low
`Voltage, but not necessarily equal Zero. This low-power
`strategy only works if the SMPS 70 is defined for a power
`figure up to about 75 W. Beyond that value (typical in
`high-end applications with heavy Sound amplifiers) separate
`low-power Standby Supplies are required.
`0.054 The supply power for normal operation can be
`derived from the SMPS 70 or from the EHT generator 72.
`Since this Voltage has been Stabilized and due to the good
`magnetic coupling between primary and Secondary wind
`ings of the EHT transformer 72 relatively well-stabilized
`supply voltages can be derived from the EHT transform
`using Scan-rectifiers. Voltage Stabilizers and Supply Switches
`(removing the power from specific parts of the ICS in
`low-power standby) may be omitted. If active standby mode
`is to be Supported, Supply power for normal operation must
`be derived from the SMPS 70.
`0.055 Audio amplifiers may not be supplied via the EHT
`transformer 72, because the varying load would then modu
`late picture width. Typically, the 200 V supply for the RGB
`amplifiers 84 as well as focus and voltage grid 2 (VG2)
`voltages is derived from fly-back rectifiers (not shown) in
`the EHT circuit 72. Those voltages are not well stabilized
`(high internal resistance), depend on duty-cycle and online
`frequency, but allow high Voltages to be generated with
`relatively low number of windings.
`0056. If the mains voltage is instantly removed due to
`power plug