`(12) Patent Application Publication (10) Pub. No.: US 2007/0244698 A1
`Dugger et al.
`(43) Pub. Date:
`Oct. 18, 2007
`
`US 20070244698A1
`
`(54) RESPONSE-SELECT NULL STEERING
`CIRCUIT
`
`(76) Inventors: Jeffery D. Dugger, Mountain View, CA
`(US); Paul D. Smith, Pleasanton, CA
`(US); Paul E. Hasler, Atlanta, GA
`(US); Hans W. Klein, Danville, CA
`(US)
`Correspondence Address:
`WILLIAM L. PARADICE, III
`488O STEVENS CREEKBOULEVARD
`SUTE 201
`SAN JOSE, CA 95129 (US)
`(21) Appl. No.:
`11/737,127
`
`(22) Filed:
`
`Apr. 18, 2007
`Related U.S. Application Data
`(60) Provisional application No. 60/793,281, filed on Apr.
`18, 2006.
`
`Publication Classification
`
`(51) Int. Cl.
`(2006.01)
`GIOL 2L/02
`(52) U.S. Cl. .............................................................. 704/228
`
`(57)
`
`ABSTRACT
`
`A response select null steering circuit includes a beam
`former, a plurality of separate fixed filters, and a selection
`circuit. In response to Sound signals emitted from a desired
`speaker and an unwanted interferer, a sum signal containing
`signal components of the speaker and interferer is generated,
`and the beam former generates a difference signal that Sup
`presses signal components of the speaker. Each filter pro
`vides a null in a unique direction relative to the desired
`speaker, and can be individually configured to suppress
`Sound signals from an interferer in a particular direction. The
`selection circuit selects the filter output signal that has the
`least amount of signal energy as achieving the best Suppres
`sion of the unwanted interferer.
`
`300
`
`
`
`312(1)
`
`
`
`Selection
`CKT
`320
`
`OUTmin
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`P1
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`PL2
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`OUT1
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`OUT2
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`PL2
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`OUTmin
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`OUTmin
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`FIG. 8B
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`RESPONSE-SELECT NULL STEERING CIRCUIT
`
`CROSS-REFERENCE TO RELATED
`APPLICATION
`0001) This application claims the benefit under 35 USC
`119(e) of the co-pending and commonly owned U.S. Pro
`visional Application No. 60/793,281 entitled “Response
`Select Null Steering Circuit” filed on Apr. 18, 2006, which
`is incorporated by reference herein.
`
`FIELD OF THE INVENTION
`0002 The present invention relates generally to audio
`signal processing and more particularly to the cancellation
`of unwanted interference signals from an audio reception
`unit.
`
`BACKGROUND
`0003 Directional microphone systems are designed to
`sense sound from a particular source Such as a desired
`speaker located in a specified direction while rejecting,
`filtering out, blocking, or otherwise attenuating Sound from
`other sources such as undesired bystanders or noise located
`in other directions. To achieve a high degree of direction
`ality, microphones typically include an array of two or
`microphone sensors or transducers contained in a mechani
`cal enclosure. The enclosure typically includes one or more
`acoustic ports for receiving sound and additional material
`for guiding Sound from within the beam angle to sensing
`elements and blocking sound from other directions.
`0004 Directional microphones may be beneficially
`applied to a variety of applications such as conference
`rooms, home automation, automotive voice commands, per
`Sonal computers, telephone headsets, personal digital assis
`tants, and the like. These applications typically have one or
`more desired sources of Sound accompanied by one or more
`noise sources. In Such applications, it is desired to increase
`the signal to noise ratio (SNR) between the desired source
`and unwanted interferers. Attempts to do so using frequency
`filtering are largely unsuccessful because the frequencies to
`be filtered out are typically the same as the desired source,
`for example, in a telephone headset that seeks to preserve the
`desired speaker's voice while simultaneously canceling the
`Voices of people other than the speaker Such as bystanders.
`Sound sources other than the desired speaker are referred to
`herein as interferers.
`0005 Because the sound signals from the desired speaker
`and unwanted interferers are typically emitted from different
`locations relative to the microphone, the spatial separation
`between the speaker and interferers can be exploited to
`separate the desired Sound signal from the unwanted inter
`ferer Sound signal using spatial filters such as a delay-and
`sum beam former or a Griffiths-Jim adaptive beam former.
`More specifically, nulls in the directional sensitivity pattern
`of the microphone array may be used for interference
`cancellation, while a fixed gain in a known directional
`location (e.g., corresponding to the desired speaker) may be
`used to preserve the Sound signals emitted by the desired
`speaker.
`0006 For example, FIGS. 1A-1B depict a microphone
`array 100 having two microphone sensors M1 and M2
`positioned along a longitudinal axis 101 and separated by a
`
`distance d. A desired speaker (SPKR) is located in the O
`degree () direction of the axis 101, and an interferer (INT)
`is located at an angle 0 from the 0° direction of axis 101.
`Assuming the INT is in the far field, sound waves emitted
`from INT travel a distancer to M2 and travel a distancer-i-Ar
`to M1. Thus, the phase difference in sound signals received
`at the two sensors M1 and M2, which may be expressed as
`kAr=2 LAr/w (where w is the wavelength sound waves), may
`be used to distinguish between Sound signals emitted from
`the SPKR and from the INT.
`0007 A fixed null-steering system such as a well-known
`beam former filters the microphone signal produced by sen
`Sor M1 and Subtracts it from the microphone signal produced
`by sensor M2 to generate an output signal that Suppresses
`sound signals attributed to INT, thereby creating a fixed
`sensitivity pattern (also known as polar response pattern).
`However, in many applications, the location and direction of
`the interferer (INT) may not be known and/or may change
`even though the location and direction of the desired speaker
`SPKR remains constant. In such applications, adaptive fil
`ters may be employed to continually modify the system
`response (e.g., by continuously modifying the polar
`response pattern) so that the Sound processing system steers
`a “null in the direction of the interferer. To distinguish
`between the desired speaker SPKR and the unwanted inter
`ferer INT, Sound processing systems may employ a combi
`nation of fixed beam formers and adaptive filters.
`0008 For example, FIG. 2 shows a well-known Griffiths
`Jim adaptive beam former circuit 200 that includes a fixed
`beam former and an adaptive filter. Filter circuit 200 is
`shown to include microphone sensors M1-M2, a delay
`element 210, subtraction circuits 221-222, Summing circuit
`223, an adaptive filter 230, and a signal power estimator
`circuit 240. As depicted in FIG. 2, the speaker SPKR is
`located along the longitudinal axis of the microphone sen
`sors M1-M2 at a reference angle of 0°. Further, an interferer
`INT (not shown in FIG. 2) is located at some unknown angle
`0 relative to the SPKR. In response to sound generated by
`INT and SPKR, sensor M1 produces a first input signal IN1
`and sensor M2 produces a second input signal IN2. IN1 is
`provided to delay element 210, which is typically a low-pass
`filter (LPF) that produces a delayed input signal IN1D.
`Signals IN1D and IN2 are summed at summing circuit 223
`to generate a sum signal (SUM) containing signal compo
`nents of both the SPKR and INT, and signal IN1D is
`subtracted from IN2 by subtraction circuit 221 to generate a
`difference signal (DIFF) in which signal components of
`SPKR are suppressed so that DIFF contains mostly signal
`components of INT. Thus, sensors M1-M2, delay element
`210, and subtraction circuit 221 together form a fixed
`beam former that suppresses SPKR from DIFF in a well
`known manner, for example, by setting the filter coefficients
`of delay element 210 to suitable values according to the
`distance between sensors M1-M2 and the direction of SPKR
`(which is at 0° in FIG. 2).
`0009. The difference signal is provided as an input signal
`to adaptive filter 230, which includes an output to generate
`a filtered difference output signal FO and includes a control
`terminal to receive a tuning signal from signal power
`estimator (SPE) 240. The filtered difference signal FD is
`subtracted from SUM in subtraction circuit 222 to generate
`an output signal OUT that dynamically preserves Sound
`
`Page 17 of 25
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`components of SPKR while Suppressing Sound components
`of INT over a range of changing directions for INT.
`0010. As known in the art, SPE circuit 240 estimates the
`signal power of the output signal OUT, and in response
`thereto generates a tuning signal (TN) that is used to
`continuously tune the adaptive filter 230. Although not
`shown for simplicity, for some applications, the SPE circuit
`generates the tuning signal TN for the adaptive filter 230 in
`response to both the output signal OUT and the difference
`signal (DIFF). Adaptive filter 230, which is typically a finite
`impulse response (FIR) filter, is continuously tuned in
`response to TN to Suppress the dominant Source components
`in DIFF so that INT sound components are suppressed from
`its output signal FD. More specifically, the polar response
`pattern of adaptive filter 230 is continuously modified to
`continuously steer the null in the direction of INT to
`minimize the sound energy attributed to INT from the
`filtered difference signal FD.
`0011. It is important to note that adaptive beam formers of
`type shown in FIG. 2 are implemented using digital circuitry,
`for example, because FIR filters operate in the digital
`domain.
`0012. Thus, when the filtered difference signal FD is
`subtracted from the sum signal SUM at subtraction circuit
`222, the resultant output signal is a directionally sensitive
`signal in which the INT components are Suppressed and the
`SPKR components are preserved. For example, if the sum
`signal SUM is represented as a SPKR component S plus an
`INT component INTs
`and the filtered difference signal
`FD represents the estimate of IsM the output signal OUT=
`S+INTs-FD-S, and the transfer function of the adaptive
`filter is H(c))=INTs/FD.
`0013 Although effective in providing a directional sen
`sitivity pattern that can dynamically steer a null in the
`direction of INT, the adaptive filter employed by systems
`such the Griffiths-Jim circuit 200 requires a complicated
`algorithm to continuously steer the null in the direction of
`the interferer INT. In addition, the adaptive filter itself is
`typically a very complex circuit requiring numerous cas
`caded filtering stages and various adjustable tap delay lines,
`which not only consumes a large circuit area but also may
`be difficult to design and implement.
`BRIEF DESCRIPTION OF THE DRAWINGS
`0014 FIGS. 1A-1B depict a microphone system having
`an array of two sensors deployed in a fixed null-steering
`environment;
`0.015
`FIG. 2 is block diagram of a two-microphone
`Griffiths-Jim adaptive beam former circuit;
`0016 FIG. 3 is a sound processing system in accordance
`with one embodiment of the present invention;
`0017 FIG. 4 is a simplified functional block diagram of
`one embodiment of the compare and select circuit of the
`Sound processing systems of FIG. 3;
`0018 FIG. 5 shows illustrative magnitude and phase
`response plots for three exemplary discrete filters for some
`embodiments of the sound processing systems of FIG. 3;
`0.019
`FIG. 6A shows an exemplary polar response pat
`tern over a specified frequency range for the first discrete
`filter of the sound processing systems of FIG. 3;
`
`0020 FIG. 6B shows an exemplary polar response pat
`tern over a specified frequency range for the second discrete
`filter of the sound processing systems of FIG. 3;
`0021
`FIG. 6C shows an exemplary polar response pat
`tern over a specified frequency range for the third discrete
`filter of the sound processing systems of FIG. 3;
`0022 FIG. 7A shows an exemplary polar response pat
`tern for a frequency of 200 Hz for the third discrete filter of
`the Sound processing systems of FIG. 3;
`0023 FIG. 7B shows an exemplary polar response pat
`tern for a frequency of 1 kHz for the third discrete filter of
`the Sound processing systems of FIG. 3;
`0024 FIG. 7C shows an exemplary polar response pat
`tern for a frequency of 4 kHz for the third discrete filter of
`the Sound processing systems of FIG. 3;
`0025 FIG. 8A is a block diagram of one embodiment of
`the selection circuit of the Sound processing systems of FIG.
`3:
`0026 FIG. 8B is a block diagram of another embodiment
`of the selection circuit of the sound processing systems of
`FIG. 3;
`0027 FIG. 8C is a block diagram of yet another embodi
`ment of the selection circuit of the Sound processing systems
`of FIG. 3; and
`0028 FIG. 9 is an illustrative flow chart depicting an
`exemplary operation for some embodiments of the Sound
`processing systems of FIG. 3.
`0029. Like reference numerals refer to corresponding
`parts throughout the drawing figures.
`
`DETAILED DESCRIPTION
`0030 Embodiments of the present invention are
`described below in the context of a microphone array having
`two sensors for simplicity only. It is to be understood that the
`present embodiments are equally applicable sound process
`ing systems that employ any number of microphone sensors.
`In the following description, for purposes of explanation,
`specific nomenclature is set forth to provide a thorough
`understanding of the present invention. In other instances,
`well-known circuits and devices are shown in block diagram
`form to avoid obscuring the present invention unnecessarily.
`For example, the interconnection between circuit elements
`or circuit blocks may be shown or described as multi
`conductor or single conductor signal lines. Each of the
`multi-conductor signal lines may alternatively be single
`conductor signal lines, and each of the single-conductor
`signal lines may alternatively be multi-conductor signal
`lines. Signals and signaling paths shown or described as
`being single-ended may also be differential, and signals and
`signaling paths shown or described as being differential may
`also be single-ended. Further, the logic states of various
`signals described herein are exemplary and therefore may be
`reversed or otherwise modified as generally known in the
`art. Accordingly, the present invention is not to be construed
`as limited to specific examples described herein but rather
`includes within its scope all embodiments defined by the
`appended claims.
`0031. In accordance with embodiments of the present
`invention, a response select null steering circuit includes a
`
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`beam former, a Summing circuit, a plurality of separate
`filtering circuits, and a selection circuit. In response to input
`signals generated by microphone sensors receiving Sound
`signals from a desired speaker and an unwanted interferer,
`the Summing circuit generates a Sum signal containing signal
`components of both the speaker and the interferer. The
`beam former generates a difference signal that Suppresses
`signal components of the desired speaker so that the differ
`ence signal contains primarily only the signal components of
`the interferer. Each filtering circuit includes a fixed filter and
`a subtraction circuit that together provide a different polar
`response pattern that exhibits a null in a unique direction
`relative to the desired speaker. In this manner, each filtering
`circuit may be individually configured to Suppress Sound
`signals from an interferer located in a direction associated
`with the null in the corresponding polar response pattern of
`the filter. The selection circuit receives the output signals
`from the various filtering circuits and selects the output
`signal that has the least amount of signal energy, where the
`output signal having the least signal energy achieves the best
`Suppression of the unwanted interferer.
`0032. Thus, unlike prior sound processing systems such
`as the Griffiths-Jim beam former circuit of FIG. 2, embodi
`ments of the present invention do not require a complex
`adaptive filter operating according to a complex algorithm
`that continuously modifies the adaptive filter's polar
`response pattern to track the changing location of the
`unwanted interferer. As a result, Sound beam formers in
`accordance with embodiments of the present invention are
`less complex and much easier to design and implement than
`prior filter circuits of the Griffiths-Jim type. Further, by
`employing a plurality of fixed (e.g., non-adaptive) filters that
`may be individually configured to provide interferer Sup
`pression in a corresponding predetermined direction,
`embodiments of the present invention may provide
`improved performance over adaptive filters that are respon
`sible for interferer suppression in all directions because such
`adaptive filters may not always operate as intended. For this
`reason, performance of audio filtering circuits of the present
`invention in real-world applications may also be more
`reliable and more predictable than systems that rely upon
`adaptive filtering techniques.
`0033) Audio filtering circuits of the present invention
`may be deployed in any suitable system including, for
`example, conference rooms, home automation, automotive
`Voice commands, personal computers, telecommunications,
`personal digital assistants, and the like. Applicants have
`found that null steering circuits in accordance with the
`present invention are particularly useful in telephone head
`SetS.
`0034 FIG. 3 shows a null-steering response select circuit
`300 in accordance with some embodiments of the present
`invention. Null steering circuit 300 includes microphone
`sensors M1-M2, a delay element 301A, a gain element
`301B, a subtraction circuit 302, a summing circuit 303, a
`plurality of discrete or individual filtering circuits 310(1)-
`310(n), and a selection circuit 320. As depicted in FIG. 3, the
`speaker SPKR is located along the longitudinal axis of the
`microphone sensors M1-M2 at a reference angle of 0°.
`Further, an interferer INT (not shown in FIG. 3) is located
`at some unknown angle 0 relative to the SPKR.
`0035) In response to sound generated by INT and SPKR,
`sensor M1 produces a first input signal IN1 and sensor M2
`
`produces a second input signal IN2. IN1 is provided to a
`delay element 301A that produces a delayed input signal
`IN1D. For some embodiments, delay element is a second
`order low-pass filter (LPF) of the Bessel type that produces
`a relatively constant delay over a desired frequency range.
`More specifically, delay element 301A performs an input
`filtering operation, As, on the M1 microphone signal IN1
`that preserves the SPKR in a given direction, and well
`known gain element 301B provides a near-field gain factor
`A to signal IN2 to compensate for SPKR being in the near
`field. The near-field gain factor A allows preservation of a
`desired source such as the SPKR based on distance as well
`as direction relative to M1-M2, and provides additional
`attenuation of the INT in the same direction as the speaker,
`but at a different distance from the microphone array than
`the SPKR. This feature can be expanded to multiple micro
`phones and multiple gains. For other embodiments, delay
`element 301A may employ other types of filters.
`0036. For exemplary embodiments described herein, sen
`sors M1-M2 are omni-directional sound transducers in
`which M1 and M2 may be modeled as follows:
`
`M1
`M2
`
`X = e Am
`XR = 1
`
`(1)
`(2)
`
`0037. However, for other embodiments, sensors M1-M2
`may be configured to have any suitable directional sensitiv
`ity.
`0038 Signals IN1D and IN2 are summed at summing
`circuit 303 to generate a sum signal (SUM) containing signal
`components of both the SPKR and INT, and signal IN1D is
`subtracted from IN2 by subtraction circuit 302 to generate a
`difference signal (DIFF) in which signal components of
`SPKR are suppressed so that DIFF contains mostly signal
`components of INT. Thus, sensors M1-M2, delay element
`301A, and subtraction circuit 302 together form a fixed
`beam former that suppresses SPKR from DIFF according to
`the polar response pattern implemented by delay element
`301A.
`0039. Further, for other embodiments, a second delay
`element (not shown for simplicity) may be provided
`between gain element 301B and summing circuit 303, where
`the second delay element provides a filtering function for
`IN2 that expands the sensitivity pattern to the back half
`plane in the direction opposite the SPKR (i.e., along the 180°
`axis).
`0040. The difference signal DIFF is provided as an input
`signal to each of the plurality of filtering circuits 310(1)-
`310(n). Each filtering circuit 310 includes a fixed filter 311
`and a subtraction circuit 312. Each filter 311 has an input to
`receive DIFF and has an output coupled to a corresponding
`subtraction circuit 312, which subtracts the filtered signal
`FDX provided by the filter 311 from the sum signal SUM to
`generate a corresponding filter output signal OUTX, where
`'X' denotes an integer between 1 and n corresponding to one
`of the filtering circuits 310(1)-310(n). The filter output
`signals OUT1-OUTn output from corresponding filtering
`circuits 310(1)-310(n) are provided to selection circuit 320,
`which selects the filter output signal OUTx that provides the
`best INT Suppression as the selected minimum-energy out
`put signal OUT for the null steering circuit 300.
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`0041) Each of the plurality of filters 311(1)-311(n) is a
`fixed filter having a different magnitude and phase response
`so that the filters have polar response patterns with nulls in
`different directions which may be specified by the corner
`frequency of the corresponding filter. The filters 311(1)-
`3.11(n) may be any type offilter, and each may be configured
`to have a polar response pattern with a null in a designated
`direction. In this manner, each of filters 311(1)-311(n) may
`be optimized to provide INT Suppression in a designated
`direction, which is in contrast to prior art adaptive tech
`niques such as the Griffiths-Jim beam former circuit that is
`configured to continuously steer the null in the direction of
`a dominant interferer.
`0042. Thus, in accordance with some embodiments of the
`present invention, each of the filters 311(1)-311(n) is a
`separate filter that corresponds to a null in a particular
`direction. Moreover, any number of null angles or directions
`can be selected providing a corresponding number of filters
`311. Thus, each of filters 311(1)-311(n) may be “assigned
`to a corresponding assigned interferer direction by config
`uring the polar response pattern of the filter to create null in
`the sensitivity pattern in the corresponding assigned direc
`tion. In this manner, the audio space Surrounding the micro
`phone sensor array may be divided into segments, and the
`frequency response of each filter may be specifically tailored
`to Suppress interferer Sound signals emitted from a corre
`sponding assigned segment.
`0043. The filters 311 may be derived assuming the signal
`model shown above in (1) and (2). For some embodiments,
`the filters 311 may be characterized by a transfer function
`H(s) as shown in (3), where m indexes the null direction:
`
`S (on
`H = K
`S - (Op.
`m(s)
`
`(3)
`
`The gain factor may be expressed as K shown below in (4),
`where A is a near-field gain parameter:
`
`A - 1
`
`1. 2
`
`2
`
`(4)
`
`(5)
`
`(6)
`
`The time constant appearing in both the Zero and pole
`equations is
`
`AnAm+As
`
`(7)
`
`where the time-delay corresponding to the selectable-null is
`
`-d
`
`(8)
`
`and compensating for the time-delay corresponding to the
`speaker direction yields
`
`d
`
`(9)
`
`0044) For example, referring again to FIG. 3, for an
`exemplary embodiment in which null steering circuit 300
`includes 3 filtering circuits 310(1)-310(n), each of the 3
`corresponding fixed filters 311(1)-311(3) may be configured
`to have a null in a different specified direction. More
`specifically, referring to the magnitude response plot 510
`and phase response plot 520 of FIG. 5, a first filter 311(1)
`may be configured as a first-order low pass filter (LPF)
`having a magnitude response 511 with a corner frequency of
`521 Hz and having a phase response 521, a second filter
`3.11(2) may be configured as a first-order LPF having a
`magnitude response 512 with a corner frequency of 331 Hz
`and having a phase response 522, and a third filter 311(3)
`may be configured as a first-order LPF having a magnitude
`response 513 with a corner frequency of 261 Hz and having
`a phase response 523. For this example, the frequency
`response of the first filter 311 (1) results in a broadside null,
`figure-8 type polar response pattern 611 having nulls at 90°
`and at -90° relative to the SPKR located at 0°, as shown in
`FIG. 6A, the frequency response of the second filter 311(2)
`results in a hyper-cardioid type polar response pattern 612
`having nulls at 109° and at -109° relative to the SPKR
`located at 0°, as shown in FIG. 6B, and the frequency
`response of the third filter 311(3) results in cardioid type
`polar response pattern 613 having a null at 180° relative to
`the SPKR located at 0°, as shown in FIG. 6C.
`0045. The polar response patterns of FIGS. 6A-6C are
`composite plots generated using well-known root-mean
`square (RMS) value of attenuation referenced to twice the
`signal level of the M1 input signal (which provides the 0 dB
`reference) over a frequency from 1 to 4 kHz. Referring to
`FIG. 6C, note that the null at 180° is actually a minor lobe
`with symmetrical nulls near the at 180° axis direction. At
`lower frequencies, the polar response pattern of the third
`filter 311(3) having the frequency response 513/523 includes
`a null at 180°, and the null begins to drift away from the at
`180° axis as frequency increases. For example, FIGS.
`7A-7C show polar response plots 713A-713C for the third
`filter 311(3) at 200 Hz, 1 kHz, and 4 kHz, respectively.
`0046 Referring again to FIG. 3, within each filtering
`circuit 310, its fixed filter 311 generates a filtered delay
`signal FDX that is subtracted from the sum signal SUM in
`the corresponding Subtraction circuit 312 to generate a filter
`output signal OUTX in which INT components from a
`corresponding direction are Suppressed. For example, for the
`exemplary embodiment in which null steering circuit 300
`includes 3 filters 311(1)-311(3) having the polar response
`patterns shown in FIGS. 6A-6C, the filtered signal I1
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`US 2007/0244698 A1
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`Oct. 18, 2007
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`generated by first filter 311(1) matches components of INT
`signals emitted from a direction of 90° relative to the SPKR
`so that when subtracted from SUM the corresponding filter
`output signal OUT1 suppresses INT signals from 90° while
`preserving the SPKR signals. Similarly, the filtered signal I2
`generated by second filter 311(2) matches components of
`INT signals emitted from a direction of 109° relative to the
`SPKR so that when subtracted from SUM the corresponding
`signal OUT2 suppresses INT signals from 1090 while pre
`serving the SPKR signals, and the filtered signal I3 gener
`ated by first filter 311(1) matches components of INT signals
`emitted from a direction of 180° relative to the SPKR So that
`when subtracted from SUM the resulting filter output signal
`P3 suppresses INT signals from 180° while preserving the
`SPKR signals. In this manner, each filter 311 can be spe
`cifically and accurately tuned to cancel speaker components
`from a particular direction.
`0047. The selection circuit 320 selects one of the filter
`output signals OUT1-OUTn that provides the best cancel
`lation of the interferer INT while preserving the SPKR
`Sound signals. Any suitable technique and/or circuit may be
`employed to perform the function of selection circuit 320.
`For example, FIG. 4 shows a selection circuit 400 that is one
`embodiment of selection circuit 320 of FIG. 3. Selection
`circuit 400 includes a plurality of signal power estimator
`(SPE) circuits 410(1)-410(n) and a compare circuit 420.
`Each SPE circuit 410 includes an input to receive a corre
`sponding filter output signal OUT from a corresponding
`filtering circuit 310, and includes an output coupled to a
`corresponding input of compare circuit 420. Compare circuit
`420 also includes inputs to receive the filter output signals
`OUT1-OUTn. Each SPE circuit 410 estimates the Sound
`energy contained in the corresponding filter output signal
`OUT, and in response thereto generates a power level signal
`PL indicative of the signal energy. SPE circuits 410 may use
`any Suitable technique for estimating the power of signal P
`including, for example, RMS, mean-square, peak detection,
`envelope detection, and so on.
`0.048. The compare circuit 420 compares the power level
`signals PL1-PLn provided by respective SPE circuits
`410(1)-410(n) with each other to determine which of the
`corresponding filter output signals OUT1-OUTn has the
`least amount of energy, and selects that signal to be output
`as the minimum-energy output signal OUT. Selection
`circuit 420 may be implemented using any suitable compare
`and select circuits.
`0049. An exemplary operation of one embodiment of null
`steering circuit 300 is described below with respect to the
`illustrative flow chart 900 of FIG. 9. First, in response to
`sound signals emitted by a desired SPRK and unwanted
`interferer and received by microphone sensors M1-M2,
`SUM and DIFF signals are generated (step 901). Then, DIFF
`is provided as an input signal to each of the filtering circuits
`310(1)-310(n) containing respective fixed filters 311(1)-
`3.11(n) (step 902). Then, each filter 311 generates a filtered
`difference signal FD (step 903). Each filtered difference
`signal FD is subtracted from SUM to generate a filter output
`signal OUT (step 904). Next, the selection circuit compares
`the filter output signals with each other to determine which
`signal has the least amount of energy (step 905) and selects
`the filter output signal having the least amount of energy as
`the minimum-energy output signal OUT.
`
`0050 FIG. 8A shows a 2-input selection circuit 800 that
`is one embodiment of selection circuit 400 of FIG. 4.
`Selection circuit 800 includes a comparator 801, an inverter
`802, and two switches SW1-SW2. Comparator 801 has
`inputs to receive power level signals PL1-PL2 from SPE
`circuits 410 of FIG. 4, and an output to generate a select
`signal SEL. The select signal SEL is provided to a control
`terminal of SW2, which includes an input to receive OUT2
`and an output to generate OUT. The select signal SEL is
`also provided to inverter 802, which logically inverts SEL to
`generate an inverted select signal SEL that is provided to a
`control terminal of SW1, which includes