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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`_____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`_____________
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`PDF SOLUTIONS, INC.,
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`Petitioner,
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`v.
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`OCEAN SEMICONDUCTOR LLC,
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`Patent Owner.
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`_____________
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`Case No. 2022-01196
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`Patent No. 6,836,691
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`_____________
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`
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`DECLARATION OF P.K. MOZUMDER, Ph.D.
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 1 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`
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`I, P.K. Mozumder, declare:
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`1.
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`2.
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`I am over 18 years of age and reside in Dallas, TX.
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`I am a Vice President at PDF Solutions, Inc. ("PDF"), where I have
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`been employed since 1998. I have been asked by PDF's counsel to provide my
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`independent analysis of claims 1-19 of U.S. Patent No. 6,836,691 (“the ‘691
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`patent”) (Ex. 1001) in light of certain prior art publications discussed below.
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`3.
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`Other than my regular PDF salary, I will not receive any
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`compensation for work done in connection with this matter and neither my salary
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`nor any bonus depends in any way on the outcome in this matter.
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`4.
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`It is my understanding that PDF's counsel, in addition to representing
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`PDF as the petitioner, will also be representing me personally in this matter.
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`I.
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`PERSONAL AND PROFESSIONAL BACKGROUND
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`5.
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`I discuss here portions of my education and professional experience
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`relevant to this matter.
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`A. Education
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`6.
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`I received a Bachelor’s Degree, Electrical Engineering, Computer
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`Engineering from Indian Institute of Technology, Bombay, in 1984.
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`7.
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`I also received a Ph.D. from Carnegie Mellon University in 1989. My
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`Ph.D. Thesis was entitled, “Statistical quality control for VLSIC fabrication
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`process.”
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`B.
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`Experience
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`8.
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`From 1989 until 1998, I worked at Texas Instruments (“TI”) as a
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`Manager and Technical lead for advanced process synthesis and control.
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`9. While at TI, I developed top-down design methodologies for reducing
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`the cost and cycle-time for developing application-specific integrated circuit (“IC”)
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`manufacturing technologies. I also developed algorithms and techniques for
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`utilizing device and process simulation and short and full-flow silicon experiments
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`for application-specific technology development.
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`10. While at TI, I was actively involved with the Microelectronics
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`Manufacturing Science and Technology (“MMST”) program that began at TI in
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`1988. The MMST program aimed to demonstrate the technical feasibility of
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`several synergistic concepts in wafer fabrication that TI had pursued internally
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`since the early 1980s.
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`11. MMST was intended for use in factories with similar single-wafer
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`process modules that each have in-situ sensors and actuators for real-time process
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`control and diagnostics. Local machine and process control was seamlessly
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`integrated with factory-wide controls into an overall Computer Integrated
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`Manufacturing (“CIM”) environment.
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`12.
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`In 1992, we constructed a manufacturing laboratory that embodied
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`first-pass implementations of TI’s MMST concepts. We then successfully
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`conducted a final “1000-Wafer Demonstration” in early 1993 that demonstrated
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`the technical feasibility of advanced manufacturing concepts. TI then proceeded to
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`offer a commercial CIM system based on our MMST research through its
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`Enterprise Systems business.
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`13. Multiple publications demonstrate my involvement in the
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`development of TI’s MMST program: Barna, G. G., Loewenstein, L. M.,
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`Brankner, K. J., Butler, S. W., Mozumder, P. K., Stefani, J. A., Henck, S. A.,
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`Chapados, P., Buck, D., Maung, S., Saxena, S., “Sensor integration into plasma
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`etch reactors of a developmental pilot line.” Journal of Vacuum Science &
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`Technology B: Microelectronics and Nanometer Structures Processing,
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`Measurement, and Phenomena, 12(4):2860-7 (1994); and, Stefani, J. A., Poarch,
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`S., Saxena, S., Mozumder, P. K., “Advanced process control of a CVD tungsten
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`reactor. IEEE Transactions on Semiconductor Manufacturing,” 9(3):366-83
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`(1996).
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`14.
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`I have also authored or co-authored other articles on the topic of
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`semiconductor manufacturing, process control, modeling, and optimization,
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`including the following: M. Chew, S. Saxena, T. F. Cobourn, P. K. Mozumder
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`and A. J. Strojwas, “A new methodology for concurrent technology development
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`and cell library optimization,” Proceedings Twelfth International Conference on
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`VLSI Design. (Cat. No.PR00013), 1999, pp. 18-24; S. Rao, S. Saxena, P. K.
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`Mozumder, K. Vasanth, J. Davis and R. Burch, “Reducing silicon usage during
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`technology development-a variance analysis approach,” IWSM. 1998 3rd
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`International Workshop on Statistical Metrology (Cat. No.98EX113), 1998, pp. 54-
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`57; Davis, J.C. and Mozumder, P.K. and Burch, R. and Fernando, C. and Apte,
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`P.P. and Saxena, S. and Rao, S. and Vasanth, K, “Automatic synthesis of
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`equipment recipes from specified wafer-state transitions,” IEEE Transactions on
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`Semiconductor Manufacturing, vol. 11, no. 4, pp. 527-536, Nov. 1998; Saxena, S.
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`and Burch, R. and Vasanth, K. and Rao, S. and Fernando, C. and Davis, J. and
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`Mozumder, P.K., “An application of process synthesis methodology for first-pass
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`fabrication success of high-performance deep-submicron CMOS,” International
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`Electron Devices Meeting. IEDM Technical Digest, 1997, pp. 149-152; Gardner,
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`M.M., Lu, J.C., Gyurcsik, R.S., Wortman, J.J., Hornung, B.E., Heinisch, H.H.,
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`Rying, E.A., Rao, S., Davis, J.C. and Mozumder, P.K., 1997. “Equipment fault
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`detection using spatial signatures.” IEEE Transactions on Components, Packaging,
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`and Manufacturing Technology: Part C, 20(4), pp.295-304; Boning, D.S. and
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`Mozumder, P.K., 1994. “DOE/Opt: A system for design of experiments, response
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`surface modeling, and optimization using process and device simulation.” IEEE
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`Transactions on Semiconductor Manufacturing, 7(2), pp.233-244; Mozumder,
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`P.K. and Barna, G.G., 1994. “Statistical feedback control of a plasma etch
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`process.” IEEE Transactions on Semiconductor Manufacturing, 7(1), pp.1-11;
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 5 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`Hosack, H.H., Mozumder, P.K. and Pollack, G.P., 1998. Recent advances in
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`process synthesis for semiconductor devices. IEEE Transactions on Electron
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`Devices, 45(3), pp.626-633; Mozumder PK, Saxena S, Collins DJ. “A monitor
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`wafer based controller for semiconductor processes.” IEEE Transactions on
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`Semiconductor Manufacturing. 1994 Aug;7(3):400-11; Mozumder PK,
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`Loewenstein LM. “Method for semiconductor process optimization using
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`functional representations of spatial variations and selectivity.” IEEE transactions
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`on components, hybrids, and manufacturing technology. 1992 Jun;15(3):311-6;
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`Mozumder PK, Shyamsundar CR, Strojwas AJ. “Statistical control of VLSI
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`fabrication processes. A framework.” IEEE Transactions on Semiconductor
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`Manufacturing. 1988 May;1(2):62-71; Saxena S, Mozumder PK, Unruh A, Burch
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`R. “A methodology for the top-down synthesis of semiconductor process flows.”
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`In Proceedings of International Symposium on Semiconductor Manufacturing
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`1995 Sep 17 (pp. 36-40). IEEE; Barna GG, Loewenstein LM, Henck SA,
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`Chapados P, Brankner KJ, Gale RJ, Mozumder PK, Butler SW, Stefani JA. “Dry
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`etch processes and sensors.” Solid state technology. 1994 Jan 1;37(1):47-52; Giles
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`MD, Boning DS, Chin GR, Dietrich WC, Karasick MS, Law ME, Mozumder PK,
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`Nackman LR, Rajan VT, Walker DM, Wang RH. “Semiconductor wafer
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`representation for TCAD. IEEE transactions on computer-aided design of
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`integrated circuits and systems.” 1994 Jan;13(1):82-95; Gopalarao KS, Mozumder
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 6 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`PK, Boning DS. “An integrated technology CAD system for process and device
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`designers.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
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`1993 Dec;1(4):482-90; Collins DJ, Strojwas AJ, Mozumder PK. “Model-based
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`equipment diagnosis.” In Manufacturing Process Control for Microelectronic
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`Devices and Circuits 1994 Sep 16 (Vol. 2336, pp. 89-100). SPIE; Mozumder PK,
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`Strojwas AJ, Bell D. “Statistical process simulation for CAD/CAM.” In
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`Proceedings of the IEEE 1988 Custom Integrated Circuits Conference 1988 May
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`16 (pp. 13-5). IEEE; Chatterjee A, Liu J, Mozumder PK, Rodder M, Chen IC. “A
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`pass transistor design methodology for 256 Mbit DRAM and beyond.” In
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`Proceedings of 1994 VLSI Technology Symposium 1994 Jun 7 (pp. 137-138).
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`IEEE; Saxena S, Mozumder PK, Taylor KJ. “Simultaneous control of multiple
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`measures of nonuniformity using site models and monitor wafer control.” IEEE
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`transactions on semiconductor manufacturing. 1996 Feb;9(1):128-35; Mozumder
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`PK, Saxena S, Taylor K. “Simultaneous control of multiple nonuniformity metrics
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`using site models and monitor wafer control.” In Proceedings of 1994 IEEE/SEMI
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`Advanced Semiconductor Manufacturing Conference and Workshop (ASMC)
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`1994 Nov 14 (pp. 205-210). IEEE; Saxena S, Burch R, Mozumder PK, Vasanth
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`K, Rao S, Davis J, Fernando C. “Methods for the design of microelectronic devices
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`and process flows for manufacturability.” In Microelectronic Device Technology
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`1997 Aug 27 (Vol. 3212, pp. 18-23). SPIE; Chew M, Saxena S, Cobourn TF,
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 7 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`Mozumder PK, Strojwas AJ. “A new methodology for concurrent technology
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`development and cell library optimization.” In Proceedings Twelfth International
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`Conference on VLSI Design.(Cat. No. PR00013) 1999 Jan 7 (pp. 18-24). IEEE;
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`Vasanth K, Nandakumar M, Rodder M, Sridhar S, Mozumder PK, Chen IC. “A
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`pocket implant model for sub-0.18 micron CMOS process flows.” In SISPAD'97.
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`1997 International Conference on Simulation of Semiconductor Processes and
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`Devices. Technical Digest 1997 Sep 8 (pp. 181-183). IEEE; Mozumder PK,
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`Strojwas AJ. “Statistical process control system.” In Proc. of the 3rd Symposium
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`on Automated Integrated Circuit Manufacturing 1988 (pp. 214-228); Mozumder
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`PK, Chatterjee A. “A statistical methodology as applied to a 256 Mbit DRAM pass
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`transistor design.” IEEE transactions on semiconductor manufacturing. 1996
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`Aug;9(3):437-46; Mozumder PK, Saxena S, Collins D. “A monitor wafer based
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`controller for PECVD silicon nitride process on AMT 5000.” In Proceedings.
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`IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop
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`1993 Oct 18 (pp. 136-141). IEEE; Vasanth K, Apte P, Davis J, Saxena S, Burch R,
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`Rao S, Mozumder PK. “A Study of Transistor Optimization in A 0.25 Micron
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`CMOS Flow Using S/D and Silicide Process Modules and Their Interactions.”
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`MRS Online Proceedings Library (OPL). 1998;514; Davis JC, Mozumder PK,
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`Burch R, Fernando C, Apte PP, Saxena S, Rao S, Vasanth K, Li X, Strojwas AJ,
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`Reddy M. SPECIAL SECTION ON 1997 INTERNATIONAL WORKSHOP ON
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 8 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`STATISTICAL METROLOGY; Davis JC, Rao S, Vasanth K, Saxena S, Burch R,
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`Mozumder PK. “Statistical aspects of tuning simulators to noisy data.” In IWSM.
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`1998 3rd International Workshop on Statistical Metrology (Cat. No. 98EX113)
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`1998 Jun 7 (pp. 18-21). IEEE; Mozumder PK. “Design and implementation of a
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`prototype hybrid simulation environment.” In Proceedings of IEEE Custom
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`Integrated Circuits Conference-CICC'93 1993 May 9 (pp. 8-6). IEEE; Rao S,
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`Vasanth K, Mozumder PK, Saxena S, Davis JC, Burch R. “Planning wafer
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`allocation for CMOS process development. A nonparametric approach.” IEEE
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`transactions on semiconductor manufacturing. 1998 Nov;11(4):583-90;
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`Mozumder PK. “Process Control Systems In Sub 0.5 M Factories.” In
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`International Symposium on Semiconductor Manufacturing 1993 Sep 20 (pp.
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`0_450-0_472). IEEE.
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`15. Since joining PDF in 1998, I have continued working on
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`semiconductor manufacturing process optimization in a variety of projects.
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`Specifically, I have served as Account GM and VP in various roles at PDF since
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`September 1998, with Foundries, Fabless, and IDM (Integrated Device
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`Manufacturers), to reduce their time to market, improve product yield and quality.
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`16.
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`I have been awarded several patents on my inventions relating to
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`semiconductor manufacturing process optimization. For example, I am a named
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`inventor on roughly twenty U.S. Patents, including:
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`
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`U.S. Patent No. 5,402,367 for “Apparatus and method for model
`based process control” issued March 28, 1995;
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`U.S. Patent No. 5,408,405 for “Multi-Variable Statistical Process
`Controller for Discrete Manufacturing” issued April 18, 1995;
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`U.S. Patent No. 5,546,312 for “Use of Spatial Models for
`Simultaneous Control of Various Non-Uniformity Metrics” issued
`August 13, 1996;
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`U.S. Patent No. 5,751,582 for “Controlling Process Modules Using
`Site Models and Monitor Wafer Control” issued May 12, 1998;
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`U.S. Patent No. 5,912,678 for “Process Flow Design at the Module
`Effects Level Through the Use of Acceptability Regions” issued June
`15, 1999;
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`U.S. Patent No. 6,311,096 for “Design of Microelectric Process Flows
`for Manufacturability and Performance” issued October 30, 2001;
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`U.S. Patent No. 6,317,640 for “System and Method for Non-
`Parametric Modeling of Processed Induced Variability” issued
`November 13, 2001;
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`U.S. Patent No. 6,438,439 for “Equipment Evaluation and Design”
`issued August 20, 2002; and,
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`U.S. Patent No. 6,901,564 for “System and Method for Product Yield
`Prediction” issued May 31, 2005.
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`17. As a result of my education, my experience at TI, including with the
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`MMST program in the 1990s, along with my experience at PDF beginning in 1998,
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`I believe I am qualified to offer expert opinions on the state of the art and level of
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`ordinary skill in the art as of the year 2003 in semiconductor manufacturing,
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`process optimization, and advanced process control (“APC”) frameworks. This
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`includes offering expert opinions on known problems in the art at that time and
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`how a person having ordinary skill in the art would have addressed such problems.
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`18.
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`I also believe I am qualified to offer expert opinions on how a person
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`of ordinary skill in the art would have interpreted relevant publications, patents,
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`and other technical documents as of 2003 and what would have been known,
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`understood, inherent, or obvious to such a person at that time.
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`II. MATERIALS REVIEWED AND CONSIDERED
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`19. My opinions expressed in this declaration are based on my years of
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`education, research, experience, and background in the field of semiconductor
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`manufacturing, processing tools and optimization thereof, and APC frameworks, as
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`well as my investigation and study of relevant materials for this declaration.
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`20. When developing the opinions set forth in this declaration, I assumed
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`the perspective of a person having ordinary skill in the art, as set forth below.
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`21.
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`In forming my opinions, I have studied and considered the ‘691
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`patent, the prosecution history of the ‘691 patent, and the materials cited in this
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`declaration, including those listed below. I have considered these materials in their
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`entirety, even if only portions are discussed herein.
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`Exhibit
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`Description
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`1001
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`1002
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`U.S. Patent No. 6,836,691
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`Prosecution History of U.S. Patent No. 6,836,691
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`
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`1005
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`1006
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`1007
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`1008
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`1009
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`1010
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`1011
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`1012
`
`
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`Decision Denying Institution of IPR2021-01348
`
`Bushman, S., et al., Integration of the APC Framework with AMD's
`Fab25 Factory System, Proc. SPIE 3882, Process, Equipment, and
`Materials Control in Integrated Circuit Manufacturing V (1999)
`(“Bushman”)
`
`Yelverton, M., et al., Factory-Wide Run-to-Run Process Control,
`Solid State Technology, Vol. 42, No. 12, p. 45 (1999) (“Yelverton”)
`
`Moyne J., & White, J., “Existing and Envisioned Control
`Environment for Semiconductor Manufacturing,” in Run-to-Run
`Control in Semiconductor Manufacturing, CRC Press (2001)
`(“Moyne”)
`
`Barna, G., “APC in the Semiconductor Industry, History and Near
`Term Prognosis,” IEEE/SEMI Advanced Semiconductor
`Manufacturing Conference (1996) (“Barna”)
`
`Alptekin S. E., “A suggested model program for CIM education.
`Industrial and Manufacturing Engineering,” May 21:8 (1990)
`(“Alptekin”)
`
`Cherrington, B. E., “An Integrated Approach to Graduate Education
`in Manufacturing Systems—The UT Dallas Model,” Journal of
`Engineering Education, Jan;82(1):43-7 (1993) (“Cherrington”)
`
`Kenneth W. Tobin Jr., Thomas P. Karnowski, Fred Lakhani,
`"Integrated applications of inspection data in the semiconductor
`manufacturing environment," Proc. SPIE 4275, Metrology-based
`Control for Micro-Manufacturing, (5 June 2001) (“Tobin”)
`
`III. MY UNDERSTANDING OF PATENT LAW
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`22.
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`I am not an attorney. In preparing and expressing my opinions and
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`considering the subject matter of the ‘691 patent, I am relying on certain legal
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`principles explained to me by counsel.
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`23.
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`I understand that this declaration is being made as part of an inter
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`partes review (IPR) of the ‘691 patent being requested by PDF. I understand that
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`an IPR is a proceeding before the United States Patent & Trademark Office for
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`evaluating the patentability of an issued patent’s claims based on prior art patents
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`and printed publications.
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`24.
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`I understand that, in this proceeding, PDF has the burden of proving
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`that the challenged claims of the ‘691 patent are unpatentable by a preponderance
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`of the evidence, which I understand means is more likely true than not.
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`A. Level of Ordinary Skill in the Art
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`25.
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`I understand that in analyzing patents, including questions of
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`invalidity, the perspective of a person having ordinary skill in the art (“POSA”) is
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`applied.
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`26.
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`I understand that a patent must be understood from the perspective of
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`a POSA. I have been informed that several factors may affect the level of skill of a
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`POSA, including: (1) the educational level of the inventor; (2) the types of
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`problems encountered in the art; (3) the prior art solutions to those problems; (4)
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`the speed at which innovations are made in the field; (5) the sophistication of the
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`technology; and (6) the educational level of active workers in the field. A POSA is
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`also a person of ordinary creativity in the art.
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`B. Claim Construction
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`27.
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`I understand that the words in patent claims should be interpreted
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`according to their “ordinary and customary meaning,” which is their plain meaning
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`as understood by a POSA in light of the structure of the claims, the specification,
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`and the file history. However, if the specification provides a special definition for a
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`claim term that differs from the meaning the term would otherwise possess, the
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`specification’s special definition controls. This is also true if a term is given a
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`special definition by the applicant in the prosecution history.
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`28.
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`I understand that treatises, dictionaries, and other "extrinsic" materials
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`may be used to aid in the definition of patent claim terms under limited
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`circumstances.
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`29.
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`I have abided by these rules in my analysis and considered all claim
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`terms discussed herein by adopting their plain and ordinary meaning.
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`C. Obviousness
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`30.
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`I understand that a claim is unpatentable if it is obvious.
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`31.
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`I have been informed by counsel that a claimed invention is
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`unpatentable as obvious if the differences between the subject matter claimed and
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`the prior art are such that the subject matter, as a whole, would have been obvious
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`to a POSA at the time the invention was made.
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`32.
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`I understand that an appropriate analysis for determining obviousness
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`of a claimed invention takes into account several underlying inquiries, including
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`the level of ordinary skill in the art, the scope and content of the prior art, and the
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`differences between the prior art and the claimed subject matter as a whole.
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`33.
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`I also understand that, if present, objective factors indicative of non-
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`obviousness, sometimes referred to as “secondary considerations,” may also be
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`considered in determining whether a patent claim is obvious. I am told that such
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`secondary considerations may include: (i) “long felt need” for the claimed
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`invention, (ii) commercial success attributable to the claimed invention, (iii)
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`unexpected results of the claimed invention, and (iv) “copying” of the claimed
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`invention by others.
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`34.
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`I am aware that obviousness determinations typically involve either a
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`combination of teachings from more than one reference or a modification to the
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`express teaching of a single reference.
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`35.
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`I have been informed by counsel that the United States Supreme Court
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`has recognized several rationales for combining references or modifying a
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`reference to show obviousness of claimed subject matter. Some of these rationales
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`include the following: (a) combining prior art elements according to known
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`methods to yield predictable results; (b) simple substitution of one known element
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`for another to obtain predictable results; (c) use of a known technique to improve a
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`similar device (method, or product) in the same way; (d) applying a known
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`technique to a known device (method, or product) ready for improvement to yield
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`predictable results; (e) choosing from a finite number of identified, predictable
`
`solutions, with a reasonable expectation of success; and (f) some teaching,
`
`suggestion, or motivation in the prior art that would have led a POSA to modify
`
`the prior art reference or to combine prior art reference teachings to arrive at the
`
`claimed invention.
`
`36.
`
`I have also been informed that a demonstration of obviousness does
`
`not require a physical combination or bodily incorporation, but rather may be
`
`found based on consideration of what the combined teachings would have
`
`suggested to a POSA at the time of the alleged invention.
`
`IV. THE ‘691 PATENT
`
`37. The ‘691 patent is entitled, “Method and Apparatus for Filtering
`
`Metrology Data Based on Collection Purpose Data.” It “relates generally to an
`
`industrial process, and, more particularly, to a method and apparatus for filtering
`
`metrology data based on collection purpose in a semiconductor device
`
`manufacturing environment.” Ex. 1001, 1:8-11.
`
`38. Specifically, the ‘691 patent is directed to, “a method for filtering
`
`metrology data [that] includes [(i)] collecting metrology data related to the
`
`processing of [w]orkpieces in a plurality of tools,” (ii) generating “context data for
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`the metrology data”, including “collection purpose data,” (iii) filtering the
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`
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`metrology data “based on the collection purpose data,” and (iv) conducting a
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`“process control activity related to one of the tools [] based on the filtered
`
`metrology data.” Ex 1001, 2:33-40. The ‘691 patent is also directed to, “a system
`
`including at least one metrology tool, a computer, and a process controller,” that
`
`performs the disclosed method. Ex. 1001, 2:41-51.
`
`39. The ‘691 patent has 20 claims, of which claims 1, 10, and 20 are
`
`independent. I have been asked to consider claims 1-19 of the ‘691 patent.
`
`40.
`
`Independent Claim 1 of the ‘691 patent recites:
`
`1. A method comprising:
`
`[1A]1 collecting metrology data related to the processing of workpieces in a
`plurality of tools;
`
`[1B] generating context data for the metrology data, the context data
`including collection purpose data;
`
`[1C] filtering the metrology data based on the collection purpose data; and
`
`[1D] conducting a process control activity related to one of the tools based
`on the filtered metrology data.
`
`Ex. 1001, 8:19-27.
`
`41.
`
`Independent Claim 10 of the ‘691 patent recites:
`
`10. A system, comprising:
`
`[10A] at least one metrology tool configured to collect metrology data
`related to the processing of workpieces in a plurality of tools;
`
`
`1 These bracketed reference numbers ([1A], [1B], …) have been added for
`convenience in referring to individual elements of the overall claim(s).
`
`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 17 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`
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`[10B] a computer configured to generate context data for the
`metrology data, the context data including collection purpose data;
`and
`
`[10C] a process controller configured to filter the metrology data
`based on the collection purpose data and conduct a process control
`activity related to one of the tools based on the filtered metrology
`data.
`
`Ex. 1001, 8:63 – 9:8.
`
`A. The AMAT IPR Petition
`
`42.
`
`I understand that Applied Materials, Inc. (“AMAT”) previously filed a
`
`Petition (“the AMAT Pet.”) requesting an inter partes review of claims 1–19 of the
`
`‘691 patent. Ex. 1005. I understand that the AMAT Pet. argued claims 1-19 of the
`
`‘691 patent were obvious in light of a combination of two references: (i) U.S. Pat.
`
`No. 7,123,980 B2, issued Oct. 17, 2006 (“Funk”) and (ii) U.S. Pat. No. 6,587,744
`
`B1, issued July 1, 2003 (“Stoddard”). Id.
`
`43.
`
`I further understand that the Patent Trial and Appeal Board (“the
`
`Board”) denied the AMAT Pet. because it found AMAT had failed to demonstrate
`
`that the combination of Funk and Stoddard taught “generating context data for the
`
`metrology data, the context data including collection purpose data,” which is a
`
`requirement of every claim of the ‘691 patent.
`
`44.
`
`I reviewed the Board’s decision denying institution of the AMAT Pet.
`
`and agree with the Board’s discussion of “The Challenged Patent”, “The
`
`Challenged Claims”, the “Level of Ordinary Skill in the Art”, and “Claim
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 18 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`
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`Construction.” Ex.1005, 4-9. I incorporate herein those portions of the Board’s
`
`denial of the AMAT Pet in their entirety as if they were my own statements.
`
`45.
`
`I have not reviewed the Funk or Stoddard references and have no
`
`opinion as to whether they taught “generating context data for the metrology data,
`
`the context data including collection purpose data.”
`
`46. However, I have reviewed two other references – (i) Scott Bushman,
`
`William Jarrett Campbell, and Michael L. Miller, “Integration of the APC
`
`framework with AMD’s Fab25 factory system,” Process, Equipment, and
`
`Materials Control in Integrated Circuit Manufacturing V., Vol. 3882. SPIE (1999)
`
`(“Bushman”) and (ii) Mark Yelverton, Kostas Tsakalis, and Kevin Stoddard,
`
`“Factory-wide run-to-run process control,” Solid State Technology 42.12 (1999):
`
`45, 49-52 (“Yelverton”) – that were not considered by the Board in its review of
`
`the AMAT Pet. or by the Patent Examiner who examined the ‘691 patent.
`
`47. As I explain below, based on my review of the ‘691 patent, the
`
`Bushman and Yelverton references, as well as my knowledge and experience in the
`
`field, it is my opinion that the combination of Bushman and Yelverton taught or
`
`suggested the “generating context data for the metrology data, the context data
`
`including collection purpose data” limitation, as well as all other limitations of the
`
`‘691 patent’s claims 1-19, to a person of skill in the art. Accordingly, I detail
`
`below my opinion that each of claims 1-19 of the ‘691 patent would have been
`
`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 19 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`
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`obvious in light of these references.
`
`B.
`
`Priority Date
`
`48. While I do not know the exact date that the alleged invention claimed
`
`in the ‘691 patent was made, I do know that the application that led to the ‘691
`
`patent was filed on May 1, 2003. Ex. 1001, Cover Page. I have adopted that date as
`
`the date of the alleged invention in my analysis herein, although the same analysis
`
`would hold true even if the date of the alleged invention occurred any time in the
`
`early 2000s.
`
`C.
`
`POSA
`
`49.
`
`I agree with the Board’s adoption in its denial of the AMAT Pet. that
`
`one of ordinary skill in the art at the time of the invention of the ‘691 patent would
`
`have at least a B.S. in mechanical engineering, electrical engineering, materials
`
`science engineering, or a related field, and four years of experience working with
`
`semiconductor manufacturing processes and measurement techniques. Ex. 1005.
`
`50. Additional education might substitute for some of the experience, and
`
`substantial experience might substitute for some of the educational background.
`
`51.
`
`I understand that a POSA is not a specific real individual, but rather a
`
`hypothetical individual having the qualities reflected by the factors discussed
`
`above.
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 20 of 61
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`D. The State of the Art
`
`52. By the mid-1980’s, the need for and use of tool-based sensors, data
`
`links, and computer-based control in semiconductor manufacturing was well
`
`known. Moyne J., & White, J., “Existing and Envisioned Control Environment for
`
`Semiconductor Manufacturing,” in Run-to-Run Control in Semiconductor
`
`Manufacturing, CRC Press (2001) (“Moyne”) (Ex. 1008).
`
`53. As described in Moyne:
`
`The industry as a whole has been pursuing the identification,
`specification, and standardization of control integration for
`semiconductor manufacturing along many fronts. The three major
`players in this arena are the Semiconductor Industry Association
`(SIA), Semiconductor Equipment and Materials International (SEMI),
`and Semiconductor Manufacturing TECHnology (SEMATECH). The
`SIA is an organization of leaders in the semiconductor manufacturing
`industry. Members of the SIA have been instrumental in the process
`or addressing the technology needs of the industry by establishing
`precompetitive partnerships and consortiums such as the
`Semiconductor Research Corp. (SRC) in 1982, SEMATECH in 1987,
`and the International 300-mm Initiative (I300I) in 1996.
`
`Moyne, Ex. 1008, 1.
`
`54. As described by Gabriel Barna’s 1996 article, “APC in the
`
`Semiconductor Industry, History and Near Term Prognosis,” IEEE/SEMI
`
`Advanced Semiconductor Manufacturing Conference (1996) (“Barna”) (Ex. 1009),
`
`by the mid-1990s, many different parties were developing APC frameworks for
`
`semiconductor processing tool control that included collection of metrology data.
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`Ex. 1009, 3.
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`PDF Solutions v Ocean Semiconductor, IPR2022-01196
`PDF Exhibit 1003, Page 21 of 61
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`DocuSign Envelope ID: 4A927A1B-B403-456B-A7B4-C734851BB634
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`55. The various parties included Texas Instruments, IBM, Intel, and
`
`Motorola. Ex. 1009, 3. Barna’s article recognizes what was widely known, that TI,
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`where I was employed
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