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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`ANKER INNOVATIONS LTD.,
`Petitioner
`
`v.
`
`MYPAQ HOLDINGS LTD.,
`Patent Owner
`
`Case IPR2022-01134
`Patent 8,477,514
`
`DECLARATION OF DR. SAYFE KIAEI
`
`Anker, EX1002, p. 1
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`

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`TABLE OF CONTENTS
`INTRODUCTION ....................................................................................... 5
`I.
`EXPERIENCE AND QUALIFICATIONS ................................................... 5
`II.
`III. LEGAL STANDARDS ...............................................................................10
`A. Anticipation ......................................................................................10
`B. Obviousness ......................................................................................11
`IV. LEVEL OF ORDINARY SKILL IN THE ART ..........................................14
`V. OVERVIEW OF THE ’514 PATENT .........................................................15
`Subject Matter of the ’514 Patent ......................................................16
`A.
`B.
`Prosecution History of the ’514 Patent ..............................................17
`VI. CLAIM CONSTRUCTION ........................................................................18
`VII. SUMMARY OF PRIOR ART .....................................................................19
`A. Chagny (EX1004) .............................................................................19
`B. Hwang (EX1006) ..............................................................................20
`VIII. SUMMARY OF PRIOR ART GROUNDS .................................................21
`IX. GROUND 1A: CHAGNY ANTICIPATES CLAIMS 1-12, 14-17, AND 19-
`20 OF THE ’514 PATENT..........................................................................22
`
`A. Claim 1 .............................................................................................22
`Claim 2 .............................................................................................31
`B.
`C.
`Claim 3 .............................................................................................34
`D. Claim 4 .............................................................................................36
`Claim 5 .............................................................................................37
`E.
`F.
`Claim 6 .............................................................................................37
`G. Claim 7 .............................................................................................41
`H. Claim 8 .............................................................................................42
`Claim 9 .............................................................................................42
`I.
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`Anker, EX1002, p. 2
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`Claim 10 ...........................................................................................43
`J.
`K. Claim 11 ...........................................................................................43
`Claim 12 ...........................................................................................52
`L.
`M. Claim 14 ...........................................................................................53
`N. Claim 15 ...........................................................................................53
`O. Claim 16 ...........................................................................................54
`Claim 17 ...........................................................................................55
`P.
`Q. Claim 19 ...........................................................................................56
`Claim 20 ...........................................................................................57
`R.
`X. GROUND 1B: CHAGNY IN VIEW OF THE KNOWLEDGE OF A
`POSITA RENDERS OBVIOUS CLAIMS 1-20.......................................... 57
`A. Claims 1-5 .........................................................................................57
`B.
`Claims 6-12 and 14-15 ......................................................................58
`C.
`Claims 11-12, 14-17, and 19-20 ........................................................60
`D.
`Claims 13 and 18 ..............................................................................61
`XI. GROUND 2A: HWANG ANTICIPATES CLAIMS 1-10, 16-17, AND 19-
`20 OF THE ’514 PATENT..........................................................................63
`A. Claim 1 .............................................................................................63
`Claim 2 .............................................................................................69
`B.
`C.
`Claim 3 .............................................................................................73
`D. Claim 4 .............................................................................................75
`Claim 5 .............................................................................................76
`E.
`F.
`Claim 6 .............................................................................................76
`G. Claim 7 .............................................................................................81
`H. Claim 8 .............................................................................................81
`Claim 9 .............................................................................................81
`I.
`J.
`Claim 10 ...........................................................................................82
`K. Claim 16 ...........................................................................................82
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`Anker, EX1002, p. 3
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`Claim 17 ...........................................................................................88
`L.
`M. Claim 19 ...........................................................................................90
`N. Claim 20 ...........................................................................................90
`XII. GROUND 2B: HWANG IN VIEW OF CHAGNY RENDERS OBVIOUS
`CLAIMS 11-12, 14-17, AND 19-20 ............................................................90
`A. Motivation to Combine .....................................................................90
`Claim 11 ...........................................................................................93
`B.
`C.
`Claim 12 ......................................................................................... 101
`D. Claim 14 ......................................................................................... 102
`Claim 15 ......................................................................................... 102
`E.
`F.
`Claims 16-17 and 19-20 .................................................................. 103
`XIII. GROUND 2C: HWANG IN VIEW OF THE KNOWLEDGE OF A
`POSITA RENDERS OBVIOUS CLAIM 18 ............................................. 104
`A. Claim 18 ......................................................................................... 104
`XIV. GROUND 2D: HWANG IN VIEW OF CHAGNY AND THE
`KNOWLEDGE OF A POSITA RENDERS OBVIOUS CLAIMS 13 AND
`18 .............................................................................................................. 106
`A. Claims 13 and 18 ............................................................................ 106
`XV. CONCLUSION ......................................................................................... 107
`
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`Anker, EX1002, p. 4
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`
`I.
`
`INTRODUCTION
`
`1.
`
`I have been retained by Anker Innovations Ltd. (“Anker” or
`
`“Petitioner”) as an independent expert consultant in this proceeding before the
`
`United States Patent and Trademark Office (“PTO”). I submitted a substantially
`
`identical declaration at the request of Samsung/Dell in IPR2022-00311.
`
`2. My compensation is in no way contingent on the nature of my
`
`findings, the presentation of my findings in testimony, or the outcome of this or
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`any other proceeding. I have no other interest in this proceeding.
`
`3.
`
`I have been asked to consider whether certain references disclose or
`
`suggest the features recited in the claims of U.S. Patent No. EX1001 –
`
`US8477514B2 (“the ’514 patent”) (EX1001).1 My opinions are set forth below.
`
`II. EXPERIENCE AND QUALIFICATIONS
`
`4.
`
`I am a professor at Arizona State university and am an independent
`
`consultant for this IPR. All of my opinions stated in this declaration are based on
`
`my own personal knowledge and professional judgment.
`
`5.
`
`In forming my opinions, I have relied on my education, experience,
`
`and knowledge regarding electrical engineering, computer science, and consumer
`
`electronics product design. A copy of my current curriculum vitae, which details
`
`1 Where appropriate, I refer to exhibits I understand will be attached to the petition
`for inter partes review of the ’514 patent (the “Petition”).
`
`5
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`Anker, EX1002, p. 5
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`my education and professional and academic experience, is included as Appendix
`
`A to this declaration.
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`6.
`
`I am over 18 years of age and, if I am called upon to do so, I would be
`
`competent to testify as to the matters set forth herein.
`
`7.
`
`The following provides an overview of some of my experience that is
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`relevant to the matters set forth in this declaration.
`
`8.
`
`I received my Ph.D. in Electrical and Computer Engineering from
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`Washington State University in 1987. I have several patents and over 100 journal
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`and international conference publications. I have graduated over 70 MS and PhD
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`students working under my supervision on their thesis, and many of them are
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`professors in academia or have senior positions in industry. My research is funded
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`by various sources, including industry and federal agencies, such as NSF, USAID,
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`DARPA, JPL, and NASA.
`
`9.
`
`Since 2001, I have held the position of Motorola Endowed Chair
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`Professor in Analog and Radio Frequency Integrated Circuitry at the School of
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`Electrical, Computer, and Energy Engineering at Arizona State University
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`(“Arizona State”) in Tempe, Arizona.
`
`10.
`
`I am also the Director of the National Science Foundation Center,
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`Connection One. Connection One is a research center focused on developing
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`wireless communication system and networking technologies.
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`6
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`Anker, EX1002, p. 6
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`11. From 1987 to 1993, I was an assistant/associate professor at Oregon
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`State University (“Oregon State”).
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`12. From 1997 to 2002, I was also an adjunct professor at the University
`
`of Texas (“UT”) at Austin, while I worked full time at Motorola in Austin.
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`13. At Oregon State, UT, and Arizona State, I taught courses in the areas
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`of analog and digital
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`integrated circuits, power management circuits,
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`communication systems; radio frequency (“RF”) systems and circuits; radio-
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`frequency identification (“RFID”); magnetic and electronic sensors; analog
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`circuits; digital integrated circuits, including HDL, Verilog, and VHDL; digital
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`signal processing; and related areas.
`
`14. At Arizona State, I developed a new course content and labs on
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`analog integrated circuit, power management, and RF systems.
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`15.
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`I have been involved in research, teaching, and developing products in
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`the areas of analog and digital circuits, linear and switching power management
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`integrated circuits (PMIC), sensors, electronics, communications, and related areas
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`for the last 30 years.
`
`16.
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`I have worked in industry and academia on the systems and circuits
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`for portable systems, including linear and switching PMIC, analog circuits and
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`RFIC. The analog, RF and power management circuits were integrated in the
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`mobile Bluetooth, the Global Positioning System (GPS), RFID, magnetic and
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`electronic sensors, wireless local area networks (LAN) (or WiFi), and related
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`areas.
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`17. From 1993 to 2001, I worked at Motorola Wireless Integrated
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`Technology Center and Motorola Analog/Digital Design groups. This group was
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`responsible for the design and development of analog, digital, Power Management
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`IC, DC-DC power converter, RFIC, Analog and digital baseband IC and circuits.
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`18. During my work in industry, I have designed and contributed to the
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`design of many analog, RF, and power management IC’s for radio transceivers for
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`commercial products, including designs for radio transceiver integrated circuits.
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`Many of my designs are still in use today in products manufactured by the
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`companies I have worked for, including Motorola, Intel, and Sony.
`
`19.
`
`I have over 200 journal and conference publications, 9 patents (and
`
`applications), and standards contributions. Several of
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`these patents and
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`publications are in the areas of power management, switching DC-DC converters,
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`linear regulators, and related areas. The list of my publications is included in my
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`resume.
`
`20.
`
`I am an active member of IEEE Circuits and system power
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`management technical program committee and have served in that group for over
`
`15 years. I am an IEEE Fellow, which is the highest level of IEEE membership
`
`awarded by the IEEE directors to recognize a high level of demonstrated
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`
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`Anker, EX1002, p. 8
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`extraordinary accomplishments. The IEEE Fellow Award is a special recognition
`
`for members with extraordinary accomplishments in the IEEE technical fields. To
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`ensure that the recognition is extraordinary, the total number of recipients each
`
`year cannot exceed 0.1% of the total higher grade membership. The IEEE is the
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`Institute of Electrical and Electronics Engineers, the world’s largest association of
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`technical professionals whose objectives include the educational and technical
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`advancement of electrical and electronic engineering,
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`telecommunications,
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`computer engineering, and related disciplines.
`
`21.
`
`I am a member of the IEEE Circuits and Systems Society, IEEE Solid
`
`State Circuits Society, IEEE Signal Processing Society, and IEEE Communication
`
`Society. I am also a member of the IEEE RF and Microwave committees, IEEE
`
`Low Power Symposium Committee, and IEEE Fellow Selection Committee. I was
`
`one of the key organizers establishing the IEEE Radio Frequency Integrated
`
`Circuits (RFIC) symposium in 1995, and I have been on the executive and
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`technical committees of RFIC for the last 16 years. The RFIC Symposium is now
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`the premier international symposium in the world where the latest RF circuits and
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`components are presented. I have been involved in several international
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`conferences in the areas of RF, Communication, Signal Processing, and IC design.
`
`22.
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`I have received several awards including the Carter Best Teacher
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`Award, the IEEE Darlington Award (which is given for the best technical paper on
`
`
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`9
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`Anker, EX1002, p. 9
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`circuits and systems in the IEEE Circuits and Systems Society), and the Motorola
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`10X Rapid Design Cycle Reduction Award.
`
`23. My analyses set forth in this declaration are informed by my
`
`experience in the field of electrical engineering, including. Based on my above-
`
`described experience, I am an expert in the field relevant to the ’514 Patent at issue
`
`here and have been an expert in the relevant field since before the claimed priority
`
`date of the ’514 Patent. I am familiar with how a person having ordinary skill in
`
`the art (“POSITA”) would have understood and used the terminology found in the
`
`’514 Patent before and at the time of its filing.
`
`III. LEGAL STANDARDS
`
`24. My opinions are also informed by my understanding of the relevant
`
`law. I understand that the patentability analysis is conducted on a claim-by-claim
`
`and element-by-element basis, and that there are several possible reasons that a
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`patent claim may be found to be unpatentable.
`
`25.
`
`I understand that earlier publications and patents may act to render a
`
`patent unpatentable for one of two reasons: (1) anticipation and (2) obviousness.
`
`A. Anticipation
`
`26.
`
`It is my understanding that the claims of a patent are anticipated by a
`
`prior art reference if each and every element of the claim is found either explicitly
`
`or inherently in a single prior art reference or system. I understand that inherency
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`10
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`Anker, EX1002, p. 10
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`requires a showing that the missing descriptive matter in the claim is necessarily or
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`implicitly present in the allegedly anticipating reference, and that it would have
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`been so recognized by a person of ordinary skill in the art (“POSITA”). In
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`addition, I understand that an enabling disclosure is a disclosure that allows a
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`POSITA to make the invention without undue experimentation. Although
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`anticipation typically involves the analysis of a single prior art reference, I
`
`understand that additional references may be used to show that the primary
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`reference has enabling disclosure, to explain the meaning of a term used in the
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`primary reference, and/or to show that a characteristic is inherent in the primary
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`reference.
`
`B. Obviousness
`
`27.
`
`I understand that the prior art may render a patent claim “obvious.” I
`
`understand that two or more prior art references (e.g., prior art articles, patents, or
`
`publications) that each disclose fewer than all elements of a patent claim may
`
`nevertheless be combined to render a patent claim obvious if the combination of
`
`the prior art collectively discloses all elements of the claim and one of ordinary
`
`skill in the art at the time would have been motivated to combine the prior art in
`
`such a way. I understand that this motivation to combine need not be explicit in
`
`any of the prior art, but may be inferred from the knowledge of one of ordinary
`
`skill in the art at the time the patent was filed. I also understand that one of
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`11
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`ordinary skill in the art is not an automaton, but is a person having ordinary
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`creativity. I further understand that one or more prior art references, articles,
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`patents or publications that disclose fewer than all of the elements of a patent claim
`
`may render a patent claim obvious if including the missing element would have
`
`been obvious to one of skill in the art (e.g., the missing element represents only an
`
`insubstantial difference over the prior art or a reconfiguration of a known system).
`
`28. Under the doctrine of obviousness, a claim may be invalid if the
`
`differences between the invention and the prior art are such that the subject matter
`
`as a whole would have been obvious at the time the invention was made to a
`
`POSITA to which the subject matter pertains.
`
`29. To assess obviousness, I understand that I am to consider the scope
`
`and content of the prior art, the differences between the prior art and the claim, the
`
`level of ordinary skill in the art, and any secondary considerations to the extent
`
`they exist.
`
`30.
`
`I understand that any evidence of secondary indicia of non-
`
`obviousness should be considered when evaluating whether a claimed invention
`
`would have been obvious to one of ordinary skill at the time of invention. These
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`secondary indicia of non-obviousness may include, for example:
`
`•
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`a long felt but unmet need in the prior art that was satisfied by the
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`claimed invention;
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`12
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`•
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`•
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`•
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`commercial success of processes claimed by the patent;
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`unexpected results achieved by the invention;
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`praise of the invention by others skilled in the art;
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`• the taking of licenses under the patent by others; and
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`• deliberate copying of the invention.
`
`31.
`
`I understand that there must be a nexus between any such secondary
`
`indicia and the claimed invention.
`
`32.
`
`It is also my understanding that there are additional considerations
`
`that may be used as further guidance as to when the above factors will result in a
`
`finding that a claim is obvious, including the following:
`
`•
`
`•
`
`•
`
`•
`
`•
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`the claimed subject matter is simply a combination of prior art
`elements according to known methods to yield predictable results;
`
`the claimed subject matter is a simple substitution of one known
`element for another to obtain predictable results;
`
`the claimed subject matter uses known techniques to improve similar
`devices or methods in the same way;
`
`the claimed subject matter applies a known technique to a known
`device or method that is ready for improvement to yield predictable
`results;
`
`the claimed subject matter would have been “obvious to try” choosing
`from a finite number of identified, predictable solutions, with a
`reasonable expectation of success;
`
`13
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`Anker, EX1002, p. 13
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`•
`
`•
`
`•
`
`there is known work in one field of endeavor that may prompt
`variations of it for use in either the same field or a different one based
`on design incentives or other market forces if the variations would
`have been predictable to a POSITA;
`
`there existed at the time of conception and reduction to practice a
`known problem for which there was an obvious solution encompassed
`by the patent’s claims; and
`
`there is some teaching, suggestion, or motivation in the prior art that
`would have led a POSITA to modify the prior art reference or to
`combine prior art reference teachings to arrive at the claimed subject
`matter.
`
`33. Finally, I understand that a claim may be deemed invalid for obviousness
`
`in light of a single prior art reference, without the need to combine references, if the
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`elements of the claim that are not found in the reference can be supplied by the
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`knowledge or common sense of one of ordinary skill in the relevant art.
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`IV. LEVEL OF ORDINARY SKILL IN THE ART
`
`34.
`
`I am informed and understand that the person having ordinary skill in
`
`the art (“POSITA”) is a hypothetical person who is presumed to know the relevant
`
`prior art. I understand that the actual inventor’s skill is not determinative of the
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`level of ordinary skill. I further understand that factors that may be considered in
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`determining level of skill include: (i) type of problems encountered in art; (ii) prior
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`art solutions to those problems; (iii) rapidity with which innovations are made; (iv)
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`14
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`Anker, EX1002, p. 14
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`sophistication of the technology; and (v) educational level of active workers in the
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`field. I understand that not all such factors may be present in every case, and one
`
`or more of them may predominate. In a given case, every factor may not be
`
`present, and one or more factors may predominate.
`
`35.
`
`In my opinion, a POSITA at the time of invention of the ʼ514 Patent
`
`would have either (i) a Masters of Science in Electrical Engineering, or an
`
`equivalent field, or (ii) a Bachelor of Science in Electrical Engineering or an
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`equivalent field as well as at least two years of experience in the design of power
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`electronics.
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`36. Around the time of invention, I was familiar with this level of skill
`
`because I managed engineers at Motorola, and graduate students at ASU, working
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`in this area including those with this level of skill.
`
`V. OVERVIEW OF THE ’514 PATENT
`
`37.
`
`I have reviewed the ’514 Patent, which is entitled “Power System with
`
`Power Converters Having an Adaptive Controller.” EX1001. I understand that
`
`this patent was filed on February 22, 2010 and issued on July 2, 2013. Id. I also
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`understand that this patent claims priority through a chain of continuation
`
`applications and continuation-in-part applications to Application No. 11/607,325
`
`filed on December 1, 2006.
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`
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`A.
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`Subject Matter of the ’514 Patent
`
`38. The ’514 Patent involves a switch-mode power converter, referred to
`
`as a “power converter,” which may convert an input voltage into an output voltage.
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`EX1001, 2:42-45. Figure 2 illustrates an example “buck” power converter that
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`converts a DC input voltage to a DC output voltage:
`
`EX1001, Fig. 2. The main power switch Qmain and auxiliary power switch Qaux are
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`turned on and off by drive signal D and complementary drive signal 1-D
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`respectively. Id., 10:56-11:6. When Qmain is turned on, Qaux is turned off, and vice
`
`versa. As known in the art, and explained in the ’514 Patent background, the duty
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`cycle of the switches (i.e., ratio of on-time to the total switching period) in a power
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`converter can be adjusted to regulate the output voltage Vout of the power
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`converter. Id., 2:57-3:9, 11:15-18. The “buck” converter, also known as step
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`down converter, is a well-known power converter, which produces a lower DC
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`output voltage than the input DC voltage, EX1009 (Mohan), 19 (Section 7-3,
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`p.164).
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`39. The ’514 Patent purports to improve power converters by using an
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`“adaptive controller.” EX1001, Abstract. The ’514 Patent acknowledges that it
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`was “well known” to control output characteristics (e.g., the output voltage) of a
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`converter based on the needs of a microprocessor coupled to the output. Id., 4:63-
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`5:4. But, the ’514 Patent purports to improve upon the prior art by adjusting an
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`internal operating characteristic of the power converter based on a signal from an
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`external source. Id., 6:36-44. For example, when a load such as a microprocessor
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`goes into a low-power system operational state (e.g., a standby mode), the
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`microprocessor may signal the power converter to adjust its internal operating
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`characteristics (e.g., switching frequency) to improve the efficiency of the power
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`converter during such times of low demand from the load.
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`40. However, as I describe in this declaration, power converters capable
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`of adjusting internal operating characteristics (e.g., switching frequency) to
`
`improve efficiency based on the state of the load were well known prior to the ’514
`
`Patent.
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`B.
`
`41.
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`Prosecution History of the ’514 Patent
`
`I have reviewed the prosecution history of the ’514 Patent. I
`
`understand that U.S. Patent Application No. 12/709,795 was filed on February 22,
`
`2010, and later issued as the ’514 Patent. I understand that the ’514 Patent claims
`
`17
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`Anker, EX1002, p. 17
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`priority through a series of continuation and continuation-in-part applications to
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`Application No. 11/607,325 filed on December 1, 2006. See EX1001.
`
`42.
`
`I understand than in an Office Action dated March 18, 2011, the
`
`Examiner rejected all pending claims based on various anticipation and
`
`obviousness grounds. EX1003, 83-90. In response, Applicant distinguished the
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`prior art asserted by the Examiner for failure to disclose a power converter
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`controller “configured to be responsive to an externally generated signal from the
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`power converter.” Id., 76. Thereafter, the Examiner issued a Notice of Allowance.
`
`However, I understand that the Examiner did not consider the prior art that I
`
`analyze in this declaration. See EX1001 (listing references before the Examiner).
`
`VI. CLAIM CONSTRUCTION
`
`43.
`
`I understand that “claim construction” is the process of determining a
`
`patent claim’s meaning. I also understand that, during an inter partes review, a
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`claim construction analysis begins with the plain meaning of the claim term, which
`
`is the ordinary and customary meaning given to the term by those of ordinary skill
`
`in the art at the time of the invention. I also understand that the claims of a patent
`
`must be interpreted in light of the specification—that is, the claim language itself,
`
`the written description, and the figures in the patent—as well as the patent’s
`
`prosecution history and/or any reexamination history.
`
`44.
`
`In my opinion, and for the purposes of this declaration, the claim
`
`18
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`terms of the ’514 Patent do not require a construction. For purposes of this
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`declaration, I interpret all claim terms in accordance with their ordinary and
`
`customary meaning, as would have been understood by a person of ordinary skill
`
`in the art (“POSITA”) at the time of the alleged invention, having taken into
`
`consideration the language of the claims, the specification, and the prosecution
`
`history of record.
`
`VII. SUMMARY OF PRIOR ART
`
`45. As I note below, the prior art relied upon herein predates the
`
`purported December 1, 2006 priority date claimed by the ’514 Patent. Thus, the
`
`prior art relied upon herein is prior art to the ’514 Patent regardless of whether the
`
`claims of the ’514 Patent are entitled to the December 1, 2006 priority date.
`
`A. Chagny (EX1004)
`
`46. Chagny (U.S. Patent 6,873,136) issued on March 29, 2005. EX1004.
`
`The ’514 Patent was filed on February 22, 2010 and claims priority to December 1,
`
`2006. Chagny thus predates the ’514 Patent by over a year.
`
`47. Chagny discloses a voltage regulator module (VRM) 200 (i.e., a
`
`power converter) that provides a “regulated DC voltage output 295” to processor
`
`292. EX1004, 3:52-58.
`
`19
`
`Anker, EX1002, p. 19
`
`
`
`
`
`
`
`
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`

`

`
`
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`
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`EX1004, Fig. 2A. Changny’s controller module 210 receives an activity input 202
`
`indicative of the processor’s activity level (id., 3:60-65), and thereby changes the
`
`switching frequency of VRM 200 accordingly (id., 5:9-12). By selecting a low
`
`switching frequency during periods of low processor activity, the efficiency of
`
`VRM 200 is improved. Id., 5:20-23.
`
`B. Hwang (EX1006)
`
`48. Hwang (U.S. Patent Application Publication 2004/0174152) published
`
`on September 9, 2004. EX1006. The ’514 Patent was filed on February 22, 2010
`
`and claims priority to December 1, 2006. Hwang thus predates the ’514 Patent by
`
`over 2 years.
`
`49. Hwang discloses a power converter 100 coupled to a smart load 104
`
`20
`
`Anker, EX1002, p. 20
`
`

`

`
`
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`
`
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`
`
`
`
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`
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`(e.g., a microprocessor). EX1006, [0019], [0021].
`
`EX1006, Fig. 1. Hwang discloses that smart load 104 sends a standby signal to the
`
`controller 105 within power converter 100 indicating the level of power drawn by
`
`load 104 and thereby causing “PWM stage 103 to enter pulse-skipping mode” (id.,
`
`[0021]) in order to “improve efficiency” (id., Abstract).
`
`VIII. SUMMARY OF PRIOR ART GROUNDS
`
`50. A summary of the invalidity grounds considered herein is below.
`
`Ground
`
`Claims
`
`Basis
`
`Prior Art
`
`1A
`
`1B
`
`2A
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`1-12, 14-17, 19-20
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`Anticipation
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`1-20
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`Obviousness
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`1-10, 16-17, 19-20
`
`Anticipation
`
`Chagny
`
`Chagny
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`Hwang
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`21
`
`Anker, EX1002, p. 21
`
`

`

`2B
`
`2C
`
`2D
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`11-12, 14-17, 19-20
`
`Obviousness
`
`Hwang, Chagny
`
`18
`
`13, 18
`
`Obviousness
`
`Obviousness
`
`Hwang
`
`Hwang, Chagny
`
`IX. GROUND 1A: CHAGNY ANTICIPATES CLAIMS 1-12, 14-17, AND
`19-20 OF THE ’514 PATENT
`
`51.
`
`In my opinion, Chagny discloses each element of Claims 1-12, 14-17,
`
`and 19-20, and thus anticipates those claims.
`
`A. Claim 1
`
`i.
`
`1[pre]: “A power converter coupled to a load, comprising:”
`
`52. Chagny discloses a voltage regulator module (“VRM”) (i.e., a power
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`converter). “The VRM 200,” shown in Figure 2A, “is operable to receive a direct
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`current (DC) voltage input 205 and generate a regulated DC voltage output 295.”
`
`EX1004, 3:54-56.
`
`22
`
`Anker, EX1002, p. 22
`
`
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`

`

`
`
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`
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`software program
`
`processor
`
`power
`converter
`
`
`
`EX1004, Fig. 2A (annotated). As shown in Figure 2A, the output of VRM 200 is
`
`coupled to provide power to a load including processor 292 and software program
`
`296. EX1004,3:56-60 (“[T]he regulated DC voltage output 295 provides power to
`
`a processor 292 included in an information handling system device 290. The
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`output 295 may also be used to power other components (not shown) included in
`
`the device 290.”); see also id., 4:35-37 (referring to software program 296 being
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`“included in the operating system (not shown) of the device 290”), 7:36-41
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`(describing processor “operable
`
`to execute
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`instructions and/or operations”
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`including a “software program” stored in memory).
`
`53. Thus, in my opinion, Chagny discloses claim 1[pre].
`
`23
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`Anker, EX1002, p. 23
`
`

`

`i.
`
`1[a]: “a power switch configured to conduct for a duty cycle
`to provide an output characteristic at an output thereof; and”
`
`54. The switches 220 and 230, inductance L 242, and capacitor C 244, are
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`configured in what is known as a “buck” power-converter topology. See EX1004
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`(Chagny), 1:51-59 (describing “buck” DC-DC converter); see also EX1001 (’514
`
`Patent), Fig. 2, 10:56-11:19 (describing similar configuration in Figure 2 as a
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`“buck” power converter). Chagny’s charge switch 220 serves as a “power switch”
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`configured to conduct for a duty cycle to provide an output as recited in claim 1[a].
`
`55.
`
`I note that Chagny’s switches 220 and 230 as shown in Fig. 2A are
`
`similarly configured to alternate between opposing on and off states, similar

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