`
`a2) United States Patent
`US 8,477,514 B2
`(0) Patent No.:
`*Jul. 2, 2013
`(45) Date of Patent:
`Artusi et al.
`
`(54)
`
`(75)
`
`POWERSYSTEM WITH POWER
`CONVERTERS HAVING AN ADAPTIVE
`CONTROLLER
`
`Inventors: Daniel A. Artusi, Austin, TX (US); Ross
`Fosler, Buda, TX (US); Allen F.
`Rozman, Murphy, TX (US)
`
`(73)
`
`Assignee: Flextronics International USA,Inc.,
`San Jose, CA (US)
`
`(*)
`
`Notice:
`
`Subject to any disclaimer, the term ofthis
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`This patent is subject to a terminal dis-
`claimer.
`
`(21)
`
`Appl. No.: 12/709,795
`
`(22)
`
`Filed:
`
`Feb. 22, 2010
`
`(65)
`
`(63)
`
`(51)
`
`(52)
`
`Prior Publication Data
`
`US 2010/0149838 Al
`
`Jun. 17, 2010
`
`Related U.S. Application Data
`
`Continuation of application No. 12/051,334, filed on
`Mar. 19, 2008, now Pat. No. 7,667,986, which is a
`continuation-in-part of application No. 11/710,276,
`filed on Feb. 23, 2007, now Pat. No. 7,675,759, which
`is
`a
` continuation-in-part
`of
`application No.
`11/607,325, filed on Dec. 1, 2006, now Pat. No.
`7,675,758.
`
`Int. Cl.
`
`H02M 3/335
`U.S. CL.
`USPC cieeecceeccceecccenteeseeeeceeceeseceeeeeceeaeensaes 363/21.01
`
`(2006.01)
`
`(58) Field of Classification Search
`USPC ween 363/21.01, 35, 37, 40, 41, 47, 48,
`363/95, 97, 98, 131, 132
`See application file for complete search history.
`
`(56)
`
`References Cited
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`U.S. PATENT DOCUMENTS
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`FOREIGN PATENT DOCUMENTS
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`OTHER PUBLICATIONS
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`Ajram,S., et al., “Ultrahigh Frequency DC-to-DC Converters Using
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`
`(Continued)
`
`Primary Examiner — Adolf Berhane
`Assistant Examiner — Yemane Mehari
`
`(74) Attorney, Agent, or Firm — Boisbrun Hofman, PLLC
`
`ABSTRACT
`(57)
`A power system having a power converter with an adaptive
`controller. In one embodiment, a power converter coupled to
`a load includes a power switch configured to conduct for a
`duty cycle to provide an output characteristic at an output
`thereof. The powerconverter also includes a power converter
`controller configured to receive a signal from the load indi-
`cating a system operational state of the load and enable a
`powerconverter topological state as a function ofthe signal.
`
`20 Claims, 12 Drawing Sheets
`
`Vin
`
`Vous
`
`att
`
`NnOo
`
`CONTROLLER
`
`Anker, EX1001, p. 1
`
`Anker, EX1001, p. 1
`
`
`
`US 8,477,514 B2
`
`Page 2
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`* cited by examiner
`
`Anker, EX1001, p. 5
`
`Anker, EX1001, p. 5
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 1 of 12
`
`US 8,477,514 B2
`
`
`
`FIG.1
`(PRIOR ART)
`
`Vout
`
`Cout
`
`FIG. 2
`(PRIOR ART)
`
`Anker, EX1001, p. 6
`
`Anker, EX1001, p. 6
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 2 of 12
`
`US 8,477,514 B2
`
`‘1
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`lo
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`_o
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`Anker, EX1001, p. 7
`
`Anker, EX1001, p. 7
`
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 3 of 12
`
`US 8,477,514 B2
`
`Very
`
`|
`_
`
`ar
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`FIG. 4
`
`TIME —>
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`<30C
`
`LOAD CURRENT, A——>
`10
`20
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`40
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`leTe[s[as]e
`Ta[=slo
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`V.,<48V >30C
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`TEMPERATURE
`
`FIG. 5A
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`LOAD CURRENT, A———>
`10
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`V,, > 48V
`i
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`= >30C| 26|28.5|3222 24
`pul
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`FIG. 5B
`
`PConstate
`
`load
`
`TEMPERATURE
`V
`setup
`
`380 + 0.1 Ioad” 0.2° Temp
`.
`* Vesatup 10° Vent
`
`Vext
`
`V
`bus_setpoint
`P
`
`FIG. 6
`
`Anker, EX1001, p. 8
`
`Anker, EX1001, p. 8
`
`
`
`U.S. Patent
`
`Sheet 4 of 12
`
`Jul. 2, 2013
`
`US 8,477,514 B2
`
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`Anker, EX1001, p. 9
`
`Anker, EX1001, p. 9
`
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 5 of 12
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`-,ALOWSY
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`ted}/120A|INVIS140$AzlJTavNa
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`OPAGI+|AGGNVLSOPASI+ ASANVLS
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`Anker, EX1001, p. 10
`
`Anker, EX1001, p. 10
`
`
`
`
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 6 of 12
`
`US 8,477,514 B2
`
`POWER FACTOR CORRECTION EFFICIENCY
`
`INCREASING
`Vin
`
`To
`ee
`mn
`
`EFFICIENCY
`
`OUTPUT POWER
`
`FIG. 9A
`
`DC/DC EFFICIENCY
`
`— a
`
`sl
`an
`
`INCREASING
`Vbus
`
`EFFICIENCY
`
`
`
`OUTPUT POWER
`
`FIG. 9B
`
`POWER FACTOR CORRECTION
`EFFICIENCY AT 1 LINE VOLTAGE
`
`EFFICIENCY
`
`
`INCREASING
`
`OUTPUT POWER
`
`
`
`SWITCHING FREQUENCY
`
`FIG. 9C
`
`Anker, EX1001, p. 11
`
`Anker, EX1001, p. 11
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 7 of 12
`
`US 8,477,514 B2
`
`DC/DC EFFICIENCY
`AT 1 BUS VOLTAGE
`
`“_
`
`EFFICIENCY
`
`INCREASING
`OUTPUT POWER
`
`
`
`SWITCHING FREQUENCY
`
`FIG. 9D
`
`TOTAL CONVERTER
`
`EFFICIENCY VS. BUS VOLTAGE
`
` EFFICIENCY fo
`
`
`INCREASING
`
`BUS VOLTAGE
`
`
`
`OUTPUT POWER
`
`FIG. 9E
`
`TOTAL CONVERTER EFFICIENCYVS. BRIDGE
`TO SYNCHRONOUS RECTIFIER TIMING DELAY
`
`4
`EFFICIENCY|( oo
`
`OUTPUT POWER
`
`TIMING DELAY
`
`FIG. 9F
`
`Anker, EX1001, p. 12
`
`Anker, EX1001, p. 12
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 8 of 12
`
`US 8,477,514 B2
`
`S\y LINE VOLTAGE
`BUS VOLTAGE 1
`
`— - - — BUS VOLTAGE 2
`
`— — — — BUS VOLTAGE3
`
`1003
`
`
`
`VOLTAGE
`
`1002
`
`
`
`TIME
`
`FIG. 10
`
` SVRBUS_n
`
`-——=
`
`POWER SYSTEM
`CONTROLLER
`
`O
`
`O
`
`BUS_env
`
`BUS_test
`
`FIG. 11
`
`Anker, EX1001, p. 13
`
`Anker, EX1001, p. 13
`
`
`
`YFINGSHOS
`
`
`
`
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 9 of 12
`
`US 8,477,514 B2
`
`INSWASVNVWYSMOdF1dI-SALVLS-9IdOV
`
`41dl
`
`41d!
`
`SALVLS
`
`clOIA
`
`Anker, EX1001, p. 14
`
`Anker, EX1001, p. 14
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 10 of 12
`
`US 8,477,514 B2
`
`15 ms
`
`
`
`
`0a,PCop_state5
`
`
`
`PCop_state
`
`5 ms
`
`PCop_state2
`
`(é
`15 ms
`
`PCop_state1— PCop_state3
`
`
`
`5ms
`
`15 ms
`
`
`
`PCop_state4
`
`FIG. 13
`
`Anker, EX1001, p. 15
`
`Anker, EX1001, p. 15
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 11 of 12
`
`US 8,477,514 B2
`
`% EFFICIENCY
`
`PoissV
`
`95.00
`
`90.00
`
`85.00
`
`80.00
`
`m
`
`70.00
`
`65.00
`
`60.00
`
`80.00
`
`70.00
`
`60.00
`
`50.00
`
`“
`30.00
`20.00
`
`10.00
`
`LIGHT LOAD EFFICIENCY (SINGLE SUPPLY)
`
`POopstate 0
`Poopstate 2
`2
`op_state 3
`7 F Copstate 4
`~~ To Copstate 5
`
`0
`
`10
`
`20
`
`30
`
`40
`
`50
`
`60
`
`% LOAD
`
`POWERDISSIPATION (SINGLESUPPLY)
`
`FIG. 15
`
`FIG. 14
`
`
`PC
`
`te 2
`
`PConstate 0
`ae e
`————— “opstate 3
`—~ POonstate 4
`Poonstate 5
`
`0
`
`10
`
`20
`
`30
`
`40
`
`50
`
`60
`
`% LOAD
`
`Anker, EX1001, p. 16
`
`Anker, EX1001, p. 16
`
`
`
`U.S. Patent
`
`Jul. 2, 2013
`
`Sheet 12 of 12
`
`US 8,477,514 B2
`
`FIG. 16
`
`su
`PCystate 2
`PCopstate 3
`~ PCopstate 4
`_--— PCopstate 5
`
`10
`
`20
`
`40
`
`0
`
`»
`
`i
`
`% LOAD
`
`POWERSYSTEM DISSIPATION(1 + 1 REDUNDANT) FIG. 17
`
`;
`
`0
`
`90.00
`
`85.00
`
`80.00
`
`75.00
`
`70.00
`
`% EFFICIENCY 65.00
`stn
`a
`
`45.00
`
`40.00
`
`80.00
`
`70.00
`
`60.00
`
`50.00
`
`|
`
`i
`
`10.00
`
`LIGHT LOAD EFFICIENCY(1 + 1 REDUNDANT)
`
`
`op_state 2
`~ oostate 3
`TT Copstate 4
`— PConstate 5
`
`0
`
`10
`
`20
`
`40
`
`0
`
`o
`
`ul
`
`% LOAD
`
`Anker, EX1001, p. 17
`
`Anker, EX1001, p. 17
`
`
`
`US 8,477,514 B2
`
`2
`-continued
`
`Serial
`Number
`
`Patent Numbers
`or Publication
`Numbers
`
`Title
`
`1/955,627 —2008/0316779
`
`1/955,642
`
`2008/0315852
`
`0/922,062
`
`7,012,414
`
`0/922,064
`
`7,427,910
`
`0/126,477
`0/837,552
`
`6,873,237
`7,431,862
`
`0/302,095
`
`7,046,523
`
`0/080,142
`
`6,549,436
`
`0/080,026
`
`6,775,159
`
`0/922,066
`
`7,321,283
`
`0/922,068
`
`6,980,077
`
`0/922,067
`
`7,280,026
`
`20
`
`25
`
`30
`
`1
`POWER SYSTEM WITH POWER
`CONVERTERS HAVING AN ADAPTIVE
`CONTROLLER
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`This application relates to the following co-pending and
`commonly assigned patent applications, which applications
`are incorporated herein by reference:
`
`Serial
`Number
`
`
`
` /607,325
`
`/349,637
`
`/361,742
`
`/655,334
`
`/942,632
`
`/361,914
`
`/093,592
`
`/094,632
`
`/711,340
`
`/128,623
`
`/211,964
`
`/236,376
`
`/765,252
`
`/765,323
`
`/765,324
`
`5
`This application is a continuation of U.S. patent applica-
`1/710,276=7,675,759 Power System with Power Converters
`
`tion Ser. No. 12/051,334, entitled “Power System with Power
`Having an Adaptive Controller
`Converters having an Adaptive Controller,” filed on Mar. 19,
`System and Methodfor Estimating
`Input Powerfor a Power Processing
`2008 (now, U.S. Pat. No. 7,667,986), which is a continuation
`Circuit
`in part of, and claimspriority to, U.S. patent application Ser.
`System and Methodfor Estimating
`No. 11/710,276, entitled “Power System with Power Con-
`Input Powerfor a Power Processing
`Circuit
`verters having an Adaptive Controller,”filed on Feb. 23, 2007
`Vertically Packaged Switched-Mode
`(now,U.S. Pat. No. 7,675,759), which is a continuation in part
`Power Converter
`of, and claims priority to, U.S. patent application Ser. No.
`Winding Structure for Efficient
`11/607,325, entitled “Power Converter with an Adaptive
`Switch-Mode Power Converters
`Controller and Methodof Operating the Same,”filed on Dec.
`Core Structure
`Synthesis of Magnetic, Dielectric or
`1, 2006 (now, U.S. Pat. No. 7,675,758). The aforementioned
`Phosphorescent Nano Composites
`applications are incorporated herein by reference.
`Core Structure and Interleaved DC-DC
`Converter Topology
`Integrated Magnetic Converter Circuit
`and Method with Improved Filtering
`Switching Power Converter Circuits
`Providing Main and Auxiliary Output
`Voltages
`Vertical Winding Structures for Planar
`Magnetic Switched-Mode Power
`Converters
`Composite Magnetic Core for Switch-
`Mode Power Converters
`Extended E Matrix Integrated
`Magnetics (MIM) Core
`
`
`
`Patent Numbers
`or Publication
`Numbers
`
`Title
`
`7,417,875
`
`7,176,662
`
`7,298,118
`
` 2008/0150666
`
`7,385,375
`
`7,439,556
`
`7,439,557
`
` 2007/0145417
`
`7,339,208
`
`7,285,807
`
`7,462,891
`
` 2007/0298559
`
`7,663,183
`
`7,541,640
`
`7,675,758
`
`
`
`Power Converter Employing
`Integrated Magnetics with a Current
`Multiplier Rectifier and Method of
`Operating the Same
`Power Converter Employing a Tapped
`Inductor and Integrated Magnetics and
`Methodof Operating the Same
`Power Converter Employing a Tapped
`Inductor and Integrated Magnetics and
`Methodof Operating the Same
`Power Converter Employing a Tapped
`Inductor and Integrated Magnetics and
`Methodof Operating the Same
`Control Circuit
`for a Depletion Mode
`Switch and Method of Operating the
`Same
`Substrate
`Transistor
`Semiconductor Device Having a
`Lateral Channel and Contacts on
`Opposing Surfaces Thereof
`High Voltage Semiconductor Device
`Having a Lateral Channel and
`Enhanced Gate-to-Drain Separation
`Semiconductor Device Having
`Multiple Lateral Channels and Method
`Typically, the controller measures an internal operating
`of Forming the Same
`characteristic (e.g., an internal bus voltage) or an output char-
`Semiconductor Device Having
`Substrate-Driven F