throbber
Trials@uspto.gov
`571-272-7822
`
`Paper 29
`Date: May 17, 2023
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`SAMSUNG ELECTRONICS CO., LTD, DELL TECHNOLOGIES INC.,
`and ANKER INNOVATIONS LTD.,1
`Petitioner,
`v.
`MYPAQ HOLDINGS LTD.,
`Patent Owner.
`
`IPR2022-00311
`Patent 8,477,514 B2
`
`
`
`
`
`
`
`
`
`Before KRISTINA M. KALAN, DANIEL J. GALLIGAN, and
`ELIZABETH M. ROESEL, Administrative Patent Judges.
`GALLIGAN, Administrative Patent Judge.
`
`
`JUDGMENT
`Final Written Decision
`Determining All Challenged Claims Unpatentable
`35 U.S.C. § 318(a)
`
`
`
`
`1 Anker Innovations Ltd. filed a motion for joinder and a petition in
`IPR2022-01134 and has been joined as a petitioner in this proceeding.
`
`
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`

`

`IPR2022-00311
`Patent 8,477,514 B2
`
`INTRODUCTION
`I.
`In this inter partes review, Samsung Electronics Co., Ltd.
`(“Samsung”), Dell Technologies Inc. (“Dell”), and Anker Innovations Ltd.
`(“Anker”) (collectively “Petitioner”) challenge the patentability of claims 1–
`20 of U.S. Patent No. 8,477,514 B2 (Ex. 1001, “the ’514 patent”), which is
`assigned to MyPAQ Holdings Ltd. (“Patent Owner”).
`We have jurisdiction under 35 U.S.C. § 6. This Final Written
`Decision, issued pursuant to 35 U.S.C. § 318(a), addresses issues and
`arguments raised during the trial in this inter partes review. For the reasons
`discussed below, we determine that Petitioner has proven by a
`preponderance of the evidence that claims 1–20 of the ’514 patent are
`unpatentable. See 35 U.S.C. § 316(e) (2018) (“In an inter partes review
`instituted under this chapter, the petitioner shall have the burden of proving a
`proposition of unpatentability by a preponderance of the evidence.”).
`A. Procedural History
`Samsung and Dell filed a Petition (Paper 3, “Pet.”) challenging claims
`1–20 of the ’514 patent on the following grounds:
`Claim(s) Challenged 35 U.S.C. §
`Reference(s)/Basis
`1–12, 14–17, 19, 20
`102(a), (b)2 Chagny3
`1–20
`103(a)
`Chagny
`1–10, 16, 17, 19, 20
`102(a), (b)
`Hwang4
`11, 12, 14–17, 19, 20 103(a)
`Hwang, Chagny
`18
`103(a)
`Hwang
`13, 18
`103(a)
`Hwang, Chagny
`
`2 The Leahy-Smith America Invents Act (“AIA”), Pub. L. No. 112-29,
`125 Stat. 284, 287–88 (2011) amended 35 U.S.C. §§ 102 and 103, effective
`March 16, 2013. Because the ’514 patent was filed before this date, we refer
`to the pre-AIA versions of §§ 102 and 103. Ex. 1001, code (22).
`3 Ex. 1004, US 6,873,136 B2, issued March 29, 2005 (“Chagny”).
`4 Ex. 1006, US 2004/0174152 A1, published September 9, 2004 (“Hwang”).
`
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`IPR2022-00311
`Patent 8,477,514 B2
`Pet. 8–9. Patent Owner filed a Preliminary Response. Paper 7. With our
`authorization, Samsung and Dell filed a reply to the Preliminary Response
`(Paper 9) addressing discretionary denial issues, and Patent Owner filed a
`sur-reply (Paper 10). We instituted trial on the asserted grounds of
`unpatentability. Paper 11 (“Inst. Dec.”), 29.
`After institution, Anker filed a motion for joinder and a petition in
`IPR2022-01134. We joined Anker as a petitioner in this proceeding.
`Paper 18.
`During the trial, Patent Owner filed a Response (Paper 17, “PO
`Resp.”), Petitioner filed a Reply (Paper 22, “Pet. Reply”), and Patent Owner
`filed a Sur-reply (Paper 23, “PO Sur-reply”).
`An oral hearing was held on February 24, 2023, a transcript of which
`appears in the record. Paper 28 (“Tr.”).
`Petitioner relies on testimony from Dr. Sayfe Kiaei. Exs. 1002
`(Declaration), 1026 (Reply Declaration). Patent Owner relies on testimony
`from Dr. Frank Ferrese. Ex. 2018. The parties have entered in the record
`transcripts for depositions of these declarants. Exs. 2020, 2021 (Kiaei
`Deposition), 1027 (Ferrese Deposition).
`B. Real Parties in Interest
`Petitioner identifies the following as real parties in interest: Samsung,
`Dell, Samsung Electronics America, Inc., Samsung Semiconductor, Inc.,
`Samsung Austin Semiconductor, LLC, Dell Inc., and Anker. Pet. 1;
`IPR2022-01134, Paper 2 at 1.
`Patent Owner identifies itself as the real party in interest and notes
`that “Transpacific IP Group Limited has an ownership interest in MyPAQ.”
`Paper 5 at 1; Paper 8 at 1.
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`IPR2022-00311
`Patent 8,477,514 B2
`
`C. Related Matters
`As required by 37 C.F.R. § 42.8(b)(2), the parties identify various
`related matters, including MyPAQ Holdings Ltd. v. Samsung Electronics
`Co., Ltd., 6:21-CV-00398 (W.D. Tex.) (“district court litigation”). Pet. 1;
`Paper 8 at 1. We are concurrently issuing a final written decision in
`IPR2022-00312, involving related U.S. Patent 7,675,759 B2. See Ex. 1001,
`code (63) (related application data showing that the ’514 patent is a
`continuation of a continuation-in-part of Patent 7,675,759 B2).
`D. The ’514 Patent and Illustrative Claims
`The ’514 patent discloses a power system having a power converter
`with an adaptive controller that can change an internal operating
`characteristic (such as switching frequency) of the power converter based on
`signals about the load to which it provides power. Ex. 1001, code (57),
`6:51–7:4, 9:28–38.
`Petitioner challenges all 20 claims of the ’514 patent. Pet. 8–9.
`Claims 1, 6, 11, and 16 are independent. Claims 1 and 6 are illustrative of
`the claimed subject matter and are reproduced below.
`1. A power converter coupled to a load, comprising:
`a power switch configured to conduct for a duty cycle to
`provide an output characteristic at an output thereof; and
`a power converter controller configured to receive a signal
`from said load indicating a system operational state of said load
`and control an internal operating characteristic of said power
`converter as a function of said signal.
`6. A power system, comprising:
`a power system controller configured to provide a signal
`characterizing a power requirement of a processor system; and
`a power converter coupled to said processor system,
`comprising:
`
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`IPR2022-00311
`Patent 8,477,514 B2
`a power switch configured to conduct for a duty cycle to
`provide an output characteristic at an output thereof, and
`a power converter controller configured to receive a signal
`from said power system controller to control an internal
`operating characteristic of said power converter as a function of
`said signal.
`
`
`
`II. ANALYSIS
`A. Principles of Law
`To establish anticipation, each and every element in a claim, arranged
`as recited in the claim, must be found in a single prior art reference. Net
`MoneyIN, Inc. v. VeriSign, Inc., 545 F.3d 1359, 1371 (Fed. Cir. 2008).
`Although the elements must be arranged or combined in the same way as in
`the claim, “the reference need not satisfy an ipsissimis verbis test,” i.e.,
`identity of terminology is not required. In re Gleave, 560 F.3d 1331, 1334
`(Fed. Cir. 2009) (citing In re Bond, 910 F.2d 831, 832–33 (Fed. Cir. 1990)).
`A patent claim is unpatentable under 35 U.S.C. § 103(a) if the
`differences between the claimed subject matter and the prior art are such that
`the subject matter, as a whole, would have been obvious at the time the
`invention was made to a person having ordinary skill in the art to which said
`subject matter pertains. KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 406
`(2007). The question of obviousness is resolved on the basis of underlying
`factual determinations including (1) the scope and content of the prior art;
`(2) any differences between the claimed subject matter and the prior art;
`(3) the level of ordinary skill in the art; and (4) any secondary
`
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`Patent 8,477,514 B2
`considerations, if in evidence.5 Graham v. John Deere Co. of Kan. City, 383
`U.S. 1, 17–18 (1966).
`B. Level of Ordinary Skill in the Art
`Petitioner contends that a person of ordinary skill in the art
`(“POSITA”) would have had “either (i) a Masters of Science in Electrical
`Engineering, or an equivalent field, or (ii) a Bachelor of Science in Electrical
`Engineering or an equivalent field as well as at least two years of experience
`in the design of power electronics.” Pet. 9 (citing Ex. 1002 ¶ 35).
`At institution, we found this definition to be consistent with the scope
`and content of the ’514 patent and the asserted prior art, but we omitted the
`open-ended phrase “at least” to avoid introducing vagueness as to the
`amount of experience. Inst. Dec. 12.
`Patent Owner does not dispute part (ii) of Petitioner’s proposed skill
`level, but for part (i), Patent Owner argues that “a Master and Bachelor
`degree in Electrical Engineering alone would not necessarily focus enough
`on power electronics to qualify as a POSITA.” PO Resp. 16. Relying on
`Dr. Ferrese’s testimony, Patent Owner argues that,
`[t]o qualify as a POSITA based entirely on education, a person
`would need to demonstrate a significant focus on power
`electronics while obtaining their Master and/or Bachelor
`degrees, for example, through taking higher level courses
`focused on power electronics, publishing on the topic of power
`electronics, performing lab work or internships in the field of
`power electronics, or similar.
`PO Resp. 16–17 (citing Ex. 2018 ¶ 45). Patent Owner also argues that “a
`person with a Master and Bachelor degree in many ‘equivalent fields’ to
`
`
`5 The parties do not present arguments related to objective evidence of
`nonobviousness (i.e., secondary considerations) as to any of the challenged
`claims.
`
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`Patent 8,477,514 B2
`Electrical Engineering would not be expected to have any significant
`exposure to power electronics” and that such a person would need
`“independent expertise in power electronics (through work or otherwise) to
`qualify as a POSITA.” PO Resp. 17 (citing Ex. 2018 ¶ 46).
`We agree with Patent Owner that some degree of familiarity with
`power electronics would be necessary for a POSITA given the subject matter
`at issue, and we understood this to be implicit in part (i) of Petitioner’s
`definition. To address Patent Owner’s concern, we clarify that a person with
`a Master of Science in Electrical Engineering or an equivalent field would
`need experience in power electronics to qualify as a POSITA. We are
`reluctant to use Patent Owner’s formulation of “some independent expertise
`in power electronics” (PO Resp. 17 (emphasis added)) because it could be
`read to include an expert level of skill rather than an ordinary level of skill.
`Thus, we determine that a POSITA would have had either (i) a Master
`of Science in Electrical Engineering, or an equivalent field, and experience
`in power electronics or (ii) a Bachelor of Science in Electrical Engineering
`or an equivalent field as well as two years of experience in the design of
`power electronics.
`We would reach the same determinations on Petitioner’s patentability
`challenges in §§ II.D–E below even if we adopted Patent Owner’s
`assessment of a person with a Master of Science degree and “some
`independent expertise in power electronics (through work or otherwise),”
`which is a higher level of skill.
`C. Claim Construction
`We interpret claim terms using “the same claim construction standard
`that would be used to construe the claim in a civil action under
`35 U.S.C. 282(b).” 37 C.F.R. § 42.100(b).
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`Patent 8,477,514 B2
`Both parties state that they interpret the claims according to “their
`ordinary and customary meaning,” and neither party proposes express
`constructions in the claim construction sections of their papers. Pet. 9;
`PO Resp. 16. In its arguments against Petitioner’s unpatentability
`contentions, however, Patent Owner proposes constructions for “system
`operational state” and “core state.” PO Resp. 18–22, 37–38. We discuss
`each of these terms below.
`1. “System Operational State”
`Claim 1 recites “a power converter controller configured to receive a
`signal from [a] load indicating a system operational state of said load.”
`Petitioner contends that a signal indicating the activity level of the
`processor (load) is a signal “indicating a system operational state of said
`load,” as recited in claim 1. Pet. 18.
`Patent Owner counters that a person of ordinary skill in the art “would
`understand that the term ‘system operational state’ as it pertains to
`engineering systems, refers to the way in which the system as a whole is
`being employed or utilized.” PO Resp. 18 (citing Ex. 2018 ¶ 52). Patent
`Owner argues that examples of signals indicating system operational states
`from the ’514 patent show that such “signal[s] indicate[] the current or
`future operational state of the load in a particular context, not simply the
`current activity level of the processor.” PO Resp. 18–20 (citing Ex. 1001,
`9:14–27; Ex. 2018 ¶ 52). According to Patent Owner, “the system
`operational state is not merely a measure of power level during a low power
`state[;] it is a state that is driven by various factors, including external
`requirements, and is ultimately dependent on the context in which the
`system is being utilized.” PO Resp. 21 (citing Ex. 2018 ¶ 54).
`
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`IPR2022-00311
`Patent 8,477,514 B2
`We do not agree with Patent Owner’s interpretation of the term
`“system operational state of said load.” As an initial matter, Patent Owner
`does not direct us to, and we do not find, a definition of “system operational
`state” of a load in the ’514 patent. As noted above, Patent Owner’s
`proposed definition is that “the term ‘system operational state’ as it pertains
`to engineering systems, refers to the way in which the system as a whole is
`being employed or utilized.” PO Resp. 18 (citing Ex. 2018 ¶ 52). Claim 1,
`however, recites “a system operational state of said load” (emphasis added),
`not the system as a whole. Patent Owner’s proposed construction, therefore,
`is not consistent with the claim language. Patent Owner points to examples
`disclosed in the ’514 patent in an attempt to narrow the meaning of the claim
`term and, as further discussed below, to distinguish the prior art. See PO
`Resp. 18–20 (“The ’514 Patent provides examples of signals indicating
`system operational states that include signals . . . .” (citing Ex. 1001, 9:14–
`27)). But the ’514 patent states that these are non-limiting examples.
`Ex. 1001, 9:11–23 (“Further examples indicating a system operational state
`include, without limitation . . . .”).
`One passage cited by Patent Owner states the following:
`It should also be taken into account that there are loads
`with different operating states. For example, a server configured
`to process financial data may operate at a higher level of
`criticality during normal business hours, and revert to a lower
`processing state at another time of day. The aforementioned
`system may require a higher level of performance from the power
`converter during such periods of high criticality, which may
`compromise operating efficiency, but which may admit higher
`operating efficiency during substantial periods of time in the
`lower processing state.
`Ex. 1001, 5:8–17, quoted in PO Resp. 20. Patent Owner argues that this
`passage “illustrates the difference between operational states and system
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`IPR2022-00311
`Patent 8,477,514 B2
`activity at a particular moment” because, according to Patent Owner, “[i]n
`this example, the system operational state may be critical or non-critical
`depending on the performance constraints at particular time of day.”
`PO Resp. 20 (citing Ex. 2018 ¶ 53). We disagree. The ’514 patent passage
`above effectively correlates processor activity and criticality by saying that,
`in a period of “high criticality,” the load requires a higher performance level
`from the power converter than when the load is in a “lower processing
`state.” Ex. 1001, 5:8–17. Thus, this example shows that a “lower
`processing state” of a data processing server is a “system operational state”
`of that server, notwithstanding Patent Owner’s labeling this as a “non-
`critical” operational state. See PO Resp. 20.
`Patent Owner argues that “two processors in two different systems
`may have the same activity level at some point in time” but may be in
`different system operational states because, for example, speed is critical
`with one processor and energy efficiency is critical with the other.
`PO Resp. 21–22 (citing Ex. 2018 ¶¶ 55–56). Similarly, Dr. Ferrese posits an
`analogy in which two vehicles are traveling at the same speed but one is
`carrying a person to a hospital and the other is carrying a family on a road
`trip. Ex. 2018 ¶ 55. Dr. Ferrese states that, even though these two vehicles
`“in a given instant appear to be operating identically,” they “can actually
`have significantly different system operational states resulting in different
`preferences in terms of how they are operated and controlled.” Ex. 2018
`¶ 55. These hypotheticals are not persuasive, as they would introduce
`subjectivity into the claim construction, requiring inquiry into the purpose or
`intent of a processor’s operation. Furthermore, these hypotheticals are not
`helpful in resolving the controversy because Petitioner relies on Chagny’s
`different activity levels as disclosing different system operational states, as
`
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`Patent 8,477,514 B2
`discussed below in section II.D.2.c. Thus, we need not opine on whether
`one activity level of a processor could result in multiple system operational
`states.
`In addition, we decline to define the system operational state of a load
`to include “external requirements,” as urged by Patent Owner (PO Resp. 21),
`because this ignores the plain language of claim 1, which recites “a system
`operational state of said load” (emphasis added), not states external to the
`load.
`For the reasons discussed above, we determine that a signal
`“indicating a system operational state of said load” encompasses a signal
`indicating the activity level of a processor. See Ex. 1001, 5:8–17. We need
`not further construe this claim term to resolve the patentability issues before
`us. See Realtime Data, LLC v. Iancu, 912 F.3d 1368, 1375 (Fed. Cir. 2019)
`(“The Board is required to construe ‘only those terms . . . that are in
`controversy, and only to the extent necessary to resolve the controversy.’”
`(quoting Vivid Techs., Inc. v. Am. Sci. & Eng’g, Inc., 200 F.3d 795, 803
`(Fed. Cir. 1999))).6
`
`
`6 Our Rules require us to consider “[a]ny prior claim construction
`determination concerning a term of the claim in a civil action, or a
`proceeding before the International Trade Commission, that is timely made
`of record in the inter partes review proceeding.” 37 C.F.R. § 42.100(b).
`Patent Owner entered into the record an email from a law clerk in the district
`court litigation laying out in a table “preliminary claim constructions” for
`some terms of the ’514 patent before a Markman hearing. Ex. 2028. That
`district court case was stayed before the court issued its final claim
`construction determinations. Tr. 11:4–10. We have considered the
`preliminary claim constructions in Exhibit 2028, and we determine that they
`do not impact the analysis in this proceeding.
`
`11
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`IPR2022-00311
`Patent 8,477,514 B2
`
`2. “Core State”
`Claim 4 depends from claim 1 and recites that the “load is a processor
`and said system operational state is dependent on one of a core state and a
`performance state of said processor.” Claim 9 depends from claim 6 and
`recites that the “power requirement of a processor system is dependent on
`one of a core state and a performance state of said processor system.”
`Petitioner contends that “the ‘core state’ as described in the ’514
`Patent background specifies the activity level (e.g., the rate at which
`instructions are executed) of the processor.” Pet. 23 (citing Ex. 1001, 5:44–
`57; Ex. 1002 ¶ 79).
`Patent Owner argues that the “core state (C-state) and performance
`state (P-state) of a processor are defined in the industry standard titled,
`‘Advanced Configuration and Power Interface’ which is incorporated by
`reference into the ’514 Patent.” PO Resp. 37 (citing Ex. 1001, 5:22–27;
`Ex. 2022 (Advanced Configuration and Power Interface (ACPI)
`Specification, Revision 3.0, September 2, 2004)). According to Patent
`Owner, the ’514 patent “defines ‘core state’ as a ‘C-state’ and uses the terms
`interchangeably.” PO Sur-reply 22–23 (citing Ex. 1001, 5:44–46, 8:7–9,
`9:11–15, 25:28–30, 25:65–26:2, Fig. 12; Ex. 2018 ¶¶ 90–96; Ex. 2020,
`66:18–25).
`Petitioner counters that the claims recite “a core state,” not “a C-state
`as defined in ACPI,” and that the ’514 patent provides that “a C-state is
`merely an example of a core state.” Pet. Reply 25 (citing Ex. 1001, 9:12–
`14).
`
`We agree with Petitioner. Claims 4 and 9 recite “core state,” not
`“C-state.” The specification of the ’514 patent identifies a “C-state” as a
`type of “core state.” Ex. 1001, 5:44–46 (“Another processor state indicator,
`
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`the core state (‘C-state’) . . . .”), 25:28–30 (“Turning now to FIG. 12,
`illustrated is a diagram of an embodiment of processor core states (‘C-
`states’) in accordance with the principles of the present invention
`illustrated.”). Figure 12 of the ’514 patent, which “illustrates a diagram of
`an embodiment of processor core states in accordance with the principles of
`the present invention,” includes the caption “ACPI C-STATES – IDLE
`POWER MANAGEMENT.” Ex. 1001, 8:7–9. That the ’514 patent
`explains the concept of core states by reference to C-states as defined in
`ACPI (“ACPI C-states”), however, does not mean that the term “core state”
`is necessarily limited to ACPI C-states. The specification of the ’514 patent
`elsewhere shows that the ACPI C-states are merely examples within the
`broader category of core states. For instance, the ’514 patent states that
`“examples indicating a system operational state include, without limitation, a
`signal providing a performance state or a core state of a processor such as a
`P-state or C-state.” Ex. 1001, 9:11–23 (emphasis added). Given the ’514
`patent’s description of C-states as exemplary core states, we do not agree
`with Patent Owner’s argument that the recited “core state” should be limited
`to ACPI C-states.
`We need not further construe the term “core state” to resolve the
`patentability issues before us. See Realtime Data, 912 F.3d at 1375.
`D. Anticipation by Chagny
`(Claims 1–12, 14–17, 19, 20)
`Petitioner asserts that Chagny anticipated claims 1–12, 14–17, 19,
`and 20. Pet. 8, 13–39. Patent Owner opposes. PO Resp. 18–39; PO
`Sur-reply 6–7, 9–25.
`
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`
`1. Chagny
`Chagny discloses a voltage regulator module (“VRM”) that provides a
`regulated direct current (“DC”) voltage output to power a processor of an
`information handling system. Ex. 1004, code (57). An embodiment is
`shown in Figure 2A, which is reproduced below.
`
`
`In Chagny’s Figure 2A above, VRM 200 receives a DC voltage input 205
`and generates a regulated DC voltage output 295, which provides power to
`processor 292 included in information handling system device 290.
`Ex. 1004, 3:52–59. VRM 200 includes, among other things, controller
`module 210 operable to receive activity input 202 indicative of levels of
`activity of processor 292 and to select a switching frequency of VRM 200
`responsive to activity input 202 so that the switching frequency
`“dynamically matches the level of activity” of processor 292. Ex. 1004,
`3:60–65, 4:66–5:3, 5:9–12.
`
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`
`2. Claim 1
`a) Preamble
`Claim 1 is directed to “[a] power converter coupled to a load.”
`Petitioner identifies Chagny’s VRM 200 as a “power converter” and
`argues that “VRM 200 is coupled to provide power to a load including
`processor 292 and software program 296.” Pet. 13–14 (citing Ex. 1004,
`3:54–60, 4:35–37, 7:36–41, Fig. 2A; Ex. 1002 ¶¶ 52–53).7
`During the trial, Patent Owner did not dispute Petitioner’s contentions
`for this subject matter. See PO Resp. 18–23 (arguments for claim 1); see
`also Paper 12 at 9 (“Patent Owner is cautioned that any arguments not raised
`in the response may be deemed waived.”); In re NuVasive, Inc., 842 F.3d
`1376, 1380–81 (Fed. Cir. 2016) (explaining that the patent owner waived an
`issue presented in its preliminary response that it failed to renew in its
`response during trial); Consolidated Trial Practice Guide 52 (Nov. 2019),
`available at https://www.uspto.gov/TrialPracticeGuideConsolidated (“Once
`a trial is instituted, the Board may decline to consider arguments set forth in
`a preliminary response unless they are raised in the patent owner
`response.”).
`Petitioner’s contentions for the preamble are persuasive. We find that
`Chagny’s VRM 200 is a power converter because it is “operable to receive a
`direct current (DC) voltage input 205 and generate a regulated DC voltage
`output 295.” Ex. 1004, 3:54–56; see Pet. 13–14 (discussing this disclosure).
`This is consistent with the ’514 patent’s description of the operation of
`power converters. See, e.g., Ex. 1001, 2:67–3:4 (“In an exemplary
`
`
`7 Petitioner and Dr. Kiaei italicize the names of references. We omit this
`emphasis when quoting Petitioner’s arguments and Dr. Kiaei’s testimony.
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`application, the power converters have the capability to convert an
`unregulated dc input voltage such as five volts to a lower, regulated, dc
`output voltage such as 2.5 volts to power a load.”).
`We also find that Chagny’s processor 292 and software program 296
`are a “load” to which VRM 200 is coupled because Chagny’s VRM 200 is
`coupled to and provides power to processor 292 in the same way that the
`power converter described in the ’514 patent is coupled to and provides
`power to a microprocessor. Compare Ex. 1001, 10:12–15 (“The power
`converter . . . provides power to a system (not shown) such as a
`microprocessor coupled to an output thereof.”), with Ex. 1004, 3:54–58
`(disclosing that “VRM 200 is operable to . . . generate a regulated DC
`voltage output 295,” which “provides power to a processor 292”).
`Based on Petitioner’s persuasive argument and evidence, summarized
`and addressed above, we find that Chagny describes the subject matter of the
`preamble.8
`
`b) Power Switch
`Claim 1 recites that the power converter comprises “a power switch
`configured to conduct for a duty cycle to provide an output characteristic at
`an output thereof.”
`Petitioner argues that Chagny describes this subject matter because
`charge switch 220 within VRM 200 is a power switch that conducts for a
`duty cycle to provide regulated DC voltage output 295 at the output of
`VRM 200. Pet. 14–16 (citing Ex. 1004, 1:51–59, 5:34–42, 5:44–51, 4:63–
`65, 6:45–49, Fig. 2A; Ex. 1002 ¶¶ 54–61).
`
`
`8 Because Petitioner has shown that Chagny describes subject matter recited
`in the preamble, we need not decide whether the preamble is limiting.
`
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`

`

`IPR2022-00311
`Patent 8,477,514 B2
`Patent Owner does not dispute Petitioner’s contentions for this subject
`matter.
`Petitioner’s contentions are persuasive. Chagny discloses that power
`switch 220, controlled by charge control signal 212, is closed (i.e., conducts)
`during a charge cycle. Ex. 1004, 5:34–40. Chagny explains that “DC
`voltage input 205 is ‘chopped’ by the charge switch 220 to generate the
`switched DC voltage output 225,” which is then filtered to generate
`regulated DC voltage output 295. Ex. 1004, 5:40–42, 5:48–51.
`Based on Petitioner’s persuasive argument and evidence, we find that
`Chagny describes “a power switch configured to conduct for a duty cycle to
`provide an output characteristic at an output thereof.”
`c) Power Converter Controller
`Claim 1 recites that the power converter comprises “a power converter
`controller configured to receive a signal from said load indicating a system
`operational state of said load and control an internal operating characteristic
`of said power converter as a function of said signal.”
`
`17
`
`

`

`IPR2022-00311
`Patent 8,477,514 B2
`Petitioner provides the annotated version of Chagny’s Figure 2A
`reproduced below to illustrate its contentions for this subject matter.
`
`
`
`Pet. 17. Chagny’s Figure 2A is a diagram of a VRM with a selectable
`switching frequency. Ex. 1004, 3:17–19. In the annotated version of
`Chagny’s Figure 2A above, Petitioner identifies controller module 210
`(gray) within VRM 200 as a power converter controller, and Petitioner
`illustrates with purple highlighting a signaling path from processor 292
`(“load”) to software program 296, I/O controller hub 280, and controller
`module 210 to show “a signal from said load indicating a system operational
`state of said load.” Pet. 17.
`Petitioner contends that software program 296 receives a signal from
`processor 292 indicating the processor’s activity level and sends “activity
`input 202” to controller module 210. Pet. 17–19 (citing Ex. 1004, 4:18–20,
`4:35–43, 4:59–67, 5:62–64, Fig. 2A; Ex. 1002 ¶¶ 62–66). Petitioner
`
`18
`
`

`

`IPR2022-00311
`Patent 8,477,514 B2
`contends that “‘activity input 202’ is ‘indicative of the activity level of the
`processor 292’ (i.e., indicating a system operational state of the load).”
`Pet. 18 (citing Ex. 1004, 4:40–43, 5:11–12). Petitioner argues that Chagny’s
`controller module changes the switching frequency of VRM 200 based on
`activity input 202 and, therefore, that Chagny discloses “control[ling] an
`internal operating characteristic of said power converter as a function of said
`signal.” Pet. 19 (citing Ex. 1004, 3:59–65, 4:46–49, 4:66–5:18; Ex. 1002
`¶¶ 67–69).
`Relying on its proposed construction for “system operational state,”
`Patent Owner argues that “the activity level of Chagny’s processor does not
`indicate the system operational state.” PO Resp. 22. For the reasons
`discussed above in section II.C.1, we do not adopt Patent Owner’s
`interpretation of “system operational state,” and, thus, we do not agree with
`Patent Owner’s arguments based on its proposed construction.
`Chagny discloses that “activity input 202 [is] indicative of the activity
`level of the processor 292.” Ex. 1004, 5:9–12. Therefore, Chagny’s activity
`input 202 is a signal indicating the activity level of a processor, which is
`within the scope of a signal “indicating a system operational state of said
`load” under the construction set forth above in section II.C.1.
`Chagny further explains that “processor 292 loading, usage or activity
`level will vary depending on the number of instructions executed within a
`predefined time interval.” Ex. 1004, 4:18–20. Chagny discloses high,
`medium, and low activity levels. Ex. 1004, 4:31–33. Even applying Patent
`Owner’s proposed claim construction, Chagny’s low activity level shows
`how the processor “is being employed or utilized” (PO Resp. 18) consistent
`with the ’514 patent’s disclosure of a “lower processing state” for a server.
`Ex. 1001, 5:8–17; see above § II.C.1 (discussing this disclosure).
`
`19
`
`

`

`IPR2022-00311
`Patent 8,477,514 B2
`We agree with Petitioner that Chagny’s controller module 210
`changes the switching frequency of VRM 200 based on activity input 202.
`See Pet. 19 (citing Ex. 1004, 4:46–49, 4:66–5:18; Ex. 1002 ¶¶ 67–69). In
`particular, Chagny discloses that frequency selector module 215 of
`controller module 210 “is operable to receive the activity input 202 . . . and
`select a switching frequency 216 from a plurality of switching frequencies as
`an output, which dynamically matches the level of activity of the
`processor 292.” Ex. 1004, 4:66–5:3; see also Ex. 1004, 5:9–12 (“Thus the
`controller module 210 dynamically changes the switching frequency 216 of
`the VRM 200 responsive to the activity input 202 indicative of the activity
`level of the processor 292.”).
`Based on Petitioner’s persuasive argument and evidence, we find that
`Chagny describes “a power converter controller configured to receive a
`signal from said load indicating a system operational state of said load and
`control an internal operating characteristic of said power converter as a
`function of said signal.”
`
`d) Conclusion for Claim 1
`For the reasons discussed above and based on Petitioner’s contentions
`and evidence, we find that Chagny describes the subject matter of claim 1
`and, therefore, that Chagny anticipated claim 1.
`3. Claim 6
`Independent claim 6 i

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