`
`
`
`IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_______________
`
`AMERICAN HONDA MOTOR CO., INC.,
`
`Petitioner
`v.
`MICROPAIRING TECHNOLOGIES, LLC,
`Patent Owner
`
`
`Patent No. 7,178,049
`Filing Date: April 24, 2002
`Issue Date: February 13, 2007
`Title: REAL-TIME EVENT PROCESSING SYSTEM WITH ANALYSIS
`ENGINE USING RECOVERY INFORMATION
`________________
`
`Inter Partes Review No.: IPR2022-01079
`
`________________
`
`
`
`
`DECLARATION OF DR. TAJANA ROSING IN SUPPORT OF PETITION
`FOR INTER PARTES REVIEW OF U.S. PAT. NO. 7,178,049
`
`
`
`
`
`AHM, Exh. 1003, p. 1
`
`

`

`
`
`
`
`I. 
`II. 
`
`TABLE OF CONTENTS
`INTRODUCTION ........................................................................................... 1 
`PROFESSIONAL BACKGROUND, QUALIFICATIONS, AND
`INDUSTRY TRENDS .................................................................................... 2 
`III.  MATERIALS AND OTHER INFORMATION CONSIDERED ................... 6 
`IV.  SUMMARY OF OPINIONS ........................................................................... 7 
`V.  UNDERSTANDING OF THE LAW .............................................................. 7 
`A. 
`LEGAL STANDARD FOR PRIOR ART......................................................... 8 
`B. 
`LEGAL STANDARD FOR CLAIM CONSTRUCTION...................................... 9 
`C. 
`LEGAL STANDARD FOR OBVIOUSNESS .................................................. 11 
`VI.  RELEVANT TIMEFRAME .......................................................................... 14 
`VII.  LEVEL OF ORDINARY SKILL IN THE RELEVANT ART ..................... 15 
`VIII.  TECHNOLOGY BACKGROUND ............................................................... 16 
`A. 
`FAULT-TOLERANT ARCHITECTURES AND DISTRIBUTED PROCESSOR
`SYSTEMS .............................................................................................. 17 
`FAULT IDENTIFICATION AND DETECTION ............................................. 18 
`B. 
`IX.  CLAIM CONSTRUCTION .......................................................................... 18 
`X. 
`THE ʼ049 PATENT ....................................................................................... 21 
`A. 
`THE ʼ049 PATENT’S PRIORITY DATE .................................................... 21 
`B. 
`OVERVIEW ............................................................................................ 21 
`XI.  OVERVIEW OF THE PRIOR ART ............................................................. 25 
`A. 
`SYED MISBAHUDDIN ET. AL, FAULT TOLERANT DISTRIBUTED
`ARCHITECTURE FOR IN-VEHICULAR NETWORKS (“MISBAHUDDIN”) ........ 25 
`U.S. PATENT NO. 5,796,937 TO KIZUKA (“KIZUKA”) .......................... 26 
`B. 
`C.  MANSUR KABUKA ET. AL, A FAULT-TOLERANT ARCHITECTURE FOR AN
`AUTOMATIC VISION-GUIDED VEHICLE (“KABUKA”) .............................. 27 
`D.  U.S. PATENT NO. 5,796,936 TO WATABE (“WATABE”) ....................... 28 
`INVALIDITY OF THE ‘049 PATENT ........................................................ 29 
`A. 
`THE ‘049 PATENT CHALLENGED CLAIMS WOULD HAVE BEEN OBVIOUS
`OVER MISBAHUDDIN IN VIEW OF KIZUKA ............................................ 29 
`
`XII. 
`
`
`
`i
`
`AHM, Exh. 1003, p. 2
`
`

`

`
`
`B. 
`
`C. 
`
`1.  Motivation to Combine Misbahuddin with Kizuka ................... 29 
`2. 
`‘049 Patent Claim 29 .................................................................. 33 
`3. 
`‘049 Patent Claim 35 .................................................................. 47 
`THE ‘049 PATENT CHALLENGED CLAIMS WOULD HAVE BEEN OBVIOUS
`OVER KABUKA IN VIEW OF KIZUKA ..................................................... 50 
`1.  Motivation to Combine Kabuka with Kizuka ............................ 50 
`2. 
`‘049 Patent Claim 29 .................................................................. 51 
`3. 
`‘049 Patent Claim 35 .................................................................. 64 
`THE ‘049 PATENT CHALLENGED CLAIMS WOULD HAVE BEEN OBVIOUS
`OVER WATABE IN VIEW OF KABUKA .................................................... 66 
`1.  Motivation to Combine Watabe with Kabuka ........................... 66 
`2. 
`‘049 Patent Claim 29 .................................................................. 69 
`3. 
`‘049 Patent Claim 35 .................................................................. 79 
`XIII.  EVIDENCE OF NON-OBVIOUSNESS ...................................................... 81 
`XIV.  CONCLUSION .............................................................................................. 81 
`
`
`
`
`
`
`ii
`
`AHM, Exh. 1003, p. 3
`
`

`

`
`
`I.
`
`INTRODUCTION
`1. My name is Dr. Tajana S. Rosing. I am a full professor, an IEEE and
`
`an ACM Fellow, the Fratamico Endowed Chair in the Computer Science and
`
`Engineering Department at the University of California, San Diego (UCSD), and an
`
`adjunct full professor in the Electrical and Computer Engineering Department at
`
`UCSD. I have been retained as an expert witness by Baker Botts L.L.P. (“Counsel”)
`
`on behalf of American Honda Motor Co., Inc., Hyundai Motor America, Kia
`
`America, Inc. (“Petitioners”), to provide technical assistance for the inter partes
`
`reviews of U.S. Patent No. 7,178,049 (“the ‘049 Patent”). This declaration sets forth
`
`my opinions on issues related to patentability of claims 29 and 35 of the ‘049 Patent
`
`(“the ‘049 Patent Challenged Claims”). I provide technical bases for these opinions
`
`as appropriate.
`
`2.
`
`This declaration contains statements of my opinions formed to date and
`
`the bases and reasons for those opinions. I make this declaration based upon my own
`
`personal knowledge and, if called upon to testify, would testify competently to the
`
`matters contained herein.
`
`3.
`
`For my efforts on this declaration, I have been compensated at my
`
`standard rate $595 per hour. My compensation is in no way dependent upon my
`
`opinions or testimony or the outcome of this proceeding.
`
`
`
`1
`
`AHM, Exh. 1003, p. 4
`
`

`

`
`
`II. PROFESSIONAL BACKGROUND, QUALIFICATIONS, AND
`INDUSTRY TRENDS
`4.
`I have summarized in this section my educational background, career,
`
`publications, and other relevant qualifications. My full curriculum vitae is attached
`
`as Exhibit 1010.
`
`5.
`
`As mentioned above, I am a professor at the University of California,
`
`San Diego (UCSD). My research focuses on energy-efficient computing, embedded
`
`systems hardware, and software design.
`
`6.
`
`I am currently a Director of System Energy Efficiency Lab at UCSD
`
`where I am leading a diverse research team on projects relating to system energy-
`
`efficiency.
`
`7.
`
`I have over twenty-five years of academic and industry experience in
`
`applying, designing, studying, teaching, and writing about energy-efficient
`
`computing. Energy efficient computing is an important consideration for mobile
`
`and embedded applications, which are particularly relevant to this IPR petition. In
`
`addition, my experience has spanned both hardware and software, operating systems
`
`and application programs, system communications and user interfaces. I received
`
`an Electrical Engineering Ph.D. degree in 2001 from Stanford University; my thesis
`
`was titled Energy Efficient System Design and Utilization. I earlier received an
`
`Electrical Engineering B.S. degree in 1992 from Northern Arizona University, an
`
`Electrical and Computer Engineering M.S. degree in 1993 from the University of
`
`
`
`2
`
`AHM, Exh. 1003, p. 5
`
`

`

`
`
`Arizona, and an Engineering Management M.S. degree in 2000 from Stanford
`
`University. While at Stanford University, I worked in the same office and on the
`
`same machines where Yahoo was started, and just down the hall from the office
`
`where Google was started. After completing my M.S. in ECE, I worked at Altera
`
`Corporation, now Intel Corporation, as a senior design engineer for four years.
`
`During and after completing my Ph.D. degree, I worked with Stanford University
`
`and Hewlett-Packard Labs leading a team of researchers to develop products for the
`
`wireless portable devices market. At HP labs, my team’s efforts included
`
`optimization of hardware and software design on a variety of mobile platforms. A
`
`partial list of my publications during this period is below:
`
` T. Simunic, M. Smith, “Dynamic Power Management at HP,” Invited
`
`Paper in Special Issue of Design and Test Journal, 2001.
`
` G. Manjunath, V. Krishnan, T. Simunic, J. Tourrilhes, A. McReynolds,
`
`D. Das, V. Srinivasmurthy, A. Srinivasan, “Smart Edge Server: going
`
`beyond a wireless access point,” WMASH 04.
`
` B. Delaney, T. Simunic, N. Jayant, “Energy Aware Distributed Speech
`
`Recognition for Wireless Mobile Devices,” Special Issue on Embedded
`
`Systems for Multimedia, IEEE Design & Test, 2004.
`
`
`
`3
`
`AHM, Exh. 1003, p. 6
`
`

`

`
`
` Acquaviva, T. Simunic, V. Deolalikar, S. Roy, “Remote Power Control
`
`of Wireless Network Interfaces,” Special Issue of Journal of Embedded
`
`Computing, No. 3, 2004.
`
` T. Simunic, W. Quadeer, G. De Micheli, “Managing heterogeneous
`
`wireless environments via Hotspot servers,” MMCN 05.
`
`8.
`
`Through work with Hewlett-Packard Labs, I am the named inventor on
`
`the following United States patents:
`
` U.S. Patent No. 7,272,730, titled “Application-driven method and
`
`apparatus for limiting power consumption in a processor-controlled
`
`hardware platform,” which issued in 2007 from an application with a
`
`priority date in 2003;
`
` U.S. Patent No. 7,246,181, titled “Device and method for identifying a
`
`communication interface that performs an operating parameter closer
`
`to a desired performance level than another communication interface
`
`performs the operating parameter,” which issued in 2007 from an
`
`application with a priority date in 2004; and
`
` U.S. Patent No. 7,190,980, titled “Method and system for power control
`
`in wireless portable devices using wireless channel characteristics,”
`
`which issued in 2007 from an application with a priority date in 2004.
`
`
`
`4
`
`AHM, Exh. 1003, p. 7
`
`

`

`
`
`9.
`
`I have over 300 publications and received a number of best paper
`
`awards and nominations. I have also been an invited speaker at numerous academic
`
`and industry conferences.
`
`10. Since joining UCSD, I have taught an undergraduate course on logic
`
`design, CSE 140, “Components and Design Techniques for Digital Systems,” and a
`
`graduate course in embedded systems, CSE 237a, “Introduction to Embedded
`
`Computing.” In my CSE 140 course, I cover basics of transistor design, logic
`
`circuits, and components, all key components that go into design of processors, and
`
`Register-Transfer-Level design. The course ends with a design of a simple MIPS
`
`based processor. In CSE 140 I also cover how to estimate performance and power
`
`consumption of a logic circuit. In my graduate CSE237a course, I cover all topics
`
`related to design and validation of embedded and distributed systems. In the first
`
`third of the course, the students learn about all the key hardware components that go
`
`into today’s embedded systems, including CPUs, GPUs, DSPs, FPGAs, various
`
`types of memory, interface design, sensors, actuators, ADC/DAC, communication
`
`subsystem that includes a variety of wireless communication methods, such as WiFi,
`
`RFID, and Bluetooth, and control system design. The second third of the course is
`
`dedicated to embedded software, where we cover issues related to timing, real-time
`
`schedulers, and real-time operating system design, and discuss examples of
`
`embedded operating systems, including various versions of Linux and Windows
`
`
`
`5
`
`AHM, Exh. 1003, p. 8
`
`

`

`
`
`used in embedded and mobile computing, Android, and embedded middleware. The
`
`last third of the course is focused on modeling strategies, testing and validation of
`
`embedded systems. Throughout the course, the students are expected to complete
`
`three projects. The first project requires students to build a mobile system that
`
`leverages sensors and actuators and schedules tasks using a real-time scheduler
`
`implemented within a version of Linux. The second part of the course requires
`
`design of an energy efficient power manager within Linux or Android for the
`
`hardware designed in part one of the project. The last project is open for students to
`
`pick but has to involve both hardware and software for embedded systems. A
`
`number of students in my class work on projects that include development of mobile
`
`applications that are capable of communicating using a variety of wireless standards.
`
`III. MATERIALS AND OTHER INFORMATION CONSIDERED
`11.
`I have considered information from various sources in forming my
`
`opinions. My opinions are based on my review of documents as well as my
`
`education, training, research, knowledge, and experience.
`
`12.
`
`I have reviewed and considered in the following, in addition to any
`
`other documents referred to in my declaration below, in forming my opinions:
`
` The ‘049 Patent and portions of its file history;
`
` U.S. Patent No. 5,796,937 (“Kizuka”) (Ex[1006])
`
`
`
`6
`
`AHM, Exh. 1003, p. 9
`
`

`

`
`
` Fault Tolerant Distributed Architecture for in-Vehicular Networks
`
`(“Misbahuddin”) (Ex[1005])
`
` U.S. Patent No. 5,796,937 (“Watabe”) (Ex[1008])
`
` A Fault-Tolerant Architecture for an Automatic Vision-Guided Vehicle
`
`(“Kabuka”) (Ex[1007])
`
` U.S. Patent No. 7,146,260 (“the ‘260 Patent”) (Ex[1012])
`
` Patent Owner’s Preliminary Response in pending IPR 2022-00317
`
`(“POPR”) (Ex[1009])
`
` Petition in pending IPR 2022-00317 (“IPR ‘317”)
`
`IV. SUMMARY OF OPINIONS
`13. For the reasons set forth herein, it is my opinion that Claims 29 and 35
`
`are rendered obvious as follows:
`
` Claims 29 and 35 are obvious over Misbahuddin in view of Kizuka and
`
`the knowledge of a POSITA
`
` Claims 29 and 35 are obvious over Kabuka in view of Kizuka and the
`
`knowledge of a POSITA
`
` Claims 29 and 35 are obvious over Watabe in view of Kabuka and the
`
`knowledge of a POSITA
`
`V. UNDERSTANDING OF THE LAW
`
`
`
`7
`
`AHM, Exh. 1003, p. 10
`
`

`

`
`
`14.
`
`I have applied the following legal principles provided to me by counsel
`
`in arriving at the opinions set forth in this declaration.
`
`A. Legal Standard for Prior Art
`I understand that a patent or other publication must first qualify as prior
`
`15.
`
`art before it can be used to invalidate a patent claim.
`
`16.
`
`I understand that a U.S. or foreign patent qualifies as prior art to a
`
`challenged patent if the date of issuance of the patent is prior to the invention of the
`
`challenged patent.
`
`17.
`
`I further understand that a printed publication, such as a book or an
`
`article published in a magazine or trade publication, qualifies as prior art to a
`
`challenged patent if the date of publication is prior to the invention of the challenged
`
`patent.
`
`18.
`
`I understand that a U.S. or foreign patent qualifies as prior art to a
`
`challenged patent if the date of issuance of the patent is more than one year before
`
`the filing data of the challenged patent.
`
`19.
`
`I further understand that a printed publication, such as a book or an
`
`article published in a magazine or trade publication, constitutes prior art to a
`
`challenged patent if the publication occurs more than one year before the filing date
`
`of the challenged patent.
`
`
`
`8
`
`AHM, Exh. 1003, p. 11
`
`

`

`
`
`20.
`
`I understand that a U.S. patent qualifies as prior art to the challenged
`
`patent if the application for that patent was filed in the United States before the
`
`invention of the challenged patent.
`
`21.
`
`I understand that documents and materials that qualify as prior art can
`
`be used to invalidate a patent claim as anticipated or as obvious
`
`B. Legal Standard for Claim Construction
`I understand that before any invalidity analysis can be properly
`
`22.
`
`performed, the scope and meaning of the challenged claims must be determined by
`
`claim construction.
`
`23.
`
`I understand that a patent may include two types of claims, independent
`
`claims and dependent claims. I understand that an independent claim stands alone
`
`and includes only the limitations it recites. I understand that a dependent claim
`
`depends from an independent claim or another dependent claim. I understand that a
`
`dependent claim includes all the limitations that it recites in addition to the
`
`limitations recited in the claim (or claims) from which it depends.
`
`24.
`
`I understand that the claims of a patent define the scope of the rights
`
`conferred by the patent. I understand that because the claims point out and distinctly
`
`claim the subject matter which the inventors regard as their invention, claim
`
`construction analysis must begin with and is focused on the claim language itself.
`
`
`
`9
`
`AHM, Exh. 1003, p. 12
`
`

`

`
`
`25.
`
`I understand that words or terms should be given their ordinary and
`
`accepted meaning unless it appears that the inventors were using them to mean
`
`something else. I understand that to determine whether a term has special meaning,
`
`the claims, the patent specification, and the prosecution history are particularly
`
`important, and may show that the inventor gave a term a particular definition or
`
`intentionally disclaimed, disavowed, or surrendered claim scope.
`
`26.
`
`In comparing the challenged claims to the prior art, I have carefully
`
`considered the patents and relevant file histories in light of the understanding of a
`
`person of ordinary skill in the art (“POSITA”) at the time of the alleged invention.
`
`27.
`
`I understand that, in construing a claim term, one should primarily rely
`
`on intrinsic patent evidence, which includes the words of the claims themselves, the
`
`remainder of the patent specification, and the prosecution history. I understand that
`
`extrinsic evidence, which is evidence external to the patent and the prosecution
`
`history, may also be useful in interpreting patent claims when the intrinsic evidence
`
`itself is insufficient. I understand that extrinsic evidence may include principles,
`
`concepts, terms, and other resources available to those of skill in the art at the time
`
`of the invention.
`
`28.
`
`I understand that a claim should be construed not only in the context of
`
`the particular claim in which the disputed term appears, but in the context of the
`
`entire patent, including the entire specification.
`
`
`
`10
`
`AHM, Exh. 1003, p. 13
`
`

`

`
`
`29.
`
`I understand that the prosecution history of the patent as well as art
`
`incorporated by reference or otherwise cited during the prosecution history are also
`
`highly relevant in construing claim terms. For instance, art cited by or incorporated
`
`by reference may indicate how the inventor and others of skill in the art at the time
`
`of the invention understood certain terms and concepts. Additionally, the
`
`prosecution history may show that the inventors disclaimed or disavowed claim
`
`scope or further explained the meaning of a claim term.
`
`30. With regard to extrinsic evidence, I understand that all evidence
`
`external to the patent and prosecution history, including expert and inventor
`
`testimony, dictionaries, and learned treatises, can also be considered. For example,
`
`technical dictionaries may indicate how one of skill in the art used or understood the
`
`claim terms. However, I understand that extrinsic evidence is considered to be less
`
`reliable than intrinsic evidence, and for that reason is generally given less weight
`
`than intrinsic evidence.
`
`C. Legal Standard for Obviousness
`I have been instructed by counsel on the law regarding obviousness and
`
`31.
`
`understand that even if a patent is not anticipated, it is still invalid if the differences
`
`between the claimed subject matter and the prior art are such that the subject matter
`
`as a whole would have been obvious at the time the invention was made to a
`
`POSITA.
`
`
`
`11
`
`AHM, Exh. 1003, p. 14
`
`

`

`
`
`32.
`
`I understand that a POSITA provides a reference point from which the
`
`prior art and claimed invention should be viewed. This reference point prevents a
`
`POSITA from using one’s hindsight in deciding whether a claim is obvious.
`
`33.
`
`I also understand that an obviousness determination includes the
`
`consideration of various factors such as (1) the scope and content of the prior art, (2)
`
`the differences between the prior art and the challenged claims, (3) the level of
`
`ordinary skill in the pertinent art, and (4) the existence of secondary considerations
`
`such as commercial success, long-felt but unresolved needs, failure of others.
`
`34.
`
`I understand that an obviousness evaluation can be based on a
`
`combination of multiple prior art references. I understand that the prior art references
`
`themselves may provide a suggestion, motivation, or reason to combine, but other
`
`times the nexus linking two or more prior art references is simple common sense. I
`
`further understand that an obviousness analysis recognizes that market demand,
`
`rather than scientific literature, often drives innovation, and that a motivation to
`
`combine references may be supplied by the direction of the marketplace.
`
`35.
`
`I understand that a motivation to combine references does not have to
`
`be the best option or the best way to combine the references for a POSITA to
`
`combine references, only that it be a suitable option from which the prior art does
`
`not teach away.
`
`
`
`12
`
`AHM, Exh. 1003, p. 15
`
`

`

`
`
`36.
`
`I understand that if a technique has been used to improve one device,
`
`and a POSITA would recognize that it would improve similar devices in the same
`
`way, using the technique is obvious unless its practical application is beyond his or
`
`her skill.
`
`37.
`
`I also understand that practical and common-sense considerations
`
`should guide a proper obviousness analysis, because familiar items may have
`
`obvious uses beyond their primary purposes. I further understand that a POSITA
`
`looking to overcome a problem will often be able to fit the teachings of multiple
`
`publications together like pieces of a puzzle, although the prior art need not be like
`
`two puzzle pieces that must fit perfectly together. I understand that an obviousness
`
`analysis therefore takes into account the inferences and creative steps that a POSITA
`
`would employ under the circumstances.
`
`38.
`
`I understand that a particular combination may be proven obvious by
`
`showing that it was obvious to try the combination. For example, when there is a
`
`design need or market pressure to solve a problem and there are a finite number of
`
`identified, predictable solutions, a POSITA has good reason to pursue the known
`
`options within his or her technical grasp because the result is likely the product not
`
`of innovation but of ordinary skill and common sense.
`
`39.
`
`I understand that the combination of familiar elements according to
`
`known methods may be proven obvious when it does no more than yield predictable
`
`
`
`13
`
`AHM, Exh. 1003, p. 16
`
`

`

`
`
`results. When a work is available in one field of endeavor, design incentives and
`
`other market forces can prompt variation of it, either in the same field or a different
`
`one. If a POSITA can implement a predictable variation, obviousness likely bars its
`
`patentability.
`
`40.
`
`In sum, my understanding is that prior art teachings are properly
`
`combined where a POSITA having the understanding and knowledge reflected in
`
`the prior art, would have been led to make the combination of elements recited in
`
`the claims.
`
`41. Under this analysis, the prior art references themselves, or any need or
`
`problem in the field of endeavor at the time of the invention, can provide a reason
`
`for combining the elements of multiple prior art references in the claimed manner.
`
`42.
`
`I have written this Declaration with the understanding that in an inter
`
`partes review unpatentability must be shown by a preponderance of evidence.
`
`VI. RELEVANT TIMEFRAME
`43. As mentioned above, I understand that claim construction and
`
`invalidity must be considered through the perspective of one of ordinary skill in the
`
`art at the time the invention was made.
`
`44.
`
`In this case, I see from the front of page of the ‘049 Patent that the
`
`earliest patent application leading to this patent was filed on April 24, 2002. Thus, I
`
`considered the level of ordinary skill in the art on April 24, 2002.
`
`
`
`14
`
`AHM, Exh. 1003, p. 17
`
`

`

`
`
`VII. LEVEL OF ORDINARY SKILL IN THE RELEVANT ART
`45.
`In determining the characteristics of a hypothetical person of ordinary
`
`skill in the art (“POSITA”) of the ‘049 Patent at the time of the claimed invention, I
`
`considered several things, including various prior art techniques relating to
`
`multiprocessor systems, the type of problems that such techniques gave rise to, and
`
`the rapidity with which innovations were made. I also considered the sophistication
`
`of the technologies involved, and the educational background and experience of
`
`those actively working in the field. I also considered the level of education that
`
`would be necessary to understand the ‘049 Patent. I also considered the prior art
`
`references discussed below that may indicate the level of skill in the relevant art.
`
`Finally, I placed myself back in the relevant period of time, and considered the
`
`academics, engineers, and graduate students that I had worked with in the field at
`
`the time. I came to the conclusion that the characteristics of a person of ordinary skill
`
`in the field of the art of the ‘049 Patent would have been a person with at least a
`
`bachelor’s degree in electrical or computer engineering, or a closely related scientific
`
`field such as computer science, and two years of work experience with computing
`
`systems or related fields (e.g., applications for control devices or embedded
`
`systems). A person with less education but more relevant practical experience may
`
`also meet this standard.
`
`
`
`15
`
`AHM, Exh. 1003, p. 18
`
`

`

`
`
`46.
`
`I was at least a person of ordinary skill in the art at the time of the
`
`alleged invention of the ‘049 Patent in 2002.
`
`VIII. TECHNOLOGY BACKGROUND
`47.
`I understand that analyzing the state of computing systems, which
`
`includes: distributed processor systems, fault-tolerant architectures, and fault
`
`identification/detection methods and technologies, during the years prior to the
`
`earliest possible priority date of the ‘049 Patent can provide valuable insight into
`
`what people of ordinary skill in the art were aware of at the time, and in what
`
`direction the industry was going.
`
`48. By the beginning of at least 1999 , and well before the priority date of
`
`the ‘049 Patent, all the technology at issue in the ‘049 Patent is broadly applied and
`
`well known by developers in the embedded computing industry. In my opinion, no
`
`individual elements of the ‘049 Patent’s claims were novel at the time of the alleged
`
`invention, and there was nothing novel about the manner in which those elements
`
`were combined in the claims. Further, there were no technological barriers to
`
`combining these elements to form the claimed invention. Indeed, combining these
`
`elements would have yielded predictable results.
`
`49. Specifically, the advent of and developments related to distributed
`
`processor systems, fault-tolerant architectures, and detection and identification of
`
`
`
`16
`
`AHM, Exh. 1003, p. 19
`
`

`

`
`
`faults, demonstrate elements associated with the ‘049 Patent, were well-known
`
`before the actual filing date of the ‘049 Patent.
`
`A. Fault-Tolerant Architectures and Distributed Processor
`Systems
`50. Fault-tolerant Architectures have been studied and developed for
`
`decades. Fault-tolerant computing techniques are used to keep the computer systems
`
`running in spite of one or more processors failures. The concept of fault tolerant is
`
`well known in many applications such as airplanes, industry, military, and now
`
`automotive. The decrease in cost and size of processors allowed for the use of fault-
`
`tolerant techniques to be used in more commercial applications, such as automotive
`
`electronics. Misbahuddin (Ex[1005]), Abstract, p. 277.
`
`51. Fault-tolerant architectures often involve ensuring that there is not a
`
`loss of operation of the system in the event of a failure within the system. The designs
`
`of these architectures can involve the use of distributed processor systems. A
`
`distributed processor system separates the applications to be operated or run by the
`
`system to discrete processors to isolate the potential failure of all or most
`
`applications to a limited number of applications. The advantages of using a
`
`distributed processor system in a fault-tolerant architecture is that inherent in the
`
`design of the distributed processor system is a level of fault-tolerance, because a
`
`failure of a single processor would not necessarily mean the failure of the system as
`
`
`
`17
`
`AHM, Exh. 1003, p. 20
`
`

`

`
`
`a whole. Unless that failed processor was running a critical application for operation
`
`of the system.
`
`B. Fault Identification and Detection
`52. Fault identification and detection methods have been known techniques
`
`for decades. In any system, including embedded computing systems, detections and
`
`identification of faults can be crucial for minimizing downtime and ensuring the
`
`operational status of the system. One exemplary method of fault detection is TTP/C
`
`(Time Triggered Protocol) which is a communication protocol specifically designed
`
`for safety critical systems.
`
`53. TTP/C provides fault tolerant communication by using various
`
`techniques. These include node architecture, replication of hardware elements,
`
`notification of the state of a node, and communication with other nodes in the
`
`system. Specifically, the node architecture is set up such that a TTP/C controller
`
`communicates to the network when a fault is detected in the node host. A Fault
`
`Tolerant Unit that replicates the structure of a node can be provided for redundancy
`
`in case the component fails.
`
`IX. CLAIM CONSTRUCTION
`54.
`In making this Declaration, I have been asked to consider the terms
`
`found in the claims of the ’049 patent according to the plain and ordinary meaning
`
`standard applied in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) for how
`
`
`
`18
`
`AHM, Exh. 1003, p. 21
`
`

`

`
`
`those terms would have been understood to a POSITA at the time of the claimed
`
`invention.
`
`55.
`
`I understand that in connection with a pending district court litigation,
`
`Petitioner and Patent Owner have provided claim constructions. In my analysis of
`
`the challenged patent and claims I have considered both party’s constructions and
`
`have applied these constructions, and have developed my opinions herein
`
`accordingly. For limitations not appearing below, I understand the plain and
`
`ordinary meaning should apply.
`
`Term/Phrase
`
`Petitioner’s Proposal
`
`Patent Owner’s Proposal
`
`“application”
`(claims 29, 35)
`
`“A method for
`configuring real-time
`vehicle applications in
`a distributed multi-
`processor system
`operating in a vehicle,
`comprising” (claim 29)
`“distributed multi-
`processor system”
`(claim 29)
`
`
`“software, other than
`operating system and
`support software, that
`performs a task to fulfill a
`specific need of a user”
`Preamble is limiting.
`
`
`No construction necessary.
`Plain and ordinary meaning.
`
`
`No construction necessary.
`Plain and ordinary meaning.
`
`
`“a multiprocessor system
`in which the processing
`tasks for applications can
`be distributed among
`multiple processors”
`
`“system consisting of two or
`more processors, connected
`so that information can be
`exchanged”
`
`
`
`19
`
`AHM, Exh. 1003, p. 22
`
`

`

`
`
`The steps of “operating
`task manager” and
`“operating a
`configuration manager”
`must be performed in the
`order recited.
` “make the stored critical
`vehicle application from
`the memory available in
`an address space for
`execution by another
`processor”
`
`No construction necessary.
`
`
`“make the critical vehicle
`application available for
`execution by another
`processor”
`
`
`Sequence of steps in
`claim 29
`
`“downloading the
`stored critical vehicle
`application … to
`another processor”
`(claim 35)
`
`
`
`
`56. Further, I understand that the Petitioner has asserted the plain and
`
`ordinary meaning of the other claim terms for purposes of this IPR. As discussed in
`
`more detail below, I understand that Petitioner and Patent Owner might disagree on
`
`the plain and ordinary meaning of the terms ““using the task manager. . .” and “using
`
`the configuration manager.” I understand that the Petition proposes that the task
`
`manager is used to perform the underlying task, but it does not require that they
`
`exclusively perform the steps without contribution from other entitie