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`US 9,357,631 B2
`(10) Patent No.:
`a2) United States Patent
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`Hoetal.
`(45) Date of Patent:
`May31, 2016
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`US009357631B2
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`(54) FLEXIBLE PRINTED CIRCUIT BOARD AND
`METHOD FOR MAKING SAME
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`(71)
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`Applicants:
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`(72)
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`Inventors:
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`(73)
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`Assignees:
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`(*)
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`Notice:
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`FukuiPrecision Component
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`(Shenzhen) Co., Ltd., Shenzhen (CN);
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`Zhen Ding Technology Co., Ltd.,
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`Tayuan, Taoyuan (TW)
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`Ming-Jaan Ho, New Taipei (TW);
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`Xian-Qin Hu, Shenzhen (CN);
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`Shao-Hua Wang, Shenzhen (CN);
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`Fu-Yun Shen, Shenzhen (CN)
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`FukuiPrecision Component
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`(Shenzhen) Co., Ltd., Shenzhen (CN);
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`Zhen Ding Technology Co., Ltd.,
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`Tayuan, Taoyuan (TW)
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`Subject to any disclaimer, the term ofthis
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`patent is extended or adjusted under 35
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`U.S.C. 154(b) by 2 days.
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`Appl. No.:
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`14/162,769
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`Filed:
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`Jan. 24, 2014
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`Prior Publication Data
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`US 2015/0034364 Al
`Feb. 5, 2015
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`Foreign Application Priority Data
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`(21)
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`(22)
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`(65)
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`(30)
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`(51)
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`(52)
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`2203/0221 (2013.01); HO5K 2203/095
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`(2013.01); HO5K 2203/1194 (2013.01)
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`(58) Field of Classification Search
`None
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`See application file for complete search history.
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`References Cited
`U.S. PATENT DOCUMENTS
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`(56)
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`4,715,894 A * 12/1987 Holtzman ............. HOSK 3/244
`106/1.22
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`5,065,228 A *
`11/1991 Fosteretal. oo. 257/698
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`5,897,188 A *
`4/1999 Sasuga wo... G02F 1/133308
`349/149
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`6/2001 Kuramochi............ HOSK 1/024
`174/254
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`8/2001 Hunt oe. HO1G 4/085
`29/2541
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`4/2002 Yamazaki
`........... HOIL 27/1281
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`257/59
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`2002/0176989 AL* 11/2002 Knudsen ........000.. HO1G 4/206
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`428/408
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`5/2003 Maruyama.......... HOIL 27/1214
`438/455
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`6/2003 Adachi HOSK 1/028
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`174/254
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`6,252,176 BL*
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`6,270,835 BL*
`2002/0043660 AL*
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`2003/0082889 Al*
`2003/0116343 AL*
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`FOREIGN PATENT DOCUMENTS
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`(Continued)
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`TW
`TW
`TW
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`10/2004
`248190 M
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`3/2009
`200910569 A
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`2/2012
`201206332 A
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`Primary Examiner — Jeremy C Norris
`Assistant Examiner — Muhammed Azam
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`(74) Attorney, Agent, or Firm —Novak Druce Connolly
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`Bove + Quigg LLP
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`ABSTRACT
`(57)
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`An FPCBincludesa flexible base, a wiring layer formed on a
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`top surface ofthe base, a covering layer formedon the wiring
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`layer, and a shielding layer formed on a portion of the cover-
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`ing layer. The wiring layer includes a grounding line. The
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`covering layer defines an opening to expose the grounding
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`line to the outside. A portion ofthe shieldinglayerfills into the
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`opening. The shielding layer is electrically connected to the
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`grounding line through the opening.
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`12 Claims, 11 Drawing Sheets
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`Jul. 31, 2013
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`(ON) eee 2013 1 03277488
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`Int. Cl.
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`HO5K 1/02
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`HO5K 1/03
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`HO5K 3/28
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`US. Cl.
`
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`CPC ou.
`
`
`(2006.01)
`(2006.01)
`(2006.01)
`
`
`
`
`
`
`
`
`
`
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`.. HOSK 1/0215 (2013.01); HOSK 1/0216
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`(2013.01); HOSK 1/0393 (2013.01); HOSK
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`3/288 (2013.01); HOSK 2201/0116 (2013.01):
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`HO5K 2201/0145 (2013.01); HOSK 2201/0154
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`(2013.01); HOSK 2201/2009 (2013.01); HOSK
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`100
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`“
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`23
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` LULLBEEN,
`im DIN
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`EDN
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`Page | of 15
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`SAMSUNG EXHIBIT 1012
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`Page 1 of 15
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`SAMSUNG EXHIBIT 1012
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`

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`US 9,357,631 B2
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`Page 2
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`2010/0170701 Al*
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`2011/0036619 AL*
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`2008/0259575 AL* 10/2008 Tanimuraetal... 361/749
`2010/0155109 Al*
`6/2010 Takahashi
`.......0.0... HOSK 1/028
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`174/254
`;
`7/2010 Takeuchi oc . B32B 7/12
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`174/254
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`2/2011 Uratsuji ou. HOS5K 1/0218
`174/254
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`4/2013 Ishiietal. wo. 174/254
`2013/0098665 AL*
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`2013/0341072 AL* 12/2013 Linetal.
`.........
`we 174/254
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`2014/0048310 Al*
`2/2014 Montevirgen et al.
`........ 174/250
`.
`.
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`* cited by examiner
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`(56)
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`References Cited
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`U.S. PATENT DOCUMENTS
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`2003/0206376 Al* 11/2003 Enpelding.............. G11B 5/486
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`360/245.9
`7/2005 Benson oe 174/255
`2005/0155788 AL*
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`7/2005 Kogureetal. oo... 361/720
`2005/0162835 Al*
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`6/2008 Fujikawa.
`.......... G02F 1/136227
`2008/0151151 Al*
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`349/106
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`6/2008 Akimoto 0... HOLL 21/263
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`430/313
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`2008/0153039 Al*
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`U.S. Patent
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`May31, 2016
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`Sheet 1 of 11
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`US 9,357,631 B2
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`FIG,
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`1
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`16
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`17
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`\
`14
`122
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`"yy122
`ssLOANEEENNEAN
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`DRT
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`FIG, e
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`U.S. Patent
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`Sheet 3 of 11
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`US 9,357,631 B2
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`12
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`122
`| 122
`NENPNASPTINNOPION
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`142
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`16 ‘
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`FIG. 3
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`Sheet 4 of 11
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`US 9,357,631 B2
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`MUUSeUy
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`NibnbaSiSSSS
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`FIG, 4
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`Sheet 5 of 11
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`US 9,357,631 B2
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`\BANTDKAOLER
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`SReePDINEZINS\N
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`FIG. 3
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`Sheet 6 of 11
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`US 9,357,631 B2
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`SERS
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`NheTEPEELELETTELLL
`Ne
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`CEA
`KEANEAN
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`FIG, 6
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`Sheet 7 of 11
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`US 9,357,631 B2
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`oR
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`a
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`NASPparNonNiraNXgSN
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`FIG, 7
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`18
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`ee
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`SUESSSSSSSSSSSSS
`BS.POE
`Ny
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`NZED
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`FIG, 8
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`Sheet 9 of 11
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`US 9,357,631 B2
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`23
`o_o
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`ee
`24 25
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`WY PELEPEL
`SUES
`SU
`ihoPNDNEN>
`NY
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`LUBETST
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`FIG, 9
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`100.
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`23
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`26
`22
`18
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`24 25
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`“ittheeyett
`phonaanteborerapebereeetersterien|||peers
`URSSYRTTTSDNPEEEISSWPNPN)
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`WeLLNEARERNEERNEEA
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`FIG. 10
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`US 9,357,631 B2
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`c6
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`FIG,
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`1
`FLEXIBLE PRINTED CIRCUIT BOARD AND
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`METHOD FOR MAKING SAME
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`US 9,357,631 B2
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`2
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`onthefirst wiring layer 12. In other embodiment, the opening
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`142 can be processed bya layer ablation process.
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`FIG. 4 showsthat a first seed layer 18 and a second seed
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`layer 19 are formed. Thefirst seed layer 18 covers the first
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`covering layer 14, inner surfaces of each of the openings 142,
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`1. Technical Field
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`and portions of the grounding lines 122 exposed through the
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`openings 142. The second seed layer 19 covers the second
`The present disclosure relates to technologies for manu-
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`covering layer 14. In one embodiment,thefirst seed layer 18
`facturing printed circuit boards (PCBs), and particularly to a
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`and the second seed layer 19 are formed by an electroless
`flexible PCB (FPCB) having a relatively low cost, and a
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`process, such as a chemicalelectroplating process, and the
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`method for making the FPCB.
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`first seed layer 18 and the second seed layer 19 are made of
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`2. Description of Related Art
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`copper.
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`With the progress of technology, more and more concen-
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`Before thefirst seed layer 18 and the second seed layer 19
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`trated circuits are arranged on FPCBs. However, the concen-
`are formed, surfaces of the flexible wiring board 10 to be
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`trated circuits on the FPCB may induce electro-magnetic
`coveredbythefirst seed layer 18 and the secondseed layer 19
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`interference (EMI), which inhibits performance ofthe FPCB.
`undergo a pretreatment process. The pretreatment process
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`A conductive fabric may be employed to shield the EMI.
`removespollutants from the surfaces, thereby enhancing an
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`However, the conductive fabric usually has a complex struc-
`adhesive force ofthefirst seed layer 18 and the second seed
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`ture andahigh cost, which increases manufacturing difficulty
`layer 19 on the corresponding surfaces of the flexible wiring
`20
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`and costs of the FPCB.
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`board 10. The pretreatment process can be a plasma treatment
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`Therefore, what are needed are an FPCB and a methodfor
`process, a pumice process, or other suitable process.
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`making the FPCB addressing the limitations described.
`FIG. 5 showsthat a first photoresist layer 20 is formed on
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`the first seed layer 18, and a second photoresist layer 21 is
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`formed on the secondseed layer 19. In one embodiment, the
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`first photoresist layer 20 and the second photoresist layer 21
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`are made of a photosensitive material.
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`FIG.6 showsthata portionofthe first photoresist layer 20
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`on the first seed layer 18 in the EMI shielding area 16 is
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`removed. Thus, a portion ofthe first seed layer 18 in the EMI
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`shielding area 16 is exposedto the outside. The portion ofthe
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`first photoresist layer 20 is removed by an exposing/develop-
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`ing process.
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`FIG. 7 shows that a shielding layer 22 is formed on the
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`portion ofthe first seed layer 18 exposed to the outside. The
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`openings 142 are filled with the shielding layer 22. In one
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`embodiment, the shielding layer 22 is formed by a electro-
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`plating process, and the shielding layer 22 is made of copper.
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`FIG. 8 showsthat the first photoresist layer 20 and the
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`second photoresist layer 21 are removed.
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`FIG. 9 showsthatthefirst seed layer 18 in the common area
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`17, as well as the second seed layer 19, are removed. In one
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`embodiment,the first seed layer 18 and the second seed layer
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`19 are removed by a micro-etching process. The first seed
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`layer 18 in the EMIshielding area, together with the shielding
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`layer 22, form an EMIshielding structure 23. The shielding
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`layer 22 and the first seed layer 18 serve as EMI shielding
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`layers 24 ofthe EMIshielding structure 23. The openings 142
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`serve as vias 25 forelectrically connecting the EMIshielding
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`structure 23 to the grounding lines 122.
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`FIGS. 10-11 showthat a solderresist layer 26 is formed on
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`the EMIshielding layer 24 to form a final FPCB 100, wherein
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`FIG.11 is a plan view ofthe FPCBofthe FIG. 10. The solder
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`resist layer 26 protects the EMIshielding layer 24 from exter-
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`nal impact. In one embodiment, the solder resist layer 26
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`covers a top surface and peripheral surfaces of the EMI
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`shielding layer 24.
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`As described above, the EMI shielding structure 23 is
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`formed onthe first covering layer 14. However,it is under-
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`stood that in other embodiments, the EMIshielding structure
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`23 can also be formed on the second covering layer 15.
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`Furthermore, a shape and size of the EMIshielding area 16
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`can be adjusted according to different requirements. For
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`example, the EMIshielding structure 23 can be formed on an
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`entire surface of the first covering layer 14 and/or on the
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`second covering layer 15.
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`Itis believed that the present embodimentsandtheir advan-
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`tages will be understood from the foregoing description, and
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`The disclosure is illustrated by way of example and not by
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`wayoflimitation in the figures ofthe accompanying drawings
`in which like references indicate similar elements. It should
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`be noted that references to “an” or “one” embodimentin this
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`disclosure are not necessarily to the same embodiment, and
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`such references mean “at least one.” The references “a plu-
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`rality ofand “a number of’ mean“atleast two.”
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`FIGS. 1-11 illustrate a method for making a flexible printed
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`circuit board (FPCB) 100.
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`FIGS. 1-2 show that a flexible wiring board 10 is provided,
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`wherein FIG.2 is a cross section view ofthe flexible wiring
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`board 10 of FIG. 1 taken alonglineIJ-I. The flexible wiring
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`board 10 includes a flexible base 11, a first wiring layer 12
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`formed on a top surface of the base 11, a second wiring layer
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`13 formed on a bottom surface of the base 11, a first covering
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`layer 14 covering the first wiring layer 12, and a second
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`covering layer 15 covering the second wiring layer 13. In one
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`embodiment, the base 11 is made from flexible material, such
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`as polyimide(PI), polyethylene terephthalate (PET), or poly-
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`ethylene naphthalate (PEN). Alternatively, the flexible wiring
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`board 10 can be a multi-layer board, which includes a number
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`of alternately arranged bases and wiring layers.
`In one
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`embodiment, the first wiring layer 12 and the second wiring
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`layer 13 are made of copper and formedbya selective etching
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`process. The flexible wiring board 10 includes an EMIshield-
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`ing area 16 and a commonarea 17 outside the shielding area
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`16. Portions of the first wiring layer 12 within the shielding
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`area 16 are grounding lines 122.
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`FIG. 3 showsthat a number of openings 142 are defined in
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`the first covering layer 14 within the EMIshielding area 16.
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`Someof the grounding lines 122 are exposedto the outside
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`through the openings 142. In one embodiment, the openings
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`142 can be formed by a punching process before laminating
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`BACKGROUND
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`BRIEF DESCRIPTION OF THE DRAWING
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`The components of the drawing are not necessarily drawn
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`to scale, the emphasis instead being placed uponclearly illus-
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`trating the principles of the embodiments of the present dis-
`closure.
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`FIGS. 1-11 are schematic views of an embodiment of a
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`method for making an FPCB.
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`DETAILED DESCRIPTION
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`25
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`Page 14 of 15
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`Page 14 of 15
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`

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`US 9,357,631 B2
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`3
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`it will be apparentthat various changes may be madethereto
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`without departing from the spirit and scope of the disclosure
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`or sacrificing all of its material advantages, the examples
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`hereinbefore described merely being exemplary embodi-
`ments of the disclosure.
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`4
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`5. The FPCBof claim 1, wherein a material of the base is
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`selected from a group consisting of polyimide, polyethylene
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`terephthalate, and polyethylene naphthalate.
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`6. The FPCBof claim 1, comprising:
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`a second wiring layer formed on anotherside surface ofthe
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`base facing away from thefirst wiring layer; and
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`a second covering layer covering the second wiring layer.
`Whatis claimed is:
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`7. The FPCB of claim 1, wherein the flexible base com-
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`1. A flexible printed circuit board (FPCB), comprising:
`prises a numberofalternately arranged bases and wiring
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`a flexible base;
`layers.
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`a first wiring layer formed onaside surface of the base, the
`8. The FPCB of claim 7, wherein the FPCB comprises a
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`first wiring layer comprising a grounding line;afirst
`first seed layer formed between the shielding layer and the
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`covering layer covering the first wiring layer, the first
`first covering layer, the shielding layer is electrically con-
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`nected to the grounding line by thefirst seed layer.
`covering layer defining an opening exposing the ground-
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`9. The FPCBof claim 8, whereinthefirst seed layer covers
`ing line; and
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`a portion ofthe first cover layer, inner surface of the opening,
`a shielding layer is formed onaportion ofthefirst covering
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`and a portion of the groundlines exposed through the open-
`layer by an electroplating process, the opening filled
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`ing.
`with the shielding layer, the shielding layer being elec-
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`10. The FPCB of claim 9, wherein the FPCB comprises a
`trically connected to the grounding line through the
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`solderresist layer covering the shielding layer.
`opening.
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`11. The FPCBof claim 9, wherein a material of the baseis
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`2. The FPCB of claim 1, wherein the FPCB comprises a
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`selected from a group consisting of polyimide, polyethylene
`solderresist layer covering the shielding layer.
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`terephthalate, and polyethylene naphthalate.
`3. The FPCB of claim 1, wherein the FPCB comprises a
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`12. The FPCBof claim 9, comprising:
`first seed layer formed between the shielding layer and the
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`a second wiring layer formed on anotherside surface ofthe
`first covering layer, the shielding layer is electrically con-
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`base facing away from thefirst wiring layer; and
`nected to the groundingline by thefirst seed layer.
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`a second covering layer covering the second wiring layer.
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`4. The FPCBofclaim 3, wherein a materialofthefirst seed
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`layer is copper.
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`20
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`Page 15 of 15
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`Page 15 of 15
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