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I i 7 tIi\[ !jiit'i F
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`THE OXFORD SERIES IN ELECTRICAL AND COMPUTER
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`Allen and Holberg, CMOS Analog Circuit Design, 2nd Edition
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`Campbell, The Science and Engineering ofMicroelectronic Fabrication, 2nd Edition
`Chen, Digital Signal Processing
`Chen, Linear System Theory and Design, 3rd Edition
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`Comer, Digital Logic and State Machine Design, 3rd Edition
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`Cooper and McGilem, Probabilistic Methods ofSignal and SystemAnalysts, 3rd Edition
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`Dimitrijev, Understanding Semiconductor Devices
`Fortney, Principles ofElectronics: Analog & Digital
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`Martin, Digital Integrated Circail Design
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`Sadiku, dlements ofElectromagnetics, 3rd Edition
`Santina, Stubbered, aud Hostetter, Digited Control System Design, 2nd Edition
`Sarina, fatroductionto Electrical Engineering
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`Schwarz and Oldham, Electrical Engineering: An introduction, 2nd Edition
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`Sedra and Smith, Microelectronic Circuits,
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`Stefani, Savant, Shahian, and Hosteuter, Design ofFeedback Control Systems, 4th Edition
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`Van Valkenburg, Analog Filter Design
`Warner and Grung, Semicanductor Device Electronics
`Wolovich, Automatic Control Systems
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`Zak, Systems and Control
`
`IFTH EDITION
`MICROELECTRONIC
`CIRCUITS
`
`Adel S. Sedra
`University of Waterloo
`
`Kenneth C. Smith
`University of Toronto
`
`Oxford
`New York
`OXFORD UNIVERSITY PRESS
`2004
`
`APPLE ET AL. EXHIBIT 1006
`
`APPLE ET AL. EXHIBIT 1006
`
`1
`
`

`

`
`ahbon—
`
`PREFACE xxiii
`
`
`PART! DEVICES AND BASIC CIRCUITS 2
`Introduction to Electronics
`5
`Operational Amplifiers
`63
`Diodes
`139
`MOSField-Effect Transistors (MOSFETs)
`Bipolar Junction Transistors (BJTs)
`377
`
`235
`
`ANALOG AND DIGITAL INTEGRATED
`
`PART II CIRCUITS 542
`
`Single-Stage Integrated-Circuit Amplifiers
`Differential and Multistage Amplifiers
`687
`Feedback 791
`Operational-Amplifier and Data-Converter Circuits
`Digital CMOS Logic Circuits
`949
`
`545
`
`9
`10
`
`877
`
`@| PART II SELECTED TOPICS 1010
`11
`Memory and AdvancedDigital Circuits
`1013
`12
`Filters and Tuned Amplifiers
`1083
`13
`Signal Generators and Waveform-Shaping Circuits
`14
`Output Stages and Power Amplifiers
`1229
`APPENDIXES
`A VLS! Fabrication Technology A-?
`B Two-Port Network Parameters B-1
`C Some Useful Network Theorems C-f
`D Single-Time-Constant Circuits D-?
`E
` s-Domain Analysis: Poles, Zeros, and Bode Plots &-f
`F Bibliography F-7
`G Standard Resistance Values and Unit Prefixes G-1
`H Answers to Selected Problems H-1
`
`1165
`
`INDEX IN-1
`
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`
`ISBN 0-19-514252-7
`
`Cover Illustration: The chip shownis an inside view of a mass-produced surface-micromachined gyroscope sys-
`tem, integrated on a 3mmby 3mmdie, and using a standard 3-m 2-V BiCMOSprocess suited for the harsh auto-
`motive cnvironment. This first single-chip gyroscopic sensor,
`in which micro-mechanical and electronic
`components are intimately entwined on the samechip, provides unprecedented performance through the use of a
`collection of precision-directed techniqucs, including emphasis on differential operation (both mechanically and
`electronically) bolstered by trimmable thin-film resistive components. This tiny, robust, low-power, angular-rate-
`to-voltage transducer, having a sensitivity of 12.5m¥V/°/s and resolution of 0.015%s (or 50°/hour) has a myriad of
`applications—including automotive skid coutrol and rollover detection, dead reckoning for GPS backup and robot
`motion conwol, and camera-ficld stabilization. The complete gyroscope package, weighing 1/3 gram with a yol-
`ume of 1/6 cubic centimeter, uses 30mW from a 5-V supply. Source: John A. Geen, Steven J. Sherman, John lt
`Chang. Stephen R. Lewis; Single-chip surfacc micromachined integrated Gyroscope with 50°/h Allan deviation,
`IFEE Journal of Solid-State Circuits, vol. 37, pp. 1860-1866, December 2002. (Originally presented at ISSCC
`2002.) Photographed by John Chang, provided by John Gcen, both of Analog Devices, Micromachine Products
`Division, Cambridge, MA, USA.
`Printing number: 987654321
`Printed in the United States of America
`on acid-free paper
`
`2
`
`

`

`PREFACE xxiii
`
`2 Operational Amplifiers
`Introduction
`63
`64
`The Ideal Op Amp
`64
`2.11 The Op-Amp Terminals
`2.1.2 Function and Charecteristics ot the deal
`OpAmp
`65
`2.1.3 Differential and Commou-Mode Signals
`The Inverting Configuration
`68
`2.2.1 The Closed-Loop Gain
`69
`2,
`
`77
`Erfect of Kinite Open-Loop Gain
`2.
`-3 Input and Output Resistances
`
`72
`S PART! DEVICES AND BASIC CIRCUITS 2
`2.2.4 An important Application—The Weighted Summer
`Introduction to Electronics

`1
`The Noninverting Configuration
`77
`Introduction
`5
`2.3.1 The Closed-Loop Gain
`77
`2.3.2 Characteristics of the Noninverting
`Signals
`6
`Configuration
`78
`Frequency Spectrum of Signals
`2.3.3. Effect of Finite Open-Loop Gain
`2.3.4 The Voltage Follower
`79
`Analog and Digital Signals
`10
`Difference Amplifiers
`8?
`Arplifiers
`43
`
`14.1 Signal Amplification
`13
`82
`2.4.1 4 Single Op-AmpDifference Amplifier
`1.4.2 Amplitier Circuit Symbol 4
`2.4.2 A Superior Circuit—TheInstrementation Amplifier
`4.3 Vollage Gain
`£4
`Effect of Finite Open-Loop Gain and Bandwidth on
`15
`1.4.4 Power Gain and Current Gain
`Circuit Performance
`8&9
`15
`1.4.5 Expressing Gain in Decibels
`2.3.1 Frequency Dependence of the Open-Loop Gain
`
`76
`1.4.6 The Amplifier Power Supplies
`2.5.2 Krequency Response of Closed-Loop Amplifiers
`1.4.7 Amplifier Saturation
`18
`Large-Signal Operation of Op Amps
`94
`1.4.8 Nonlincar Transter Characteristics and Biasing
`2.6.1 Output Voltage Saturation
`94
`L4.9 Symbol Conyention
`22
`2.6.2 Outpui Current Limits
`94
`Slew Rate
`95
`Circuit Models for Amplifiers
`23
`
`2.6.4 Vull-Power Bandwidih
`97
`1.5.1 Vohage Amplitiers
`23
`1.5.2 Cascaded Amplifiers
`25
`DC Imperfections
`98
`1.5.3 Other Amplifier Types
`27
`98
`27.1 Offset Voltage
`1.5.4 Relationships Between the Four Amplifier Models
`202
`2.7.2 loput Bias and Offset Currents
`Jrequency Response of Amplifiers
`34
`Integrators and Differentiators
`105
`1.6.1 Measuringthe Amplifier Frequeacy Response
`32
`2.8.1 The inverting Configuration with General impedances
`1.6.2 Amplificr Bandwidth
`32
`2.8.2 The Inverting Integrator 07
`33
`1.6.3 Evaluating the Frequency Resoouse of Amplifiers
`2.8.3 The Op-Amp Diffcrentiator
`1/2
`1.6.4 Single-Time-Constant Networks
`33
`The SPICE Op-Amp Model and Simulation Examples
`1.6.5 Classification of Ampli‘iers Based un Frequency Response
`2.9.1 Linear Macromodel
`225
`2.9.2 Nonlinear Macromodei 19
`Digital Logic Inverters
`40
`1,7.1 Function of the Inverter
`40
`
`Summary
`722
`42
`1.7.2 The Voltage Transler Characteristic (VTC}
`Problems
`123
`Noise Margins=42
`1.7.4 The ldeal VIC 43
`
`17.3 Inverter Implementation
`43
`739
`3 Diodes
`1.7.6 PowerDissipation
`45
`£39
`Introduction
`1.7.7 Propagation Delay
`46
`Cireuil Simulation Using SPICE 49
`146
`The Ideal Diode
`Summary
`50
`#40
`3.1.1 Current-Voltage Characteristic
`Problems
`51
`147
`3.1.2 A Simple Application: The Rectifier
`3.1.3 Another Application: Diode Logic Gates
`
`DETAILED TABLE OF CONTENTS ae vii
`
`63
`
`21
`
`67
`
`78
`
`75
`
`85
`
`8&9
`97
`
`105
`
`.
`114
`
`
`
`ROE
`
`7
`
`19
`
`27
`
`38
`
`vi
`
`34
`
`144
`
`3
`
`

`

`iirc_OO—————————————————rrr
`
`
`
`DETAILCD TABLE OF CONTENTS
`
`3.2
`
`3.3
`
`3.7
`
`3.8
`
`3.9
`
`754
`£54
`
`Terminat Characteristics of Junction Diodes
`4 MOSField-Effect Transistors (MOSFETs)
`3.2.1 The Forward-Bias Region
`148
`
`3.2.2 The Reverse-Bias Region
`#52
`Introduction 235
`32.3 ‘The Breakdown Region
`152
`236
`4.1 Device Structure and Physical Operation
`743
`Modeling the Diode Forward Characteristic
`
`4.11 Device Suucture
`236
`3.2.1 The Exponential Model
`753
`
`3
`238
`4.1.2 Operation with No Gate Voltage
`Graphical Analysis
`Using the Exponential Model
`4.1.3 Creating a Channel for Current Flow 238
`Iterative Analysis Using the Exponential Model
`
`4.1.4 Applyitig a Suvall ty,
`239
`3.34 The Needfor Rapid Analysis
`755
`3.3.5 The Piecewise-Linear Model
`155
`4.1.5 Operation as tps 1s Increased
`242
`4.1.6 Derivation of the ig-vyy Relationship
`3.3.6
`‘The Constan-Voltage-Drop Model
`3.3.7 ‘The [dedl-Diode Model
`758
`4.4.7 The p-Chainel MOSFEL 247
`4.1.8 Complementary MOS or CMOS
`247
`33:8 The Small-Signal Model
`739
`4.1.9 Operating te MOS ‘Iansistor in the Subthreshold Region
`3.3.9 Use of the Diode Forward Drop in
`Voltage Regulation
`£63
`4.2 Curtent-Voltage Characteristics
`248
`3.3.10 Summary
`165
`4.2.1 Circuit Symbol
`248
`4.2.2 ‘The ip—tps Characteristics
`249
`Operationin the Reverse Breakdown Region—
`Zener Diodes
`167
`253
`4.2.3 Finite Output Resistance in Saturation
`1467
`2.4.1 Specifying aud Modeling the Zener Diode
`4.2.4 Characteristics of the »-Channel MOSTET=256
`3.4.2 Use of the Zener as a Shunt Regulator
`{68
`4.2.5 The Role of the Sudstrate—The Bouy Cifect
`258
`
`
`3.4.3 Temperature Rflecis
`170
`4.2.6 Temperature Fitecis
`259
`3.44 A Final Remark
`171
`44.2.7 Breakdown and Input Protection
`259
`Rectifier Civeuits
`772
`42.8 Summary
`260
`172
`3.5.1 The Hall-Wave Rectitier
`4.3 MOSFET Circuits at DC 262
`174
`3.5.2 The Full-Wave Rectilier
`270
`4.4 The MOSPFTas an Amplitier and as a Switch
`3.5.3 The Bridge Reetilier
`£76
`4.4.1 Large-Signal Operation—Lhe Transter Characteristic|272
`
`3.5.4 The Rectifier with a Filter Capacitor—
`4.4.2 Graphical Derivation
`of the Fransfer Characteristic
`273
`The Peak Rectifier
`£77
`4.4.3 Operation asa Switch
`274
`3.5.5 Precision Hall-Wave RecuiGer—
`1.4.4 Operation as a Linear Amplifier
`274
`The Super Diode
`1.43
`4.4.5 Analytical Fxpressions for the Transfer Characteristic
`144
`Limiting and Clamping Citeuits
`44.6 A Final Remark on Biasing 28
`3.6.1 Limiter Circuits
`184
`4.5 Biasing in MOS Amplifier Circuits
`280
`2 The Clamped Capacitor or DC Restorer
`4.5.1 Biasing by Fixing Vgg
`280
`3 The Voltege Doubler
`189
`
`45.2 Biasing by Mixing Vg and Connecting a Resistance
`inthe Source
`287
`Physical Operation of Diodes
`190
`294
`3.7.1 Basic Semivonductor Concepts
`284
`45.3 Biasing Using a Drain-to-Gute Feedback Resislor
`796
`3.7.2 The pn Juncuon Under Open-Circuit Conditions
`45.4 Biasing Using a Constant-Current Source=285
`45.5
`A Final Remack
`
`287
`3.7.3 The pr Junction Under Keverse-Bias Conditions
`199
`3.7.4 The paJunction in the Breakdown Region
`243
`4.6 Small-Signal Operation and Models
`287
`3.7.5 The pr Junction Under Forward-Bias.
`4.6.1 ‘The DU Bias Point
`287
`Conditions
`204
`288
`4.6.2
`The Signal Current in the Deain Terminal
`3.7.6 Summary
`208
`4.6.3 The Voltage Gait
`289
`Special Diade Types
`209
`
`4.6.4 Separating the DC Analysis
`and the Signal Analysis
`3.8.1 The Schottky-Burricr Diode (SBD)
`
`
`4.6.5 Small-Sigual Equivalent-Circuit Models
`290
`3.8.2 Varactors
`2/0
`4.6.6 ‘The Transconductance g,,
`292
`3.8.3 Photodiodes
`220
`4.6.7 Lhe T Equivalent-Cirevit Model
`295
`212
`3.8.4 Light-Emitting Diodes (LEDs)
`4.68 Modeling the Body Elect
`296
`‘The SPICE Diode Model and Simulation Examples
`46.9 Summary
`297
`3.9.1 The Diode Model
`272
`4.7 Single-Stage MOS Amplifiers
`299
`3.9.2 The Zeuet Diode Model
`2/3
`.7.1 The Basic Structure
`299
`Summary
`247
`4.7.2 Characterizing Amplifiers
`30%
`Probiems
`248
`306
`4.7.3 The Common-Source (C5S} Amplifier
`4.7.4 The Common-Source Amplifier with a Source Resisiance
`
`147
`
`157
`
`187
`
`210
`
`242
`
`Sx
`DETAILED TABLE OF CONTENTS we
`235
`
`
`
`243
`
`248
`
`275
`
`290
`
`‘
`
`309
`
`4
`
`

`

`339
`345
`
`
`436
`$.5 Biasing in BJT Aunplifier Ciccuils
`377
`Amplifier
`4.7.3 ‘The Common-Gate (CG)
`5.5.1 The Classical Discrete-Circuit Bias
`47.6 The Cosunon-Drain or Source-Hollower Amplifier
`
`Arrangememt
`436
`Summary and Comparisons
`4.7.7
`378
`Arangement
`440
`35.2 A Two-Power-Supply Version of the Cussical Bins
`4.8 The MOSFETInternal Capacitances and High-Frequency Model
`4.8.1 ‘he Gate Capacitive Elect
`327
` 5.3 Biasing Using a Collector-to-Rase Feedback Resistar
`48.2 The Iunetion Capacttances
`322
`4 Biasing Using a Constant-Currenr Source
`442
`4.8.3 The High-Frequency MOSFET Model
`322
`
`4.6 Small-Signal Operation and Models
`443
`4.8.4 The MOSFET Unity-Gain Hrequency(f) 324
`5.6.1 The Collector Curent and the
`4.3.5 Summary
`325
`Transcomtuctance
`443
`49 Fre
`R
`;
`.
`5.6.2 The Rase Current and the Input Resistance
`tequency Response of the CS Amplifier
`athe Base
`445
`4.9.1 The'three Frequency Bands
`326
`5.6.3 The Emitter Current and the Input Resistance
`49.2 The High-Frequency Response
`328
`atthe Emitter
`446
`4.9.3 The Low-Frequency Response
`332
`5.6.4 Voltage Gain
`447
`494 A¥inal Remark
`336
`5.6.5 Separating the Signal und the DC Quantities
`4.10 The CMOS Digilal Logic Inverter
`336
`The Hybrid- Model
`448
`4.10.1 Circuit Operation
`337
`
`.6.7
`‘The T Model
`449
`4.10.2 The Voltage Transfer Characteristic
`5.6.8 Application of the Small-Sigual Equivalenl Circuits
`4.10.3 Dynamic Operation
`342
`5.6.9 Performing Small-Signal Analysis Directlyon the
`4.10.4 Current Plow and Power Dissipation
`_—
`Circuit Diagram 457
`416.5 Summary
`346
`5.6.10 Augmenting the Small-Sigual Mudels to Account
`for the Rarly Rffect
`457
`346
`4.11 The Depleton-Type MOSLLIL
`5.6.11 Summary
`458
`4.12 The SPICE MOSFET Model and Simulation Example
`3.7 Single-Stage BJT Amplifiers
`460
`4.12.| MOSFET Models
`354
`3.7.1 The Basic Structure
`460
`4.12.2 MOSPELModel Parameters
`352
`
`467
`2 Characterizing BJT Amplifiers
`Summary
`359
`467
`3.7.2 ‘he Common-Emitter (CE) Amplifier
`Problems
`360
`
`4 The Common-Emitter Amplifier with an Emitter
`Resistance=470
`5,
`7.4 The Common-Base (CR) Amplifier
`475
`5 Bipolar Junction Transistors (BJTs)
`377
`5.7.6 The Common-Collector (CC) Amplifier or
`Emitter Follower
`478
`Introduction
`377
`5.7.7 Summary and Comparisons
`483
`378
`8.1 Device Structure and Physical Operation
`5.8 The BJT Internal Capacitances and High-Frequency Model
`378
`5.1.1 Simplified Structure and Modes of Operation
`
`5.8.1 The Base-Charging or Diffusion Capacitance C,
`486
`2 Qpetalion of the apa Transistor in the Active Mode
`3.8.2 The Base Emitter Junction Capacitance C,
`986
`5.1.3 Structure of Actual Transistors
`386
`
`487
` 5.8.3 The Collector Base Junction Capacitance C,,
`5.14 ‘The Ebers-Moli (EM) Mode)
`387
`3.8.4 The High-Frequency Hybrid-x Model
`487
`5.1.5 Operation in the Saturation Mode=390
`5.8.5 ‘The Cutoff Frequency
`487
`5.1.6 ‘The pnp Trensistor
`397
`5.8.6 Summary
`490
`5.2. Current-Vollage Characteristics
`392
`5.9 Frequency Response of the Comumon-Emitter Amplifier
`392
`5.2.1 Circuit Symbols and Conventions
`5.9.1 The Three Frequency Bands
`497
`5.2.2 Graphical Representation of Transistor Characteristics
`
`‘The High-Frequency Response
`492
`5.2.3 Dependence ofi. an the Collevtur Vullage—The Early
`5.9.3 The Low-Krequency Response
`497
`Effect
`399
`
`
`9.9.4 A Final Remark
`503
`5.2.4 The Common-Emitter Characteristics
`402
`5.10 The Basic BIT Digital Logic luverter
`5.2.5 Transistor Breakdown
`503
`406
`S04
`3.2.6 Summary
`407
`5.10.1 The Voltage Yransfer Characteristic
`407
`3.3. The BJT as an Amplifier and as a Switch
`5.10.2 Saturated Versus Nonsaturated BIT Digital Circuits
`3.3.1 Large-Signal Operation—The Transfer Characteristic
`S11 The SPICE BJT Model and Simulation Examples
`507
`‘
`AmplifierGam 422
`5.11.1 ‘The SPICE Ebers-Moll Model of the BIT 507
`
`Graphicat Analysis
`445
`5.11.2 The SPICE Guaunel-Poon Model af the BIT 509
`4 Operation asa Switch
`5.11.3 The SPICE BIT Model Parameters
`570
`479
`SA BIT Circuits ut DC 427
`5.LL4 The BJT Model Parameters BE and BR in SPICE
`
`44£
`
`448
`
`450
`
`485
`
`492
`
`305
`
`570
`
`i
`:
`
`:
`:
`i
`
`Pom
`x = DETAILED TABLE OF CONTENTS
`
`DETAILED TABLE OF CONTENTS
`
`
`
`320
`
`-
`
`326
`
`315
`
`352
`
`380
`
`397
`
`410
`
`
`
`5
`
`

`

`a
`xi gs DETAILFR TABLE OF CONTENTS.
`Summary 516
`Protlems
`517
`
`DETAILED TABLE ( CONTENTS & xili
`6.9 The CS and CE Amplifiers with Source (Emitter) Degeneration
`629
`69.1 The CS Amplifier with a Source Resistance
`629
`69.2 The CE Amplifier with an Emitter Resistance
`633
`6.19 The Source and Emitter Followers
`635
`6. ot The Source Follower
`635
`6.10.2 Krequency Responseofthe Source Kollower
`6.10.3 The Emitter Follower
`639
`;
`611 Some Useful Transistor Pairings
`641
`6.411 The CD-CS, CC-CE and CD-CE Configurations
`6.11.2 ‘The Durlingion Configuration
`645
`6.11.3 ‘The CC-CB and CD-CG Configurations
`6.12 Current-Mirror Circuits with Improved
`Performance
`649
`6.12.1 Cascode MOS Mirrors
`649
`6.12.2. A Bipolar Mirror with Buse-Current Compensation
`6.12.3 The Wilson Current Mirror
`657
`12.3
`son
`Ci
`6.12.4 The Wilson MOS Mirror
`652
`6.12.5 The Widlar Current Sonrce
`434
`6.13 SPICE Simulation Examples
`656
`Summary
`665
`Problems
`666
`
`637
`
`646
`
`642
`
`650
`
`687
`
`7 Differential and Multistage Amplifiers
`Introduction
`687
`688
`7.1 The MOS Differential Pair
`
`7.1.1 Operation with a Common-Mode Input
`Voltage
`689
`697
`7.1.2 Operation with a Differential Input Voluye
`7.L3 Large-Signal Operation
`693
`696
`7.2 Smali-Signal Operation of the MOS Differential Pair
`7.2.1 Ditferential Gain
`697
`7.2.2 Common-Mode Gain and Common-Mode Rejection Ratio
`{CMRR)
`700
`7.3 The BIT Differential Pair
`704
`7.3.1 Basic Operation
`704
`
`707
`7.3.2
`Large-Signal Operation
`709
`7.3.3 Smail-Signal Operation
`7.4 Other Nonideal Characteristics of the Differential
`Amplifier
`720
`7.4.1 Inpul Offset Voltage of the MOSDifferential Pair
`7.4.2 Input Offset Vollageof the Bipular Dillerential Pair
`7.4.3 Input Bias and Offset Currentsof the Bipolar Pair.
`7.4.4 Input Common-Mode Raage
`726
`7.4.5 A Concluding Remark
`726
`
` 7.5 The Differential Amplifier with Active Load
`
`7.5.1 Differential-to-Single-Endéd Conversion
`2 The Active-Loaded MOS Differential Pair
`.3. Differential Gain of the Active-I.oaded
`
`MOS Pair
`729
`7.5.4 Common-Mode Gain und CMRR 732
`7.5.5 The Bipolar Dillerentiadl Peor with Active Load
`
`727
`727,
`728
`
`726
`723
`725
`
`733
`
`,
`
`L
`
`574
`
`583
`
`588
`
`595
`
`ANALOG AND DIGITAL INTEGRATED
`a PART Hl CIRCUITS 542
`6 Single-Stage Integrated-Circuit Amplifiers
`Introduction
`545
`546
`6.1 TC Design Philosophy
`6.2. Comparison of the MOSFETand the BT 547
`
`
`6.2.1 Typical Values af MOSFET Parauseters
`547
`6.
`ypical Values of IC RIT Parameters
`548 _
`6.2.3 Comparison of Lupurtant Characteristics
`5350
`2
`aris
`u
`ee
`6.24 CombiningMOS and Bipolar Transistors—BiCMOS
`6.2.5 Validityof the Square-Law MOSFET Model
`562
`6.3 IC Biasing—Current Sources, Current Mirrors, and
`Current-Steering Circuits
`562
`6.3.1 The Busic MOSFETCurrent Source
`562
`6.3.2 MOS Current-Steering Circus
`565
`63.3 BIT Circuits
`‘567
`G4 High-Frequency Respouse—General Considerations
`64,1 The High-Frequency Gain Function
`572
`6.4.2 Determiningthe 3-dB Frequency fy
`573
`64.3 Using Open-Circuit Time Constants for the Approximate
`Determination offy
`375
`644 Miller's Theorem 578
`6.5 The Common-Source aud Coramon-Emitter Amplifiers with Active
`Loads
`582
`The Comman-Source Circuit
`582
`
`CMOSImplementation of the Common-Source Amplifier
`65.3 The Common-Emitter Circuit
`38%
`6.6 High-Frequency Response ofthe CS and Chi Amplifiers
`
`6.6.1 Analysis
`Using Miller's Theorem 589
`66.2 Analysis Using Open-Cireuil Time Constants
`590
`66.3 Exact Analysis
`591
`6.64 Adapting the Formulas for the Case of the CE Amplifier
`G65 The Simation When Ry, Is Low 397
`6.7 The Common-Gate and Common-Base Amplifiers with
`Active Loads
`600
`6.7.1 The Common-Gate Amplifict 60
`6.7.2 The Common-Base Amplifier
`670
`6.7.3 AConchiding Remark
`673
`68 The Cascode Amplifier 6/3
`6.8.1 The MOS Cascode
`614
`6.8.2 Frequency Response of the MOS Cascode
`6.8.3 The RIT Cascade
`623
`6.84 A Cascode Curent Source
`625
`6.8.5 Double Cascoding
`626
`6.8.6 The Folded Cascode
`627
`6.8.7 BICMOS Cascades
`628
`
`545
`
`618
`
`6
`
`

`

`5,
`xiv €28
`
` Devalep TABLE OF CONTENTS
`
`DETAILED TABLE OF CONTENTS
`
`740
`
`7.6.1 Analysis ofthe Resistively Loaded MOS Amplificr
`7.6 \requency Response of the Differential Amplilicr
`740
`7.62 “analysis of the ActiveLoadedMOS An plifer Md
`~Na
`Multistage Amplifiers
`749
`F711 A‘lwo-Stage CMOS Op Amp
`749
`7.7.2 ABipolarOp Amp
`758
`Pe
`7.8 SPICE Simulation
`E:
`le
`767
`Pmnlanon
`Examp
`Problems
`775
`Summary
`773
`
`795
`
`797
`798
`
`§ Feedback 791
`794
`Introduction
`792
`8.1 The General Feedback Structure
`8.2 Some Properties of Negative Veedback
`82.1 Guin Desensitivity
`795
`8.2.2 Bandwidth Extension
`795
`a
`Noise Reduction
`796
`
`8.2.4 Reductionin Nonlinear Distortion
`8.3 The Four Basic Feedback Topologies
`3.1 Voltage Amplificrs
`799
`
`Current Amphfiers
`799
`802
`8.3.3 Transconductance Amplifiers
`802
`8.3.4 Transresistance Amplifiers
`802
`8.4 The Scrics—Shunt Feedback Amplifier
`8.4.1 The Ideal Situation
`802
`8.4.2 The Practical Situation
`S04
`84.3 Summary
`807
`8.5 The Scrics—Series Feedback Amplifier
`
`A The Ideal Case
`812
`8.4.2 The Practical Case &/2
`
`Summary
`8i4
`R54
`8.6 ‘Vhe Shunt-Shunt and Shunt—Series Feedback
`Amplifiers
`8&8
`8.6.1 The Shumt-Shuni Configuration
`849
`8.6.2 AnImportani Note 23
`8.6.3 The Shumt-Series Configuration
`$23
`8.6.4 Summary of Resulis
`837
`8.7 Determining the Loop Gain
`837
`831
`8.7.1 An Alternalive Approachfor Finding Aji
`8.7.2 Liquivalence of Circuits from a Feedback-Loop
`Point of View 833
`8.8 The Stability Problem 834
`8.8.1 Transfer Function of the Feedhack Amplifier
`$.8.2 The Nyquist Plot
`$35
`8.9 Effect of Feedback on the Amplificr Poles
`836
`8.9.1 Stability and Pole Location
`837
`8.9.2 Poles of the Feedback Amplifier
`834
`838
`8.9.3 Amplificr with Single-Pole Response
`8.9.4 Amplifier with Two-Pole Response
`839
`8.9.5 Amoplificrs with Three or More Poles
`842
`
`874
`
`“
`
`434
`
`
`8.10.1
`Gain and Phase Margins
`845
`B10 Sanity Sudy Using Bode Plots a
`
`8.10.2 Effect of Phuse Mervin on Closed-Loup Response
`8.10.3 An Altemative Approachfor Investigating Stability
`8.11 Frequency Compensation
`84g
`8.11.1 They 850
`8.11.2 Implementation
`857
`8.11.3 Miller Compensationand Pole Splitting
`or
`8.12 SPICE Simulation Example
`855
`Surmury
`859
`Problems
`860
`
`852
`
`846
`847
`
`877
`
`
`
`9 Operational-Amplifier and Data-Corverter Circuits
`Introduction
`874
`9.1 The Two-Stage CMOS Op Amp 72
`GLE The Circuit
`872
`
`9.1.2
`Input Common-Mode Range and Output Swing
`9.1.3 Voltage Gain
`874
`9.1.4 Hrequeney Response
`876
`DLS Slew Rate
`879
`883
`9,2 The Folded-Cascode CMOS Op Amp
`9.2.1 The Circuit
`883
`9.2.2 Input Cemmon-Mode Rangeand the Output
`Voliage Swing
`885
`3 Voltage Gain
`896
`888
`Frequency Response
`SlewRate
`888
`Increasing the lnput Common-Mode Runge:
`~ Rail-to-Rail Input Operation
`898
`9.2.7 Increasing the Output Voltage Range:
`The Wide Swing Current Mirror
`892
`93 The 741 Op-Amp Ciccuit
`893
`9.3.1 Bius Circuit
`893
`9.3.2 Short-Circuil Prolectiun Circuiuy
`9.3.3 The Input Stage
`$95
`9.3.4 The Second Slage
`895
`9.3.5 The Qulpul Stage.
`896
`9.3.6 Device Puameters
`898
`9.4 DC Analysis vf the 741
`899
`899
`9.4.1 Reference Bias Current
`9.4.2 Input-Stage Bias
`899
`9.4.3 Input Bias and Offset Currents #2
`9.4.4 Input Offset Voltage
`902
`9.4.5 Input Common-Mode Range
`902
`9.4.6 Second-Stage Bias
`#02
`9.4.7 Output-Stage Bies
`963
`9.4.8 Summary 94
`9.3 Small-Signal Anatysis of the 741
`9.5.1 The InputStage
`905
`9.5.2 The Second Stage
`910
`9.5.3 The Output Stage
`972
`
`873
`
`895
`
`905
`
`7
`
`

`

`xvi
`
`
`
`DETAILED TABLE OF CONTENTS
`
`
`
`10.4.3 Derivation of the VTC 976
`
`9.6 Gain, Frequency Response. and Slew Rate of lhe 741
`10.4.4 Dynamic Qperation
`979
`9.6.1 Small-Signal Gain
`947
`10.4.5 Design
`979
`5.2 Frequency Response
`217
`10.4.6 Gate Cirenits
`988
`3 A Simplificd Model
`978
`
`DO4 Slew Rate
`919
`984
`{0.4.7 Concluding Remarks
`920
`9.6.5 Relationship Betweenfi and SR
`982
`Pass-Transistor Logic Circuits
`922
`9.7 Data Converters—AnInwoduction
`983
`10.5.1 AnEssential Design Requirement:
`922
`9.7.1 Digital Processing of Signals
`984
`10.5.2. Operation wilh NMOSTransistors us Switches
`10.3.3 The Use of CMOSTranstaission Gates us Switches
`988
`922
`9.3.2 Samplingof Analog Signals
`9.7.3 Signal Quantization
`924
`10.5.4 Pass-Transislor Logic Circuit Exainples
`990
`10,5.5 A Final Remark
`994
`9.7.4 The A/D and D/A Converters as Tunctional Blocks
`9.8 D/A Converter Circuits
`925
`Dynamic Logic Circuits
`997
`10.6.1 Basic Principle
`992
`V8.1 Basie Circuit Using Binary-Weigbted Resisturs
`10.6.2 Nonideal Effects
`993
`9.8.2 R-2R Ladders
`926
`
`996
`10.6.3 Domino CMOS Logic
`9.8.3 A Practical
`it Implementation
`927
`
`9.8.4 Current Switches
`928
`998
`10.6.4 Concluding Remarks
`10.7
`9.9 A/D Converter Circuits
`929
`Spice Simulation Example=928
`99.1 The Feetiback-Type Converter 92
`Summary
`7602
`9.9.2 The Dual-Slope A/D Converter
`930
`Problems
`£002
`9.9.3 The Parallel or Flash Converter
`932
`9.94 The Charge-Recisiribuuion Converter
`9.10 SPICE Simulation Example
`934
`Summary
`940
`Problems
`94f
`
`PART II] SELECTED TOPICS 1070
`
`11 Memory and AdvancedDigital Circuits
`1073
`_
`Introduction
`7613
`10 Digital CMOSLogic Circuits
`1074
`Latches and Flip-flops
`Intraduction
`949
`11.1.1 The Latch
`1014
`11.1.2 The SR Hip-Hop
`£045
`10.1 Digital Circuit Design: An Overview 930
`
`1026
`11.1.3
`CMOS Implementation of SR Flip-Flops
`10.1.1 Digital IC Vechnologies and Logic-Circnit Families
`11.1.4 A Simpler CMOS Implementution uf the Clocked SR Flip-
`10.1.2 Logic-Circuil Characierization
`952
`Flop
`2019
`10.1.3 Slyles for Digital System Design
`954
`41.1.5 DFlip Flop Circuits
`1019
`955
`10.1.4 Design Abstraction and Computer Aids
`Multivibrator Circuits
`1627
`10.2 Design and Performance Analysis of the CMOS Inverter
`1).2.1 A CMOS Monostable Circuit
`10.2.1 Circuit Structure
`955
`11.2.2 An Astable Cireuil
`1026
`10.2.2 Static Operation
`956
`
`11.2.3 ‘The Ring Oscillator
`£027,
`10.2.3 Dynamic Operation
`958
`Semiconductor Memories: Types and Architectures
`10.24 Dynamic Power Dissipation
`11.3.1 Memory-Chip Organization
`1628
`10.3 CMOS Logic-Gatc Circuits
`943
`11.3.2 Memory-Chip Timing
`2030
`10.3.1 Basie Structure
`963
`
`Random-Ac
`Memory (RAM) Celts
`966
`10.3.2 The Two-lnput NOR Gate
`11.4.1 Static Memory Cell
`1037
`966
`10.3.3 The Two-lnput NAND Gate
`114.2 Dynamic Memory Cell
`1036
`AComplex Gate
`967
`Scnse Amplifiers and Address Decoders
`Obtaining the PUN from the PIN and Vice Versa
`The Exclusive-OR Function
`969
`11.5.1 Phe Sense Anuplifier
`1038
`-2 The Row-Address Decoder
`1043
`10.3.7 Summary of the Synthesis Mettuxl
`976
`.3 The Columm-Address Decoder
`7065
`10.3.8 Transistor Sizing|970
`
`11.6
`10.3.9 Effects ofFao-In and Fan-Out on Propagation Delay
`977
`Read-Only Memory (ROM)
`1046
`i161 AMOSROM 1047
`10.4 Pseudo-NMOSLogic Circuits
`974
`
`104.1 The Pseudo-NMOS Inverter
`974
`1049
`Programmable ROMs
`10.4.2 Static Characteristics
`975
`11.6.3 Programmable ROMs (PROMs and EPROMs)=£049
`
`977
`
`924
`
`925
`
`950
`
`955
`
`968
`
`932
`
`949
`
`96£
`
`DETAILED TABLE OF CONTENTS
`
`EVE
`ERY xwit
`
`10.6
`
`1Lt
`
`1h2
`
`LL3
`
`hd
`
`1629
`
`4022
`
` 103£
`
`2038
`
`8
`
`

`

`11.7 Emitter-Coupled Logic (FCI) 752
`12.7.3 An Alternative Two-Inlegrator-Loop Biquad
`Circuit
`2223
`IL7.1 The Basic Principle
`2652
`2.7.4 Final Remarks 125
`11.7.2 RCLFamilies
`1653
`11.7.3 The Rasic Gate Circuit
`1053
`12.8 Single-Amplifier Biquadratic Active Filters
`1657
`11.7.4 Voltage Transfer Characteristics
`12.8. Syithesis of ihe Feedback Luop 1126
`117.5 Fan-Out
` 266f
`12.8.2 Injectingthe Input Signal 1728
`
`
`14.7.6 Speed af Operation and Signal Transmission
`12.8.3 Generation af Equivalent Feedback Loops
`11.7.7 Power Dissipation
`7063
`12.9 Sensitivity
`2733
`11.7.8 Thermal Effects
`1063
`
`1236
`12.10 Switched-Capacitor Filters
`11.7.9 The Wired-OR Capability
`1436
`12.10.1 The Basic Principle
`1.7.10 Some Final Remarks
`7060
`12.10.2 Practical Circuits
`2737
`1L8 BiCMOS Digital Circuits 767
`12.10.3 ATinalRemark £142
`LL8.1 The BiCMOSInverter=1667
`12.11 Tuned Amplitiers
`/24f
`11.8.2 Dynimnic Operation
`1669
`12.111 The Basic Principle
`#147
`11.8.3 BICMOS Logic Gates
`7076
`1211.2 Inductor Losses
`7743
`11.9 SPICE Simulation Example
`1072
`12.11.3 Use ofTransformers
`7444
`
`Summary
`1076
`12.1.4 Amplifiers with Multiple Tuned Circuits L145
`Problems
`1077
`12.1.5 The Cascode and the CC-CB Cascade 1146
`12.1.6 Synchronous Tuning
`1747
`12.11-7 Stagger-Tuning
`1248
`12.12 SPICE Simulation Examples
`1152
`Summary
`1158
`Problems
`1159
`
`12 Filters and Tuned Amplifiers
`Introduction 2083
`12.1 Filter Transmission, Types, and Specification
`12.1.1 Filter Transmission
`2084
`12.1.2 FilterTypes
`2085
`[2.1.3 Filler Specification
`4085
`12.2. The Filier Transfer Function
`1088
`12.3 Butterworth and Chebyshcy Filters
`12.3.1 The Butterworth Filter
`2097
`12.3.2 The ChebyshevFilter
`/095
`12.4 Kirst-Order and Second-Order Filter Functions
`124.1 First-Order Fillers
`1098
`12.4.2 Second-OrderFilter Funutions
`1/01
`12.5 The Second Order LCR Resonator
`7106
`12.5.1 The Resonator Natural Modes
`7266
`
`12.5.2 Realization of Transmission Zeros
`1107
`12.5.3 Realization of the Low-Pass Function
`1/08
`12.5.4 Realization of the Lligh-Pass Function 768
`12.3.5 Realization of the Bandpass Function
`1208
`
`.5.6 Realizationof the Notch Functions
`2770
`Realization of the All-Pass Function
`2277
`
`2.6 Second-Order Active Hilters Based on Inductor
`Replacement
`1212
`(2.6.1 The Aatoniou Inductunee-Simulation Circuit
`£2.62 The Op Amp-RC Resonator
`/1/4
`1/14
`12.6.3 Realization of the Various Filter Types
`12.6.4 The All-Pass Circuit
`1118
`12.7 Second-Order Active Filters Based on the Two-Integrator-Loop
`Topology
`f420
`2.7.1 Devivation of the Two-Integrator-Loop Biquad
`1124
`12.7.2 Circuit Implementation
`1/22
`
`7097
`
`1098
`
`£112
`
`1165
`
`7766
`
`13 Signal Generators And Waveform-Shaping Circuits
`Introduction £65
`13.1 Basic Principles of Sinusoidal Oscillators
`13.1.1 The Oscillator Teedback Loop
`L166
`13.1.2 The Oscillation Criterion
`1767
`13.1.3 Nonlinear Amplitude Control
`7168
`13.4 A Popular Limiter Circuit for Amplitude Control 169
`13.2. Op Amp-KC Oscillator Cirevits
`L272
`13.2.1 The Wien-Bridge Oscillator
`£172
`2 The Phase-Shift Oscillator
`1174
`3 The Quadrature Oscillator
`1476
`
`3.2.4 The Active-Filter-Tuned Oscillator £477
`5 A Final Remark
`1179
`
`13.3 LC and Crystal Oscillators
`1279
`1 LO-Tuned Oscillators
`4179
`2 Crystal Oscillators
`1182
`
`13.4 Bistable Multivibrators
`7785
`1 The Feedback Loop
`2785
`7786
`2 Transfer Characteristics of the Bistable Circuil
`
`3 Triggering the Bistable Circuit
`2487
`13.4.4 The Bistable Circuit as a Memory Element 7/88
`13.4.5 A Bistable Circuit with Noninvertine Transfer
`Characteristics
`7188
`13.4.6 Application of the Bistable Carcuit as a
`Comparator
`13.4.7 Making the Output Levels More Precise £29
`
`DETAILED TABLE OF CONTENTS
`
`DCTAILED TA
`
`BLE OF CONTENTS
`
`
`
`1062
`
`1066
`
`£125
`
`1130
`
`7083
`
`1084
`
`
`
`9
`
`

`

`eee
`3x use DFTAILED TABLE OF CONTENTS.
`14.6.3 Power Dissipation Versus Temperature
`13.5 Generation of Square and Triangular Waveforms Using Astable
`14.6.4 Transistor Case and Heat Sink
`4252
`Multivibrators
`1/92
`14.6.5 The BJTSafe Operating Area
`1254
`13.5.1 Operation ofthe Astable Multivibrator
`#792
`
`12.6.6 Parameter Values of Power Transistors
`Generation of Triangular Waveforms
`7794
`
`13.6 Generation of a Standardized Pulse—The Monostable
`Variations on the Class AB Configuration
`Multivibrator
`1796
`
`14.7.1 Use of Input Emitter Followers
`7256
`14.7.2 Use of Compound Devices
`1257
`7798
`13.7 Integrated-Circuit Timers
`14.7.3 Shon-Cireuit Protection
`1259
`13.7.1 The 535 Circuit
`2298
`14.7.4 Thermal Shutdown
`7260
`
`
`13.7.2
`Implememing a Monosiable Multivibrator Using the 5341C 7/99
`13.7.3 An Astable Multivibrator Using the 5551C 4207
`IC Power Amplitiers
`7267
`14.8.] A Fixed Gain IC Power Amplifier
`13.8 Nonlinear Wavelorin-Shaping Circuits
`1263
`14.8.2 Power Op Amps
`{265
`13.8.1 The Breakpoint Method
`/203
`14.8.3 The Bridge Amplifier
`7245
`13.8.2 The Noniinear-Amplification Method
`£205
`MOS Power‘transistors
`7266
`149
`13.9 Precision Rectifier Circuits
`1206
`14.9.1 Structure of the Power MOSFET £266
`13.9.1 Precision Half-Wave Rectifier The “Superdiode” 207
`iscics of Power MOSFETs=1268
`
`13.9.2 An Alternative Circuit
`[208
`
`
`4269
`13.9.3 An Application: Measuring AC Voltages
`£209
`
`
`13.9.4 Precisian Full-Wave Rectifier
`1210
`1269
`14.9.4 Comparison with B

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