IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`In re Patent of:
`Brian Eplett
`8,947,164 Attorney Docket No.: 00035-0030IP1
`U.S. Patent No.:
`February 3, 2015
`Issue Date:
`Appl. Serial No.: 13/894,221
`Filing Date:
`May 14, 2013
`Title:
`INTEGRATED TECHNIQUE FOR ENHANCED POWER
`AMPLIFIER FORWARD POWER DETECTION
`
`DECLARATION OF DR. SAYFE KIAEI
`
`1
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`APPLE ET AL. EXHIBIT 1003
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`Patent No. 8,947,164
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`Table of Contents
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`ASSIGNMENT .............................................................................................. 4
` QUALIFICATIONS ...................................................................................... 4
` SUMMARY OF CONCLUSIONS FORMED .......................................... 11
` BACKGROUND KNOWLEDGE ONE OF SKILL IN THE ART
`WOULD HAVE HAD PRIOR TO THE PRIORITY DATE OF THE
`’164 PATENT ............................................................................................... 13
`LEGAL PRINCIPLES ................................................................................ 14
`
`A. CLAIM INTERPRETATION .............................................................................. 15
`B. ANTICIPATION .............................................................................................. 15
`C. OBVIOUSNESS .............................................................................................. 16
` MATERIALS CONSIDERED ................................................................... 17
` OVERVIEW OF THE ’164 PATENT ....................................................... 18
` OVERVIEW OF THE PROSECUTION HISTORY............................... 28
` SUMMARY OF SOKAL, SEDRA, TSUTSUI, AND COMBINATIONS
`THEREOF .................................................................................................... 28
`A. OVERVIEW OF SOKAL ................................................................................... 28
`B. OVERVIEW OF SEDRA ................................................................................... 33
`C. COMBINATION OF SOKAL AND SEDRA .......................................................... 34
`D. OVERVIEW OF TSUTSUI ................................................................................ 39
`E. COMBINATION OF TSUTSUI WITH SOKAL AND SEDRA ................................... 46
` APPLICATION OF SOKAL, SEDRA, AND TSUTSUI TO CLAIMS 1
`AND 5 ............................................................................................................ 53
` SUMMARY OF WILLIAMS AND ASSOCIATED COMBINATIONS
` ....................................................................................................................... 67
`A. OVERVIEW OF WILLIAMS ............................................................................. 67
`B. COMBINATION OF WILLIAMS WITH SOKAL, SEDRA, AND TSUTSUI ............... 69
` APPLICATION OF SOKAL, SEDRA, TSUTSUI, AND WILLIAMS
`TO CLAIMS 2, 7-12, AND 14-17 ............................................................... 74
` SUMMARY OF STREETMAN AND APPLICATION TO CLAIMS 6
`AND 13 ........................................................................................................103
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`Patent No. 8,947,164
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`A. OVERVIEW OF STREETMAN ........................................................................103
`B. APPLICATION OF SOKAL, SEDRA, TSUTSUI, WILLIAMS, AND STREETMAN TO
`CLAIMS 6 AND 13 .................................................................................................104
` CONCLUSION ..........................................................................................106 
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`Patent No. 8,947,164
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`I, Dr. Sayfe Kiaei, of Scottsdale, AZ, declare that:
`
`
`1.
`
`ASSIGNMENT
`I have been retained on behalf of Apple Inc., LG Electronics, Inc., and
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`Samsung Electronics Co., Ltd. ( collectively "Petitioners") and asked to review and
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`provide my opinion on the patentability of claims 1-2 and 5-17 of U.S. Patent No.
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`8,947,164 ("the '164 Patent"). I understand that Petitioners are requesting that the
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`Patent Trial and Appeal Board (“PTAB” or “Board”) institute an inter partes
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`review (“IPR”) proceeding of the ’164 Patent.
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`2.
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`I have been asked to provide my independent analysis of the ’164
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`Patent based on the prior art publications cited in this declaration.
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`3.
`
`I am a professor at Arizona State University. I am being compensated
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`for my work as an expert on an hourly basis. My compensation is not dependent
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`on the outcome of these proceedings or the content of my opinions.
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` QUALIFICATIONS
`I am over the age of 18 and am competent to write this declaration. I
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`4.
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`have personal knowledge, or have developed knowledge of these technologies
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`based upon education, training, or experience, of the matters set forth herein.
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`5.
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`A detailed description of my professional qualifications, including a
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`listing of my specialties/expertise and professional activities, is contained in my
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`curriculum vitae, a copy of which is provided as EX-1004. In what follows, I
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`Patent No. 8,947,164
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`provide a short summary of my professional qualifications.
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`6.
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`In terms of my background and experiences that qualify me as an
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`expert in this case, I earned a Ph.D. in 1987 from Washington State University in
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`Electrical, Computer, and Energy Engineering.
`
`7.
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`Since 2001 I have held the position of Motorola Endowed Chair
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`Professor in Analog and Radio Frequency Integrated Circuitry at the School of
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`Electrical, Computer, and Energy Engineering at Arizona State University in
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`Tempe, Arizona. I am also the Director of the National Science Foundation
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`Center, Connection One. Connection One is an industry/university cooperative
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`research center with over thirty industrial members and five university members
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`focused on developing communication system and networking technologies.
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`8.
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`I have graduated over 100 MS and PhD students working under my
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`supervision on their theses, and many of them are professors in academia, or have
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`senior positions in the industry. Currently, I have 8 MS, PhD, and postdoc
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`students working with in my lab on research related to communication and
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`networking systems, wireless and wireline systems, RF, and integrated circuits. My
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`research is funded by various sources, including industry, federal agencies
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`including NSF, DARPA, ONR, DOE, and other, with an average total research
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`funding of $1M per year.
`
`9.
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`I have been involved with wireline systems, cellular systems, RF
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`Patent No. 8,947,164
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`Integrated circuits, Analog/Digital Integrated Circuits, communications, digital
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`signal processing, and related areas for the last 30 years starting with the first
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`generation of mobile phones (an analog system called AMPS (for Advanced
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`Mobile Phone Service)). I have also worked on second generation (2G) and third
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`generation (3G) mobile phone technologies including GSM, EDGE, IS-95, 1X
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`CDMA, UMTS, and Wide band CDMA. These terms all refer to leading mobile
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`phone standards and technologies, which enjoyed widespread use in mobile
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`telephone networks throughout the world. I have also worked on other wireless
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`data communication technologies including Bluetooth, the global positioning
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`system (GPS), Wireless local area networks (LAN) (often known as Wi-Fi), and
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`related areas.
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`10. From 1985 through 1987, I worked with Boeing on the development
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`of signal processing and control systems.
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`11. From 1987 through 1993, I was a tenured Professor at Oregon State
`
`University in the Electrical and Computer Engineering Department. In my over
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`thirty years of teaching experience, I have taught university courses in networking,
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`communication systems, RF, and electronics at both the undergraduate and
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`graduate level.
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`12. From 1993 to 2002, I was a Senior Member of Technical Staff with
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`the Wireless Technology Center and Broadband Operations at Motorola Inc.,
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`Patent No. 8,947,164
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`where I was responsible for the development of wireless system, cellular system,
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`RF integrated circuits, GPS, and Digital Subscriber Lines (DSL) transceivers.
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`13. From 1995-1998 I was at Motorola and worked on DSL (digital
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`subscriber line, a technology used for high speed Internet service over copper
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`telephone lines), DMT (discrete multitone transmission, a technology underlying
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`DSL and other wireline communication systems), OFDM (orthogonal frequency
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`division multiplexing, a technology for transmitting data on multiple frequencies at
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`the same time for wideband digital communication), wireline and wireless systems,
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`wireless networking, 1G-3G, UMTS, GPS and Bluetooth systems.
`
`14.
`
`I was involved with the design of two way radios at Motorola from
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`1993–1995. I designed RF LNA, Mixer, receive signal strength indicator (RSSI),
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`AGC (automatic gain controller), and the baseband analog and digital filtering
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`sections. I was also one of the main system architects for the Motorola Talkabout
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`Radio, a handheld radio system with over 100 million units sold. The transceiver I
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`developed for the Motorola Talkabout was a radio frequency transceiver for
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`transmitting and receiving radio signals at distances up to 35 miles.
`
`15. From 1998–2002 I was in the Motorola cellular group called WITC
`
`(Wireless integrated Technology Center) within the Motorola communication
`
`enterprise. This group was responsible for the design and development of
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`integrated circuits for 1G (AMPS, Digital AMPS), 2G (GSM, EDGE), and 3G
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`(CDMA, WCDMA / UMTS, CDMA2000) transceiver. The products were
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`Motorola flip phone, Razor, iDEN, etc. During this time period, I was involved
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`with the design of RF front-end including LNA, variable gain LNA, active and
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`passive mixers, analog front-end, AGC, analog and digital filters, and related areas
`
`in the wireless transceiver components. In these products, we used RSSI to vary
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`the gain of RF front end circuits, including LNA and mixer, and the analog circuits
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`including VGA. The circuits used RSSI to find the received signal strength and
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`vary the circuit gain to increase linearity, reduce power consumption, and enhance
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`the sensitivity of the transceivers. We used the RSSI and other signal processing
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`methods to minimize and filter out jammers, interferes, and adjacent channel
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`interferes. The RF IC’s developed were used in over 10’s of millions of Motorola
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`phones from 1998–2002.
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`16.
`
`I have also been a consultant on various projects with Intel (designing
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`2G and 3G mobile telephone transceivers), Texas Instrument (developing 3G
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`cellular and Bluetooth technologies), Sony Wireless (developing GPS
`
`technologies), Tektronics (designing wireless systems), and various other
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`consultancies. During my work in industry, I have designed and contributed to the
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`design of many radio transceivers for commercial products, including designs for
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`radio transceiver integrated circuits. Many of my designs are still in use today in
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`products manufactured by the companies I have worked for, including Motorola,
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`Patent No. 8,947,164
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`Intel, Sony, and more.
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`17. From 2002–2010 I was a consultant with Intel on the development of
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`2G and 3G RFIC circuits. From 2002–2005 I was consulting with SONY on the
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`development of GPS RF receivers. I also did some work with Texas instruments
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`on Bluetooth and GPS RF circuits.
`
`18. From 1997 to 2001, I was the standards technical analyst for
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`Motorola. I studied the standards and attended the meetings of various standard
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`setting committees, including ITU, IEEE, and ETSI related to DSL, OFDM,
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`CDMA, 2G, and 3G systems. I am thus very familiar with the standards for
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`several wireless communications technologies, including the standards for mobile
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`telephones.
`
`19.
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`I joined ASU in 2002 as a tenured full professor and Motorola
`
`endowed chair in RFIC and analog circuits. At ASU, I developed a new course at
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`ASU on the design of wireless and RF transceivers. I thought that course for over
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`10 years. This course is EEE524, RFIC for Wireless Transmitters, which is a
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`graduate course at ASU. In this course, we cover design of LNA, Mixer, frequency
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`synthesizer, Variable gain LAN, and other related topics. I have also taught
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`courses on Electronics, VLSI, Analog IC design, RFIC, communications, and
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`related areas.
`
`20.
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`I have published over a hundred journal and conference papers
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`Patent No. 8,947,164
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`covering topics such as communication systems, signal processing, radio
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`frequency, integrated circuits (IC), filter design, and related areas. A list of my
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`publications can be found in my CV, included as EX-1004.
`
`21.
`
`I am an IEEE Fellow, a distinction and the highest level of IEEE
`
`membership awarded by the IEEE directors to recognize a high level of
`
`demonstrated extraordinary accomplishments. The IEEE is the Institute of
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`Electrical and Electronics Engineers, the world’s largest association of technical
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`professionals whose objectives include the educational and technical advancement
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`of electrical and electronic engineering, telecommunications, computer
`
`engineering, and related disciplines. I am a member of the IEEE Circuits and
`
`Systems Society, IEEE Solid State Circuits Society, and IEEE Communication
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`Society, IEEE RF and Microwave committees, IEEE International Symposium on
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`Low Power Electronics and Design (ISLPED), IEEE Signal Processing Society,
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`IEEE Fellow Selection Committee, and many other International Electrical
`
`Engineering societies. I was one of the key organizers to establish the IEEE Radio
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`Frequency Integrated Circuits (RFIC) symposium in 1995, and have been on the
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`executive committee, and technical committee of RFIC for the last 16 years. The
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`RFIC Symposium has grown and is now the premier international symposium in
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`the world where the latest RF circuits and components are presented. I have been
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`involved in several international conferences in the areas of RF, Communication,
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`Patent No. 8,947,164
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`Signal Processing, and IC design.
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`22.
`
`I have received several awards including the Carter Best Teacher
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`Award, the IEEE Darlington Award (which is given for the best technical paper on
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`circuits and systems in the IEEE Circuits and Systems Society), and the Motorola
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`10X Rapid Design Cycle Reduction Award.
`
`23.
`
`I have been one of the key organizers of the IEEE International
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`Symposium on Low Power Electronics and Design (ISLPED) since 1995. I have
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`published papers and organized sessions on techniques for low-power cellular
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`phones at ISLPED. I have published a number of papers on the design and
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`development of low-power RF and wireless transceivers.
`
`24. My experience and qualifications are further detailed in my
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`curriculum vitae, which is included as EX-1004.
`
` SUMMARY OF CONCLUSIONS FORMED
`25. As part of my analysis, I have reviewed the ’164 Patent, relevant
`
`excerpts of the prosecution history of the ’164 Patent, and Plaintiff Arigna
`
`Technology Limited’s Preliminary Infringement Contentions As to Apple Inc.,
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`Arigna Technology Limited v. Samsung Electronics Co., Ltd, Samsung Electronics
`
`America, Inc., and Apple Inc., Case No. 6:21-cv-943-ADA (W.D. Tex. Jan. 06,
`
`2022) (EX-1007). I have also reviewed at least the following prior art references
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`and other materials:
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`11
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`Patent No. 8,947,164
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`Prior Art References and Other Materials
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`U.S. Patent No. 8,947,164 to Eplett (“the ’164 Patent”) (EX-1001)
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`Excerpts of Prosecution History of the ’164 Patent (Serial No. 13/894,221) (EX-
`1002)
`
`U.S. Patent No. 3,900,823 to Sokal et al. (“Sokal”) (EX-1005)
`
`Excerpts from Sedra and Smith, Microelectronic Circuits (Fifth Edition), New
`York, NY: Oxford University Press, 2004 (“Sedra”) (“Sedra”) (EX-1006)
`
`Plaintiff Arigna Technology Limited’s Preliminary Infringement Contentions As
`to Apple Inc., Exhibit A, Arigna Technology Limited v. Samsung Electronics
`Co., Ltd, Samsung Electronics America, Inc., and Apple Inc., Case No. 6:21-cv-
`943-ADA (W.D. Tex. Jan. 06, 2022) (EX-1007)
`
`U.S. Patent Application Publication No. 2009/0027119 to Williams et al.
`(“Williams”) (EX-1008)
`
`Excerpts from Streetman and Banerjee, Solid State Electronic Devices (Sixth
`Edition), Upper Saddle River, N.J: Prentice Hall, 2000 (“Streetman”) (EX-1009)
`
`U.S. Patent Application Publication No. 2005/0179498 to Tsutsui et al.
`(“Tsutsui”) (EX-1010)
`
`Torrey et al., Crystal Rectifiers, New York, McGraw-Hill Book Company, 1948
`
`Excerpts from Pozar, Microwave Engineering, Second Edition, John Wiley &
`Songs, 1998
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`J. Mataya and S. Marshall, "A monolithic integrated variable attenuator," 1967
`IEEE International Solid-State Circuits Conference. Digest of Technical Papers,
`1967, pp. 12-13
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`
`
`26. This Declaration explains the conclusions that I have formed based on
`
`my analysis. To summarize those conclusions:
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`
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`Ground 1: Based upon my knowledge and experience and my review of the
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`Patent No. 8,947,164
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`prior art publications in this declaration, I believe that claims 1 and 5 of the
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`’164 Patent are made obvious by the combination of Sokal, Sedra, and
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`Tsutsui
`
`
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`Ground 2: Based upon my knowledge and experience and my review of the
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`prior art publications in this declaration, I believe that claims 2, 7-12, and
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`14-17 are made obvious by the combination of Sokal, Sedra, Tsutsui, and
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`Williams.
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`
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`Ground 3: Based upon my knowledge and experience and my review of the
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`prior art publications in this declaration, I believe that claims 6 and 13 are
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`made obvious by the combination of Sokal, Sedra, Tsutsui, Williams, and
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`Streetman
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` BACKGROUND KNOWLEDGE ONE OF SKILL IN THE ART
`WOULD HAVE HAD PRIOR TO THE PRIORITY DATE OF THE ’164
`PATENT
`27.
`
`I have been informed that a person of ordinary skill in the art is a
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`hypothetical person who is presumed to have the skill and experience of an
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`ordinary worker in the field at the time of the alleged invention. Based on my
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`knowledge and experience in the field and my review of the ’164 Patent and file
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`history, I believe one of ordinary skill in the art relating to, and at the time of, the
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`invention of the ’164 Patent would have been someone with at least a Master of
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`Science degree in an academic area emphasizing circuit design, such as electrical
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`Patent No. 8,947,164
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`engineering or an equivalent field (or a similar technical Master’s Degree, or a
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`higher degree) with a concentration in circuit design, including study of analog,
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`RF, and/or microwave circuits. Alternatively, one of ordinary skill in the art would
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`have been someone with a Bachelor’s Degree (or higher degree) in an academic
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`area such as electrical engineering with two or more years of work experience in
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`circuit design. Additional education in a relevant field could substitute for
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`professional experience, or relevant experience in the field could substitute for
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`formal education.
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`28. My analysis and conclusions set forth in this declaration are based on
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`the perspective of a person of ordinary skill in the art having this level of
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`knowledge and skill as of the date of the alleged invention of the ’164 Patent
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`(“POSITA”). Based on instruction from Counsel, I have applied May 18, 2012 (the
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`“Critical Date”), as the date of the alleged invention of the ’164 Patent.
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`29. Based on my experiences, I have a good understanding of the
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`capabilities of a POSITA. Indeed, I have taught, mentored, advised, and
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`collaborated closely with many such individuals over the course of my career.
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` LEGAL PRINCIPLES
`30.
`I am not a lawyer and I will not provide any legal opinions in this IPR.
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`Although I am not a lawyer, I have been advised that certain legal standards are to
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`be applied by technical experts in forming opinions regarding the meaning and
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`Patent No. 8,947,164
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`validity of patent claims.
`
`A. Claim Interpretation
`I understand that claim terms are generally given their plain and
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`31.
`
`ordinary meaning based on the patent’s specification and file history as understood
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`by a person of ordinary skill in the art at the time of the purported invention. In that
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`regard, I understand that the best indicator of claim meaning is its usage in the
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`context of the patent specification as understood by a POSITA. I further
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`understand that the words of the claims should be given their plain meaning unless
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`that meaning is inconsistent with the patent specification or the patent’s history of
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`examination before the Patent Office. I also understand that the words of the
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`claims should be interpreted as they would have been interpreted by a POSITA at
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`the time of the invention was made (not today).
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`B. Anticipation
`I understand that a patent claim is invalid as anticipated if each and
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`32.
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`every element as set forth in the claim is found, either expressly or inherently
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`described, in a single prior art reference. I also understand that, to anticipate, the
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`reference must teach all of the limitations arranged or combined in the same way
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`as recited in the claim. I do not rely on anticipation in this declaration.
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`33. With respect to inherency, I understand that the fact that a certain
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`result or characteristic may occur or be present in the prior art is not sufficient to
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`Patent No. 8,947,164
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`establish the inherency of that result or characteristic. Instead, the inherent
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`characteristic must necessarily flow from the teaching of the prior art.
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`C. Obviousness
`I understand that a patent claim is invalid if the claimed invention
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`34.
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`would have been obvious to a person of ordinary skill in the field at the time of the
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`purported invention, which is often considered the time the application was filed.
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`Even if all of the claim limitations are not found in a single prior art reference that
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`anticipates the claim, the claim can still be invalid.
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`35. To obtain a patent, a claimed invention must have, as of the priority
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`date, been nonobvious in view of the prior art in the field. I understand that an
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`invention is obvious when the differences between the subject matter sought to be
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`patented and the prior art are such that the subject matter as a whole would have
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`been obvious at the time the invention was made to a person having ordinary skill
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`in the art.
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`36.
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`I understand that, to prove that prior art or a combination of prior art
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`makes a patent obvious it is necessary to: (1) identify the particular references that,
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`singly or in combination, make the patent obvious; (2) specifically identify which
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`elements of the patent claim appear in each of the asserted references; and (3)
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`explain a motivation, teaching, need, market pressure or other legitimate reason
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`that would have inspired a person of ordinary skill in the art to combine prior art
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`Patent No. 8,947,164
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`references to solve a problem.
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`37.
`
`I also understand that certain objective indicia can be important
`
`evidence regarding whether a patent is obvious or nonobvious. Such indicia
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`include:
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`
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`
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`
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`
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`
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`
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`
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`
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`
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`Commercial success of products covered by the patent claims;
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`A long-felt need for the invention;
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`Failed attempts by others to make the invention;
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`Copying of the invention by others in the field;
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`Unexpected results achieved by the invention as compared to the closest
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`prior art;
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`Praise of the invention by the infringer or others in the field;
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`The taking of licenses under the patent by others;
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`Expressions of surprise by experts and those skilled in the art at the making
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`of the invention; and
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`The patentee proceeded contrary to the accepted wisdom of the prior art.
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`38. To the extent these factors have been brought to my attention, if at all,
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`I have taken them into consideration in rendering my opinions and conclusions.
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` MATERIALS CONSIDERED
`39. My analysis and conclusions set forth in this declaration are based on
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`my educational background and experiences in the field (see Section IV). Based on
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`Patent No. 8,947,164
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`my above-described experience, I believe that I am considered to be an expert in
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`the field. Also, based on my experiences, I understand and know of the capabilities
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`of persons of ordinary skill in the field during the 1980s-1990s, and I taught,
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`participated in organizations, and worked closely with many such persons in the
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`field during that time frame.
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`40. As part of my independent analysis for this declaration, I have
`
`considered the following: the background knowledge/technologies that were
`
`commonly known to persons of ordinary skill in this art during the time before the
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`earliest claimed priority date for the ’164 Patent; my own knowledge and
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`experiences gained from my work experience in the field of the ’164 Patent and
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`related disciplines; and my experience in working with others involved in this field
`
`and related disciplines.
`
`41.
`
`In addition, I have analyzed the publications and materials listed
`
`above.
`
` OVERVIEW OF THE ’164 PATENT
`42. The ’164 Patent “relates to enhancing power amplifier performance
`
`and more specifically to improving the forward power detection under variable
`
`loading conditions caused by the environment.” EX-1001, 14-17. The Challenged
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`Claims are directed to techniques for detecting amplifier forward power output of
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`an amplifier using a detection circuit coupled to the input and output of the
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`Patent No. 8,947,164
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`amplifier.
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`43. As the ’164 Patent’s discussion of prior art describes, under
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`mismatched PA output to the load conditions, reflected power travels from the load
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`to the output of a power amplifier, confounding attempts to measure the forward
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`power that is delivered to a load. EX-1001, 3:13-43. The patent describes various
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`prior art power detectors that detect power only at the amplifier output, leading to
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`inaccurate forward power detection. Id., 3:58-64. Another described prior art
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`power detector detects power only at the input of a power amplifier gain stage,
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`which can cause reduced detection sensitivity and “a reduced ability to control the
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`phase and amplitude mismatch.” Id., 4:28-45. With this background, the ’164
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`Patent seeks to measure forward power output more accurately by measuring
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`signals at both the input and the output of an amplifier gain stage. Id., 3:8-12.
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`44. Referring to FIG. 7 (reproduced in annotated form below), one
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`embodiment of the ’164 Patent’s power amplifier includes a power amplifier
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`having a final gain stage and a feedback loop. Id., 5:16-23. At an input of the final
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`gain stage, a first phase control circuit and a first amplitude control circuit are
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`connected in series to a detection circuit. Id., 23-26. A second phase control circuit
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`and a second amplitude control circuit are connected in series between the output
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`of the final gain stage and the detection circuit. Id., 30-35. “[T]he signal produced
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`by the first phase and amplitude control circuits 712, 714 and the signal produced
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`19
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`by the second phase and amplitude control circuits 716, 718 are summed in the
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`detection circuit 710 to produce a summed RF signal. The summed RF signal has a
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`power proportional to a forward power output of the power amplifier.” Id., 38-44.
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`These components are all arranged in the same chip. Id., 19-21.
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`Annotated FIG. 7 of the ’164 Patent
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`45. FIG. 8, which further describes the implementation of FIG. 7 and is
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`reproduced in annotated form below, shows the operation of the detection circuit
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`and control circuits in more detail. In a first circuit block, a capacitor, a variable
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`capacitor, a bipolar junction transistor, and a current source are connected to
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`receive the signal from the input of the gain stage. Id., 6:6-13. These components
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`are described as together forming “a first phase and amplitude control circuit.” Id.,
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`20
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`3-6. This first circuit block functions (i) as a buffer circuit that passes a signal from
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`the gain stage input to the detection circuit input, (ii) as a DC-blocking filter, and
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`(iii) as a phase shifter. The buffer function is provided by transistor 820, the filter
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`is provided by capacitor 816, and the phase shifter is provided by capacitor 818. A
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`second circuit block, connected to receive a signal from the output of the gain
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`stage, includes two capacitors, a variable capacitor, and a programmable resistor.
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`EX-1001, 13-16. This second circuit block functions as “a second phase and
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`amplitude control circuit,” where the amplitude control is provided at least partly
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`by the programmable resistor 830 and the phase control is provided at least partly
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`by variable capacitor 838. EX-1001, 4-5. Currents from the two circuit blocks sum
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`at node 840, and the summed current flows into a detection circuit.
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`46. The ’164 Patent describes that, at a summing node, currents from the
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`first circuit block and second circuit block are summed to produce an output that
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`“is proportional to the RF signal output of the power amplifier.” EX-1001, 28-30.
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`The summed current is operated on by diode 832, which controls current through
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`the line having the summed current. A third circuit block (detection circuit 810),
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`into which the summed current flows, includes the diode, a current source, and a
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`capacitor. This block “creates a direct current (DC) voltage that is proportional to
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`the amplitude of the RF signal at the summing node . . . The DC voltage . . . is also
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`proportional to the voltage associated with the power of the signal output from
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`21
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`the power amplifier.” EX-1001, 6:30-35.
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`Patent No. 8,947,164
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`Annotated FIG. 8 of the ’164 Patent
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`47. The ’164 Patent provides inconsistent and contradictory explanations
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`for the proportionalities associated with various signals. For example, the ’164
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`Patent describes that “the detection circuit 610 produces an output signal that is
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`proportional to the forward power output of the power amplifier 600,” but also
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`describes that “the output 840 of the detection circuit 702 is proportional to the RF
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`signal output of the power amplifier” and that “the summed RF signal [at the
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`output 840 as shown in FIG. 8] has a power proportional to a forward power
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`22
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`Patent No. 8,947,164
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`output.” EX-1001, 5:1-2, 5:42-43, 6:28-30.1 These relationships are different from
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`one another and at least partially mutually exclusive: for a fixed load on a signal,
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`the power of the signal increases as the square of the amplitude of the signal, so
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`that, as a POSITA would have understood, the same signal cannot both be
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`“proportional to the forward power output” and “ha[ve] a power proportional to a
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`forward power output.”
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`48. This ambiguity is reinforced by a comparison of the ’164 Patent’s
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`claims to the specification. The ’164 Patent describes, in reference to FIG. 6, a
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`circuit that has a topology exactly matching the circuit described by claim 1, with
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`1 Although these descriptions are provided in reference to different
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`implementations, the ’164 Patent does not otherwise describe any differences in
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`output between the implementations, and a POSITA would have understood that
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`the description was intended to convey the same information. For example, the
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`only difference between FIGS. 6 and 7 is that FIG. 7 additionally includes
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`amplitude and phase control circuits at an input of the detection circuit; it would
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`have been obvious to a POSITA that this difference would not cause an output
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`signal to be proportional to a power output in the former and to have a power
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`proportional to the power output in the latter.
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`the exception that the specification describes a signal proportional to (not having a
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`power proportional to) the forward power output, while claim 1 recites that the
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`signal “has a power2 proportional to a forward power output.” EX-1001, 4:46-
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`5:15, 8:4-6. For example, “[t]he amplitude control circuit 612 and the phase control
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`circuit 614 produce a signal that is received by the second detection circuit 610
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`input so that the detection circuit 610 produces an output signal that is proportional
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`to the forward power output of the power amplifier 600,” wh