(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2009/0034354 A1
`(43) Pub. Date:
`Feb. 5, 2009
`Resnick
`
`US 20090034354A1
`
`(54) METHOD, SYSTEM, AND APPARATUS FOR
`VOLTAGE SENSING AND REPORTING
`
`David R. Resnick, Boise, ID (US)
`(75) Inventor:
`Correspondence Address:
`TRASK BRITT, P.C./ MICRON TECHNOLOGY
`P.O. BOX 2.5SO
`SALT LAKE CITY, UT 84110 (US)
`(73) Assignee:
`
`MICRON TECHNOLOGY, INC.,
`Boise, ID (US)
`11/830,531
`
`(21) Appl. No.:
`
`(22) Filed:
`
`Jul. 30, 2007
`
`Publication Classification
`
`(51) Int. Cl.
`(2006.01)
`GLIC 29/50
`(52) U.S. Cl. ........................................................ 36.5/228
`
`ABSTRACT
`(57)
`A method, apparatus and system are disclosed for sensing and
`reporting Voltage levels in a semiconductor device. One Such
`Voltage sensor and reporting device is configured to sense and
`compare a reference Voltage and an operating Voltage. In one
`or more embodiments we Voltage sensor is also configured to
`generate an alarm signal if the difference between the oper
`ating Voltage and the reference Voltage indicates the operating
`Voltage is outside of a normal operating range.
`
`Memory Banks/
`Operational Circuits
`
`-- 120
`
`
`
`112
`
`-
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 1
`
`

`

`Patent Application Publication
`
`Feb. 5, 2009 Sheet 1 of 3
`
`US 2009/0034354 A1
`
`Memory Banks/
`Address
`Operational Circuits
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`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 2
`
`

`

`Patent Application Publication
`
`Feb. 5, 2009 Sheet 2 of 3
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`US 2009/0034354 A1
`
`Control
`Interface
`
`22O
`
`
`
`Memory Controller
`
`FIG. 3
`
`
`
`
`
`
`
`
`
`Processor(s) -
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 3
`
`

`

`Patent Application Publication
`
`Feb. 5, 2009 Sheet 3 of 3
`
`US 2009/0034354 A1
`
`Generate a reference voltage.
`
`51O
`
`Compare the reference voltage With an N.- 520
`Operating Voltage.
`
`
`
`
`
`ls the operating N
`NO & voltage above an upper threshold or s
`X
`below a IoWer threshold? -
`
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`
`550
`
`Store the numeric value.
`
`- 560
`
`Read the numeric value.
`
`570
`
`Modify Operating Parameters.
`
`580
`
`FIG. 5
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 4
`
`

`

`US 2009/0034354 A1
`
`Feb. 5, 2009
`
`METHOD, SYSTEM, AND APPARATUS FOR
`VOLTAGE SENSING AND REPORTING
`
`FIELD OF THE INVENTION
`0001 Embodiments of the present invention relate to volt
`age sensors and, particularly, in one or more embodiments, to
`determining and reporting various Voltages on a semiconduc
`tor device, sensing and reporting methods, and systems
`including sensing and reporting capability.
`BACKGROUND
`0002 Semiconductor devices, like most electronic prod
`ucts, are sensitive in their operation to Supplied Voltage levels.
`If Voltage levels at working parts are lower than specified
`minimum requirements, the parts may malfunction. If voltage
`levels are higher than specified maximum requirements, the
`parts may malfunction and can also suffer catastrophic fail
`ure. In semiconductor memory devices, for example, such as
`Dynamic Random Access Memories (DRAMs), inadequate
`Voltage levels may cause memory parts to malfunction by
`reading out or storing incorrect information. Such low Volt
`age failures are often difficult to detect, and even when they
`are detected the resultant functional and data errors can sel
`dom be recovered.
`0003. Often, the semiconductor device is still operational
`when the Voltage levels become marginal causing the device
`to potentially fail in some aspect. For example, a memory
`device may not meet its full timing specifications at low
`Voltages, resulting in a failure to read correct data. Even
`though the read data may be correct, the access time until
`correct data is available may be longer than designated by the
`device specification. Similarly, a low Voltage level may result
`in the memory device's bit-cell capacitors not having enough
`time to fully change during a write cycle, even though they
`would work correctly if given additional time to complete the
`write cycle. In Such a case, the bit-cells cannot be properly
`read and the data becomes corrupted.
`0004. There are many causes for unsuitable voltage levels
`to semiconductor devices, such as power Supply errors and
`power distribution path effects. Power supply errors may
`result when the power Supply is inadequate, misadjusted, or
`fails all together. Power distribution path effects influence
`Voltage levels, for example through transient noise signals,
`inductance, and/or resistance in power distribution paths. As
`semiconductor device activity increases, these power distri
`bution path effects often add together and further increase the
`chances of data and functional errors.
`0005. Historically, voltage sensors have been used to
`detect the voltage levels coming directly from the power
`Supplies. However, these devices are limited to sensing Volt
`age errors in he supply Voltage. These systems are not capable
`of detecting whether voltage levels are unsuitable at specific
`locations (e.g., circuits) within the semiconductor device
`itself. Thus, these devices do not detect unsuitable voltage
`levels not caused by the Voltage source itself. Such as the
`distribution path effects described above.
`0006. In view of the shortcomings in the prior art, it would
`be advantageous to provide a semiconductor device capable
`of sensing and/or reporting Voltage levels at operational cir
`cuits within the semiconductor device.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`0007 FIG. 1 is a block diagram illustrating a semiconduc
`tor memory device including a voltage sensing and reporting
`device according to one embodiment of the invention.
`
`0008 FIG. 2 illustrates a voltage sensing and reporting
`device including numeric result reporting according to one
`embodiment of the invention.
`0009 FIG. 3 is a memory card containing a plurality of
`semiconductor memory devices containing a Voltage sensing
`and reporting device according to one embodiment of the
`invention.
`0010 FIG. 4 is a computing system diagram showing a
`plurality of semiconductor memories containing a Voltage
`sensing and reporting device according to one embodiment of
`the invention.
`0011
`FIG. 5 is a flow diagram illustrating a method for
`sensing and reporting Voltage in a semiconductor memory
`device according to one embodiment of the invention.
`
`DETAILED DESCRIPTION
`0012. In the following detailed description, circuits and
`functions may be shown in block diagram form in order not to
`obscure the present invention in unnecessary detail. Addition
`ally, block definitions and partitioning of logic between vari
`ous blocks as depicted is non-limiting, and comprise
`examples of only specific implementations. It will be readily
`apparent to one of ordinary skill in the art that the present
`invention may be practiced in a variety of embodiments
`implementing numerous other partitioning solutions.
`0013 Also, it is noted that the embodiments may be
`described interms of a process that is depicted as a flowchart,
`a flow diagram, a structure diagram, or a block diagram.
`Although a flowchart may describe operational acts as a
`sequential process, many of these acts can be performed in
`another sequence, in parallel, or Substantially concurrently. In
`addition, the order of the acts may be re-arranged. A process
`is terminated when its acts are completed. A process may
`correspond to a method, a function, a procedure, a Subroutine,
`a Subprogram, etc. When a process corresponds to a function,
`its termination corresponds to a return of the function to the
`calling function or the main functions
`0014 FIG. 1 is a block diagram illustrating a semiconduc
`tor memory device 100 including a Voltage sensing and
`reporting device according to one embodiment. The semicon
`ductor memory device 100 may be a DRAM with conven
`tional memory banks and operational circuits 140 and be
`controlled by conventional address, command, and data buses
`142. Semiconductor memory device 110 includes at least one
`Voltage sensor 110 for sensing Voltages. The at least one
`Voltage sensor 110 may include a Voltage comparator config
`ured according to any of the known configurations in the art.
`The Voltage comparator may be configured to compare an
`operating voltage (108A, 108B), such as V, or V to a
`reference Voltage (102A, 102B), such as V, or V., for
`determining a voltage difference. The term “voltage differ
`ence.” as used herein, refers to a quantifiable difference
`between the operating Voltage level and the reference Voltage
`level, which difference may be expressed as a numerical
`value.
`0015 The operating voltage (108A, 108B) may be a Sup
`ply Voltage 108A from an input pin or may be an operating
`voltage 108B generated internally on the semiconductor
`memory device 100. The operating voltage (108A, 108B)
`may be configured to Supply a Voltage to one or more opera
`tional circuits 140 of the semiconductor memory device 100.
`By way of example and not limitation, operational circuits
`140 may include column decoder circuits, write driver cir
`cuits, data read and write multiplexers, DC sense amplifiers,
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 5
`
`

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`US 2009/0034354 A1
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`Feb. 5, 2009
`
`etc. Although FIGS. 1 and 2 illustrate the operating voltage
`(108A, 108B) coupled to operational circuits 140, one of
`ordinary skill in the art will recognize that the operating
`voltage (108A, 108B) may be further coupled to other ele
`ments in FIGS. 1 and 2 although it may not be specifically
`illustrated.
`0016 Similar to the operating voltage (108A, 108B), the
`reference voltage (102A, 102B) may be a supply voltage
`102A from an input pin to the semiconductor device, or the
`reference Voltage may be a reference voltage 102B generated
`internally on the semiconductor memory device 100 in any
`manner known in the art. By way of example and not limita
`tion, the internally generated reference voltage 102B may be
`generated from a simple resistor Voltage divider, a Voltage
`drop generated by a forward biased diode, a reverse-biased
`Zener diode, or a bandgap reference circuit. Since different
`circuits of the semiconductor device may require different
`Voltage levels, there may be more than one reference Voltage
`in semiconductor memory device 1X. The reference Voltage,
`as known in the art, may be characterized as a Substantially
`constant Voltage within conventional tolerances. In some
`embodiments, the reference Voltage may comprise a ground
`as opposed to an actual Voltage level.
`0017. The at least one voltage sensor 110 may be config
`ured to compare the different reference voltages with differ
`ent operating Voltages. As a non-limiting example, Voltage
`sensor 110 may be set to compare a first reference Voltage V,
`with a first operating Voltage V. Voltage sensor 110 may
`further be set to compare a second voltage reference V, with
`a second operating voltage V. It will be apparent to one of
`ordinary skill in the art that it is possible to compare a plural
`ity of reference Voltages with a plurality of operating Voltages
`according to numerous combinations, including the disposi
`tion of more than one Voltage sensor 110 on the semiconduc
`tor memory device 100. In some embodiments, a single volt
`age sensor 110 may be operably connected to compare a
`plurality of operating Voltages to one or more reference Volt
`ages as described below.
`0018. Further, a voltage sensor 110 may be configured to
`signal an alarm in the case where the operating Voltage is
`outside of a range. As used herein, "range' signifies the mag
`nitude of the voltage is beyond a predetermined threshold
`level, which may be an upper or lower level relative to an
`expected, or normal operating Voltage, and is not to be read as
`requiring the device to necessarily have an operating range
`sensed between an upper and a lower threshold. In some
`embodiments the voltage sensor 110 may be configured to
`signal an alarm when the operating Voltage is above an upper
`threshold or below a lower threshold, as determined from
`comparison with the reference voltage. In other embodi
`ments, the Voltage sensor 110 may be configured to signal an
`alarm only when the voltage level is below a lower threshold,
`while having no upper limit In still other embodiments the
`Voltage sensor 110 may be configured to signal an alarm only
`when the voltage level is above an upper threshold. Thus, use
`of the term “range’ herein is not limited to embodiments
`requiring upper and lower thresholds.
`0019. If the operating voltage is above or below the rel
`evant threshold, voltage sensor 110 may indicate the voltage
`failure by sending a flag such as alarm signal 112 to a pin on
`semiconductor memory device 100 for signaling the alarm
`externally. It is contemplated that voltage sensor 110 may be
`coupled to, and share a previously existing pin on semicon
`ductor memory device 100, such as, for example, a boundary
`
`scan pin. One of ordinary skill in the art will recognize that
`any existing pin Suitable for sharing may be used to commu
`nicate the Voltage sensor output. Alternatively, a new pin may
`be provided on semiconductor memory device 100 with
`which voltage sensor 110 may be associated. As described
`above, there may be more than one Voltage Supplied within
`the semiconductor memory device 100. In this case a voltage
`sensor 110 may he provided for each Supplied Voltage, or, as
`described above, voltage sensor 110 may be configured to
`compare multiple reference Voltages to multiple operating
`voltages. In the case where a voltage sensor 110 is provided
`for each Voltage, the outputs for each of the Voltage sensors
`may be connected to the same output pin through an optional
`output controller 114. By way of non-limiting example, out
`put controller 114 may be configured as one or more logic
`OR gates, or as a multiplexer.
`0020. As stated, the pin on semiconductor memory device
`100 for carrying the alarm signal 112 externally may be
`configured as a boundary scan output pin or other internal
`scan output pin. When not configured for performing a scan
`function, the scan output pin may be configured to carry the
`output from the output controller 114 (if present) or directly
`carry the alarm signal 112. For example, the pin can serve to
`carry the alarm signal 112 externally during normal opera
`tion, when scan functions or other similar functions are not
`being cared out. When placed into a maintenance or scan
`mode, the pin may be configured to carry out such other
`function or functions instead of carrying the alas signal 112.
`0021. The output pin may be operably coupled to any
`Suitable external component, which may also be character
`ized as an external module. By way of example and not
`limitation, the output pin may be operably coupled to a
`memory controller, to receive the alarm signal 112 from the at
`least one Voltage sensor 110. Upon receiving the alarm signal
`112, the memory controller may be configured to adjust an
`operating parameter for the semiconductor memory device
`100. As a non-limiting example, the memory controller may
`adjust the timing, and/or the power Voltage levels for the
`semiconductor memory device 100. Adjusting the timing
`may allow more time to complete operations of the semicon
`ductor memory device 100. For example, the adjustment may
`provide semiconductor memory device 100 with more time to
`complete reading and writing operations.
`0022. In another embodiment, and as a non-limiting
`example, the output pin of the semiconductor memory device
`100 may be operably coupled to a maintenance system. The
`maintenance system may be configured to adjust an operating
`parameter for the semiconductor memory device 100 upon
`receiving the alarm signal 112. In still another embodiment,
`the output pin may be operably coupled to both a maintenance
`system and a memory controller.
`(0023. With further reference to FIG. 1, a mode register 120
`may be operably coupled to Voltage sensor 110 and config
`ured to control the operation of voltage sensor 110. By way of
`example and not limitation, mode register 120 may be an
`existing mode register within semiconductor memory device
`100. For example, mode register 120 may be a mode register
`used for another function in semiconductor memory device
`100. Alternatively, mode register 120 may be added as a
`unique register to the circuit architecture of semiconductor
`memory device 100. For example, mode register 120 may be
`added in an unused extended mode register position conven
`tionally found in current DRAMs. The mode register 120 may
`be controlled and written to using conventional memory
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 6
`
`

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`US 2009/0034354 A1
`
`Feb. 5, 2009
`
`device commands. Mode register 120 may be configured to
`control voltage sensor 110 with one or more bits. At least one
`bit may be provided and used to enable and disable voltage
`sensor 110. One or more additional bits may be provided and
`used to select which voltage reference is to be used when
`there are more than one voltage references available. Addi
`tionally, mode register 120 may be configured to provide one
`or more bits for selecting which operating Voltage to compare
`in the case that there are more than one operating Voltages. In
`the case where there may be more tan one voltage sensor 1 I 0.
`one or more bits may be provided from mode register 120 to
`control additional voltage sensors. Mode register 120 may
`also be used to define and enable he adjustment of the upper
`and lower threshold value for each of the operating voltages
`(108A and 108B). Mode register 120 may additionally be
`used to select which Voltage sensor 110 may communicate
`through the output pin on the semiconductor memory device
`100. In some embodiments, mode register 120 may be
`coupled to output controller 114 to control the operations of
`output controller 114.
`0024. One of ordinary skill in the art will recognize that
`multiple mode registers may be used instead of just one, as
`described above, in appropriate situations. As a non-limiting
`example, a different mode register may be used to control
`each of a plurality of Voltage sensors 110 on the semiconduc
`tor memory device 100. In addition, another mode register
`may be used to select which Voltage sensor 110 is communi
`cating through the alarm signal 112. The additional mode
`register may select a Voltage sensor directly to communicate
`through the alarm signal 112, or the mode register may select
`which Voltage sensor may communicate by controlling out
`put controller 114. In addition, if the alarm signal 112 is
`configured on a scan output pin, the mode register 120 may
`control whether the scan output pin is configured to carry the
`alarm signal 1I 2, or conventional scan output signals.
`0025. As described above, in some embodiments a single
`Voltage sensor 110 may be operably connected to compare a
`plurality of operating Voltages to one or more reference Volt
`ages. In these embodiments a multiplexer 150 (shown in
`broken lines in FIG. 1) may be employed to control which
`operating Voltage is being compared with a reference Voltage.
`The multiplexer 150 may further control the duration of time
`each operating Voltage is compared wit the reference Voltage.
`A Suitable multiplexer 150 may comprise transmission gates
`so that the operating Voltages are sent through the multiplexer
`150 to the voltage sensor 10. Additionally, a suitable multi
`plexer 150 may exhibit an impedance which is relatively low
`compared to the other transmission line impedances. In Such
`embodiments, a mode register as described above may be
`employed to control the multiplexer 150 and the rate at which
`the different operating Voltages are compared.
`0026. Additionally, one of ordinary skill in the art will
`recognize that embodiments of the present invention may be
`configured without a mode register. As a non-limiting
`example, a Voltage sensor 110 may be configured to compare
`a single operating voltage (108A or 108B) with a single
`reference voltage (102A or 102B) and to generate alarm
`signal 112 in the case the Voltage difference is greater than a
`preset level.
`0027 FIG. 2 illustrates a voltage sensing and reporting
`device including numeric result reporting according to one
`embodiment. At least one Voltage sensor 110 may include an
`analog-to-digital (A/D) converter 111. A/D converters are
`well known in the art and any suitable A/D converter may be
`
`employed. The A/D converter 111 may be used to convert the
`voltage difference between the reference voltage (102A,
`102B) and the operating voltage (108A, 108B) to a numeric
`value specified by one or more bits. In embodiments in which
`the reference voltage is a ground, as described above, the A/D
`converter 111 may be used to convert the operating Voltage to
`a numeric value relative to the ground. An output register 130
`may be operably coupled to an output of the A/D converter
`111 and configured to receive and store the numeric value of
`the Voltage difference from the at least one Voltage sensor
`110. As a non-limiting example, an operating Voltage that is
`too low may be sensed in a Voltage sensor 110 and compared
`to the reference voltage. The value of the voltage difference
`may be indicated by a numeric value converted by the A/D
`converter. The numeric value may be in the form of a plurality
`of bits such as, for example, a byte. The numeric value may be
`sent from the A/D converter 111 to the output register 130
`either serially, if there is only a single communication line, or
`through a bus (not shown). The numeric value may be stored
`in output register 130. Output register 130 may be further
`operably coupled to the same output pin configured to carry
`alarm signal 112 and may be configured to send the numeric
`value serially to the output pin as either part of or separate
`from a scan path.
`0028. As described above, the output pin may be operably
`coupled to any Suitable external component, which may also
`be described as an external module, such as a memory con
`troller, a maintenance system, etc. In embodiments similar to
`that illustrated in FIG.2, the suitable external component may
`receive the alarm signal 112 generated by the Voltage sensor
`110. By way of example and not limitations the suitable
`external component may comprise a memory controller.
`Upon receipt of the alarm signal 112, the memory controller
`may send control bits to the mode register(s) 120 indicating
`that output register 130 should send its contents out on the
`alarm signal 112 in a serial fashion. The mode register 120
`may control the output register 130 and output controller 114
`to cause the serial output to occur. As with the alarm signals,
`the output register content may be serially scanned out on a
`dedicated signal pin, another multiple function pin, an inter
`nal scan pin, a boundary scan pin, etc.
`0029. In some embodiments, as described above, mode
`register 120 may be operably coupled and configured to con
`trol output register 130. Similar to FIG. 1, above, mode reg
`ister 120 may be the same mode register used to control
`voltage sensor 110 and/or output controller 114. In other
`embodiments, mode register 120 may be a separate mode
`register from the mode register configured to control Voltage
`sensor 110 and output controller 114. Mode register 120 may
`provide one or more bits for controlling the operation of
`output register 130.
`0030. Similar to FIG. 1, above, the embodiment illustrated
`in FIG.2 may include a single voltage sensor I 10 operably
`connected to compare a plurality of operating Voltages to one
`or more reference Voltages. These embodiments may include
`the multiplexor 150 as described above with relation to FIG.
`1
`0031. As shown in FIG. 3, a substrate 200, such as a
`printed circuit board (PCB), in accordance with an embodi
`ment of the present invention, includes a plurality of semi
`conductor memory devices 100', at least one of which incor
`porates at least one embodiment of a Voltage sensing and
`reporting device as described herein. It should be understood
`that each semiconductor memory device 100' might comprise
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 7
`
`

`

`US 2009/0034354 A1
`
`Feb. 5, 2009
`
`one of a wide variety of devices, including, for example,
`Dynamic RAM (DRAM) devices, Static RAM (SRAM)
`devices, and Flash memory devices. The output pin config
`ured to carry the alarm signal of each of the semiconductor
`memory devices 100'hat Support the Voltage sensing function
`may be operably coupled to a suitable external component,
`which may also be characterized as set forth above as an
`external module, that is configured to receive the alarm signal
`112. For example, the output pins may be operably coupled to
`a memory controller 220 through a memory controller inter
`face 210. Upon receiving the alarm signal 112, the memory
`controller 220 may adjust an operating parameter as
`described above. As shown in FIG. 4 an electronic system
`300. Such as a computer system, in accordance with an
`embodiment of the present invention, comprises at least one
`input device 310, at least one output device 320, at least one
`processor 330, and at least one memory device 340. As used
`herein, the term "computer system’ includes not only com
`puters such as personal computers and servers, but also wire
`less communications devices (e.g., cellphones, personal digi
`tal assistants configured for text messaging and email),
`cameras, chip sets, set top boxes, controllers, vehicle and
`engine control and sensor Systems, and other combinations of
`the above-referenced input, output, processor and memory
`devices. The at least one memory device 340 comprises at
`least one semiconductor memory device 100 incorporating at
`least one of the Voltage sensing and reporting device
`described herein according to an embodiment of the inven
`tion. As a non-limiting example, each memory device 340
`may comprise a module configured as a Substrate 200 bearing
`multiple semiconductor memory devices 100 as is illustrated
`in FIG. 3. It should be understood that the semiconductor
`memory devices 100 may be selected from a wide variety of
`devices, including, for example, Dynamic RAM (DRAM)
`devices, Static RAM (SRAM) devices, and Flash memory
`devices, and combinations thereof.
`0032. Furthermore, embodiments of the present invention
`can be implemented in types of semiconductor devices other
`than memories. By way of non-limiting example, embodi
`ments of the present invention may be implemented in micro
`processors, microcontrollers, system-on-a-chip, and image
`sensors. As a non-limiting example, in a microprocessor or
`microcontroller, clock speed, execution unit operation, and
`memory access times may be adjusted responsive to results
`from the voltage sensor 110 (FIGS. 1 and 2). As another
`non-limiting example in an image processor, operational
`parameters such as integration time, pixel reset times, pixel
`reset Voltages, analog-to-digital conversion operations, and
`signal processing operations such as bit repairs and image
`compression may be adjusted responsive to results from the
`voltage sensor 110.
`0033. One of ordinary skill in the art will recognize that
`when implemented in semiconductor devices other than
`memories, the mode register(s) used to control the Voltage
`sensor 110, output controller 114, and output register(s) 130
`would be written to using command appropriate for the semi
`conductor device rather than conventional memory com
`mands that may be used in a DRAM or flash memory device.
`0034 FIG. 5 illustrates one embodiment of a method of
`sensing and reporting Voltage levels in a semiconductor
`memory device. A reference voltage may be generated at 510.
`The reference Voltage may be generated, for example, from a
`power Supply, a simple resistor Voltage divider, a Voltage drop
`generated by a forward biased diode, a reverse-biased Zener
`
`diode, abandgap reference circuit, an external Voltage source,
`or any other method known to those of ordinary skill in the art.
`The reference Voltage may be compared to an operating Volt
`age in a Voltage sensor at 520. The reference Voltage and
`operating Voltage may be compared in a Voltage comparator.
`The Voltage sensor may determine whether the operating
`Voltage is within an acceptable range above an upper thresh
`old or below a lower threshold at 530. Wthe operating voltage
`is within normal operating conditions, e.g., below the upper
`threshold and above the lower threshold, the process returns
`to comparing the operating Voltage with the reference Volt
`age. It however, the operating Voltage is outside of the normal
`operating range, e.g., below a lower threshold or above an
`upper threshold, an alarm signal may be generated at 540. The
`upper and lower thresholds selected may vary according to
`the specific application. In some embodiments the sequence
`illustrated in FIG. 5 may end at this point and may use an
`external device (e.g., a maintenance system) for providing
`outside Support Such as adjustments to one or more opera
`tional parameters.
`0035. In other embodiments a numeric value indicative of
`the operating voltage may be generated at 550. The numeric
`value may then be stored for later retrieval at 560, and the
`stored numeric value may be retrieved and read by another
`device at 570. By way of example, and not limitation, the
`numeric value may be stored in an output register, and
`retrieved by a control module. Those of ordinary skill in the
`art will recognize that the numeric value may be stored in any
`suitable register or memory location. Additionally, the alarm,
`the numeric value, or both, may be made available to any
`external module determined by the designer to be suitable. By
`way of example and not limitation, the alarm, the numeric
`value, or both, may be made available to at least one of a
`memory controller and a maintenance system. Adjustments
`may be made to one or more operational parameters on the
`semiconductor memory device to compensate for the power
`issues based on at least one of the alarm signal and the
`numeric value at 580.
`
`CONCLUSION
`
`0036. In one embodiment of the present invention a semi
`conductor device may employ at least one reference Voltage.
`At least one operating Voltage may be employed, associated
`with at least one circuit of the semiconductor device. At least
`one Voltage sensor is configured to compare the at least one
`reference Voltage and the at least one operating Voltage. The
`Voltage sensor may, optionally, be configured to generate an
`alarm signal if a difference between the operating Voltage and
`the reference Voltage is greater than a predetermined amount.
`0037. In another embodiment of the invention, a memory
`card comprising a plurality of memory devices is provided. At
`least one of the memory devices is configured with at least
`one Voltage sensor as described above.
`0038 Another embodiment of the invention comprises an
`electronic system. The electronic system may include at least
`one input device, at least one output device, a processor, and
`at least one memory device configured with at least one
`Voltage sensor as described above
`0039. An embodiment of a method for sensing and report
`ing a Voltage in a semiconductor device is also provided, the
`method including comparing an operating Voltage to a refer
`ence Voltage and determining whether the operating Voltage
`is outside a predetermined Voltage range. The method may
`
`Samsung Electronics Co., Ltd.
`Ex. 1065, p. 8
`
`

`

`US 2009/0034354 A1
`
`Feb. 5, 2009
`
`further include generating an alarm signal when the operating
`Voltage is outside the predetermined Voltage range.
`0040. While certain embodiments have been described
`and shown in the accompanying drawings, such embodi
`ments are merely illustrative and not restrictive of the scope of
`the invention, and this invention is not limited to the specific
`constructions ad arrangements shown and described, since
`various other additions and modifications to, a