`
`In the Matter of Certain Memory Modules and
`Components Thereof and Products Containing Same
`Inv. No. 337‐TA‐1023
`
`May 8, 2017
`
`CDX‐200.
`
`1
`
`Samsung Ex. 1077, p. 1
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Technology Overview: Memory Module
`
` The Netlist Patents relate to memory modules in a server
`
`Memory Slot
`
`Server Mother Board
`
`Memory Module
`
`• A memory module is
`inserted in a memory slot in a
`server’s mother board
`
`• Memory modules are called
`Dual In‐Line Memory
`Modules (DIMMs) because
`there are in‐line connections
`on each side of the module
`
`CDX‐200.
`
`3
`
`Samsung Ex. 1077, p. 2
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Technology Overview: What is Memory?
`
` Memory is used to store information for fast access by the processor
`
` Memory commonly used today is SDRAM or synchronous dynamic
`random access memory
`
`• SDRAM emerged in the 1990s and has been standardized by the JEDEC
`(Joint Electron Devices Engineering Council)
`
`• SDRAM has evolved in several generations, including DDR, DDR2, DDR3
`and currently DDR4
`
`CDX‐200.
`
`4
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`Samsung Ex. 1077, p. 3
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`CDX‐200.
`
`5
`
`Technology Overview: SDRAM Fundamentals
`
`SDRAM contains several sections
`called banks
`
`Each bank consists of rows and
`columns of memory
`
`Die
`
`Samsung Ex. 1077, p. 4
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Technology Overview: Memory Ranks
`
` A rank is a set of DRAMs that are written to or read from together
`
` For example, a memory controller reads or writes 64 DQ (data) bits at a time
`• Each DRAM reads/writes 8 DQ bits (x8, or by eight)
`• Need 8 DRAMs in a rank to provide the 64 bits at once
`
`DIMM
`
`RANK 1
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`RANK 0
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`x8
`
`x8
`
`x8
`
`x8
`
`x8
`
`x8
`
`x8
`
`x8
`
`DQ
`
`M E M O R Y C O N T R O L L E R
`
`CDX‐200.
`
`6
`
`Samsung Ex. 1077, p. 5
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Technology Overview: Data Strobe Signal
` Data Strobe (DQS) clocks the data (DQ) into and out of the DRAM
`
`tCK/2
`
`DDR1: 5 ns
`DDR2: 2.5 ns
`DDR3: 1.25 ns
`DDR4: 0.55 ns
`
` One nanosecond (1 ns) is one billionth of a second
` A signal travels roughly 6 inches in 1 ns in a memory module not
`accounting for load
`
`CDX‐200.
`
`7
`
`Samsung Ex. 1077, p. 6
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Evolution of DIMMs: JEDEC Un‐Buffered DIMM (UDIMM)
`
`ADDRESS/COMMAND/CLOCK
`
`UDIMM
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`DQ/DQS
`
`M E M O R Y C O N T R O L L E R
`
`CDX‐200.
`
`8
`
`Samsung Ex. 1077, p. 7
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Evolution of DIMMs: JEDEC Registered DIMM (RDIMM)
`
`ADDRESS/COMMAND/CLOCK
`
`RDIMM
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`DQ/DQS
`
`REGISTER
`
`M E M O R Y C O N T R O L L E R
`
`CDX‐200.
`
`9
`
`Samsung Ex. 1077, p. 8
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Evolution of DIMMs: Fully‐Buffered DIMM (FBDIMM)
`
`FBDIMM
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`ADDR / CMD/ CLK
`
`AMB
`
`DQ/DQS
`
`M E M O R Y C O N T R O L L E R
`
`CDX‐200.
`
`10
`
`Samsung Ex. 1077, p. 9
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Evolution of DIMMs: JEDEC DDR3 LRDIMM (Gen1)
`
`DDR3 LRDIMM
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`COMMAND/ADDRESS/CLOCK
`
`REGISTER/
`BUFFFER
`
`DQ/DQS
`
`M E M O R Y C O N T R O L L E R
`
`trace length
`~3”
`
`CDX‐200.
`
`11
`
`Samsung Ex. 1077, p. 10
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`
`
`Technology Today: JEDEC DDR4 LRDIMM (Gen2)
`
`DDR4 LRDIMM
`
`DRAM
`
`1
`
`DRAM
`
`2
`
`DRAM
`
`3
`
`DRAM
`
`4
`
`DRAM
`
`5
`
`DRAM
`
`6
`
`DRAM
`
`7
`
`DRAM
`
`8
`
`REGISTER
`
`DB
`
`DB
`
`DB
`
`DB
`
`DB
`
`DB
`
`DB
`
`DB
`
`M E M O R Y C O N T R O L L E R
`
`trace length
`~0.3”
`DQ/DQS
`
`CDX‐200.
`
`14
`
`Samsung Ex. 1077, p. 11
`Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996
`
`