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`Application Note AN-1071
`
`
`Class D Audio Amplifier Basics
`
`By Jun Honda & Jonathan Adams
`
`
`Table of Contents
`
`
` Page
`What is a Class D Audio Amplifier? – Theory of Operation..................2
`Topology Comparison – Linear vs. Class D .........................................4
`Analogy to a Synchronous Buck Converter..........................................5
`Power Losses in the MOSFETs ...........................................................6
`Half Bridge vs. Full Bridge....................................................................7
`Major Cause of Imperfection ................................................................8
`THD and Dead Time ............................................................................9
`Audio Performance Measurement........................................................10
`Shoot Through and Dead Time ............................................................11
`Power Supply Pumping........................................................................12
`EMI Consideration: Qrr in Body Diode .................................................13
`Conclusion ...........................................................................................14
`
`
` A
`
` Class D audio amplifier is basically a switching amplifier or PWM amplifier. There are a number
`of different classes of amplifiers. This application note takes a look at the definitions for the main
`classifications.
`
`
`
`
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`
`1
`
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`

`

`AN-1071
`
`What is a Class D Audio Amplifier -
`Theory of Operation
`
`A Class D audio amplifier is basically a switch-
`ing amplifier or PWM amplifier. There are a num-
`ber of different classes of amplifiers. We will take
`a look at the definitions for the main classifica-
`tions as an introduction:
`
`Class A – In a Class A amplifier, the output de-
`vices are continuously conducting for the entire
`cycle, or in other words there is always bias
`current flowing in the output devices. This to-
`pology has the least distortion and is the most
`linear, but at the same time is the least efficient
`at about 20%. The design is typically not
`complementary with a high and low side output
`devices.
`
`Class B – This type of amplifier operates in the
`opposite way to Class A amplifiers. The output
`devices only conduct for half the sinusoidal cycle
`(one conducts in the positive region, and one
`conducts in the negative region), or in other
`words, if there is no input signal then there is
`no current flow in the output devices. This class
`of amplifier is obviously more efficient than Class
`A, at about 50%, but has some issue with lin-
`earity at the crossover point, due to the time it
`takes to turn one device off and turn the other
`device on.
`
`Class AB – This type of amplifier is a combina-
`tion of the above two types, and is currently one
`of the most common types of power amplifier in
`existence. Here both devices are allowed to
`conduct at the same time, but just a small
`amount near the crossover point. Hence each
`device is conducting for more than half a cycle
`but less than the whole cycle, so the inherent
`
`2
`
`non-linearity of Class B designs is overcome,
`without the inefficiencies of a Class A design.
`Efficiencies for Class AB amplifiers is about
`50%.
`
`Class D – This class of amplifier is a switching
`or PWM amplifier as mentioned above. This
`class of amplifier is the main focus of this appli-
`cation note. In this type of amplifier, the switches
`are either fully on or fully off, significantly re-
`ducing the power losses in the output devices.
`Efficiencies of 90-95% are possible. The audio
`signal is used to modulate a PWM carrier sig-
`nal which drives the output devices, with the
`last stage being a low pass filter to remove the
`high frequency PWM carrier frequency.
`
`From the above amplifier classifications, classes
`A, B and AB are all what is termed linear ampli-
`fiers. We will discuss the differences between
`Linear and Class D amplifiers in the next sec-
`tion. The block diagram of a linear amplifier is
`shown below in fig 1. In a linear amplifier the
`signals always remain in the analog domain,
`and the output transistors act as linear regula-
`tors to modulate the output voltage. This results
`in a voltage drop across the output devices,
`which reduces efficiency.
`
`Class D amplifiers take on many different forms,
`some can have digital inputs and some can have
`analog inputs. Here we will focus on the type
`which have analog inputs.
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`AN-1071
`
`Feedback
`
`Triangle
`Generator
`
`+
`
`Error
`Amp
`
`-
`
`+
`
`COMP
`
`Deadtime
`
`Level
`Shift
`
`+Vcc
`
`Nch
`
`Nch
`
`Fig 1 Block Diagram of a Class D Amplifier
`
`Fig 1 above shows the basic block diagram for
`a Half Bridge Class D amplifier, with the wave-
`forms at each stage. This circuit uses feedback
`from the output of the half-bridge to help com-
`pensate for variations in the bus voltages.
`
`So how does a Class D amplifier work? A Class
`D amplifier works in very much the same way
`as a PWM power supply (we will show the anal-
`ogy later). Let’s start with an assumption that
`
`
`
`COMP
`
`-Vcc
`the input signal is a standard audio line level
`signal. This audio line level signal is sinusoidal
`with a frequency ranging from 20Hz to 20kHz
`typically. This signal is compared with a high
`frequency triangle or sawtooth waveform to cre-
`ate the PWM signal as seen in fig 2a below.
`This PWM signal is then used to drive the power
`stage, creating the amplified digital signal, and
`finally a low pass filter is applied to the signal to
`filter out the PWM carrier frequency and retrieve
`the sinusoidal audio signal (also seen in fig 2b).
`
`Class D
`switching stage
`
`
`LPF
`
`
`
`
`
`Fig 2a PWM Signal Generation
`Fig 2) Class D Amplifier Waveforms
`
`Fig 2b Output Filtering
`
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`AN-1071
`
`Topology Comparison – Linear vs. Class D
`
`In this section we will discuss the differences
`between linear (Class A and Class AB) amplifi-
`ers, and Class D digital power amplifiers. The
`primary and main difference between linear and
`Class D amplifiers is the efficiency. This is the
`whole reason for the invention of Class D am-
`plifiers. The Linear amplifiers is inherently very
`linear in terms of its performance, but it is also
`very inefficient at about 50% typically for a Class
`AB amplifier, whereas a Class D amplifier is
`much more efficient, with values in the order of
`90% in practical designs. Fig 3 below shows
`typical efficiency curves for linear and Class D
`amplifiers.
`
` ā
`
`Temp rise test condition
`
`Gain – With Linear amplifiers the gain is con-
`stant irrespective of bus voltage variations, how-
`ever with Class D amplifiers the gain is propor-
`tional to the bus voltage. This means that the
`power supply rejection ratio (PSRR) of a Class
`D amplifier is 0dB, whereas the PSRR of a lin-
`ear amplifier is very good. It is common in Class
`D amplifiers to use feedback to compensate for
`the bus voltage variations.
`
`Energy Flow – In linear amplifiers the energy
`flow is always from supply to the load, and in
`Full bridge Class D amplifiers this is also true. A
`half-bridge Class D amplifier however is differ-
`ent, as the energy flow can be bi-directional,
`which leads to the “Bus pumping” phenomena,
`which causes the bus capacitors to be charged
`up by the energy flow from the load back to the
`supply. This occurs mainly at the low audio fre-
`quencies i.e. below 100Hz.
`
`Output
`Linear Amplifier
`
`ā
`
`Output
`Class D Amplifier
`
`Fig 3 Linear and Class D Amplifier Efficiencies
`
`4
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`AN-1071
`
`Q1
`MOSFET
`
`L1
`
`INDUCTOR
`
`Q2
`MOSFET
`
`Fc of LPF is
`above 20KHz
`
`C1
`CAPACITOR
`
`R1
`LOAD
`
`
`
`
`
`U1A
`
`1
`
`8
`
`+ -
`
`3
`
`2
`
`ERROR AMP
`
`4
`
`Vref
`
`
`
`Buck Converter
`
`Gate Driver
`
`Gate Driver
`
`U1A
`
`1
`
`8
`
`+ -
`
`3
`
`2
`
`ERROR AMP
`
`4
`
`Audio signal input as
`
` a reference voltage
`
`Q1
`MOSFET
`
`L1
`
`INDUCTOR
`
`Q2
`MOSFET
`
`C1
`CAPACITOR
`
`R1
`LOAD
`
`Analogy to a Synchronous Buck Converter
`
`A simple analogy can be made between a Class
`D amplifier and a synchronous buck converter.
`The topologies are essentially the same as can
`be seen below in fig 4.
`
`Class D amplifier
`
`Fig 4 Topologies for Synchronous Buck Converter and a Class D amplifier
`
`The final difference is in the way the MOSFETs
`are optimized. The Synch buck converter is
`optimized differently for the high and low side
`MOSFETs, with lower RDS(on) for longer duty and
`low Qg for short duty. The Class D amplifier has
`the same optimization for both of the MOSFETs,
`with the same RDS(on) for high and low side.
`
`The main difference between the two circuits is
`that the reference signal for the synchronous
`buck converter is a slow changing signal from
`the feedback circuit((cid:206)a fixed voltage), in the
`case of the Class D amplifier the reference sig-
`nal is an audio signal which is continuously
`changing. This means that the duty cycle is rela-
`tively fixed in the synch buck converter, whereas
`the duty is continuously changing in the Class
`D amplifier with an average duty of 50%.
`
`In the synch buck converter the load current
`direction is always towards the load, but in Class
`D the current flows in both directions.
`
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`

`

`Now lets look at the losses for a Class D ampli-
`fier. The total power loss in the output devices
`for a Class D amplifier are given by:
`
`=
`
`+
`
`PTOTAL
`Psw
`Pcond
`Pgd
`Psw are the switching losses and are given by
`the equation:
`
`+
`
`Psw
`
`=
`
`C
`OSS
`
`⋅
`
`V
`BUS
`
`2
`
`⋅
`
`f
`
`PWM
`
`+
`
`⋅
`VI
`D
`DS
`
`⋅
`
`t
`
`f
`
`⋅
`
`f
`
`PWM
`
`Pcond are the conduction losses and are given
`by the equation:
`
`R
`DS
`(
`R
`Pgd are the gate drive losses and are given by
`the equation:
`Pgd
`
`N
`
`)
`
`⋅
`
`Po
`
`LO
`
`Pcond
`
`=
`
`⋅= 2
`
`Qg
`
`⋅
`
`Vgs
`
`⋅
`
`PWMf
`
`As can be seen in a Class D amplifier the out-
`put losses are dependant on the parameters of
`the device used, so optimization is needed to
`have the most effective device, based on Qg,
`RDS(on), COSS, and tf . Fig 6 below shows the power
`losses vs K for the Class D amplifier.
`Loss
`
`Efficiency can be
`improved further!
`
`AN-1071
`
`Power Losses in the MOSFETs
`
`The losses in the power switches are very dif-
`ferent between linear amplifiers and Class D
`amplifiers. First lets look at the losses in a lin-
`ear Class AB amplifier. The losses can be de-
`fined as:
`1
`π
`⋅
`
`K
`
`sin
`
`ω
`⋅
`
`)
`
`t
`
`K
`
`sin
`
`ωω
`•⋅
`⋅
`dt
`
`t
`
`L
`
`=
`
`P
`
`C
`
`⋅
`
`π
`
`∫
`
`0
`
`(
`1
`
`−
`
`Vcc
`Vcc
`⋅
`R
`2
`2
`2
`Where K is the ratio of Vbus to output voltage.
`This can then be simplified down to the follow-
`ing equation for the linear amplifier Power switch
`losses:
`
`
`
`
`
`KK
`2
`2
`−
`π
`2
`
`
`
`
`
`⋅
`
`Vcc
`2
`⋅
`π
`R
`8
`L
`
`=
`
`P
`tot
`
`Note that the power loss is not related to the
`output device parameters. Fig 5) below shows
`the power loss vs K.
`
`
`
`Loss
`
`Pc
`
`(cid:0)
`
`2.0
`
`2
`
`V
`CC
`(cid:0)
`R
`8
`(cid:0)
`L
`
`
`
`K=2/ƒÎ
`
`K=1
`
`K=1
`
`Fig 5) Power Loss vs. K for Linear Class AB Amplifier
`
`Fig 6 Power Loss vs. K for Class D Amplifie
`
`6
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`

`AN-1071
`
`Table 1: Topology Comparison (Half-bridge vs. Full-bridge)
`
`Similar to conventional Class AB amplifiers,
`Class D amplifiers can be categorized into two
`topologies, half-bridge and full-bridge configu-
`rations. Each topology has pros and cons. In
`brief, a half-bridge is potentially simpler, while a
`full-bridge is better in audio performance. The
`full-bridge topology requires two half-bridge
`amplifiers, and thus, more components. How-
`ever, the differential output structure of the
`bridge topology inherently can cancel even the
`order of harmonic distortion components and
`DC offsets, as in Class AB amplifiers. A full-
`bridge topology allows of the use of a better
`PWM modulation scheme, such as the three
`level PWM which essentially has fewer errors
`due to quantization.
`
`In the half-bridge topology, the power supply
`might suffer from the energy being pumped back
`from the amplifier, resulting in severe bus volt-
`age fluctuations when the amplifier outputs low
`frequency audio signals to the load. This kick-
`back energy to the power supply is a funda-
`mental characteristic of Class D amplification.
`Complementary switching legs in the full-bridge
`tend to consume energy from the other side of
`the leg, so there is no energy being pumped
`back towards the power supply.
`
`Table 1 shows the summary of the comparison.
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`

`AN-1071
`
`Fig 7: Major Cause of Degradation
`
`An ideal Class D amplifying stage has no dis-
`tortion and no noise generation in the audible
`band, along with providing 100% efficiency.
`However, as shown in Fig 7, practical Class D
`amplifiers have imperfections that generate dis-
`tortions and noise. The imperfections are
`caused by the distorted switching waveform
`being generated by the Class D stage. The
`causes are:
`
`1. Nonlinearity in the PWM signal from
`modulator to switching stage due to lim-
`ited resolution and/or jitter in timing
`2. Timing errors added by the gate drivers,
`such as dead-time, ton/toff, and tr/tf
`3. Unwanted characteristics in the
`switching devices, such as finite ON re-
`sistance, finite switching speed or body
`
`8
`
`diode characteristics.
`4. Parasitic components that cause ring-
`ing on transient edges
`5. Power supply voltage fluctuations due
`to its finite output impedance and reac-
`tive power flowing through the DC bus
`6. Non-linearity in the output LPF.
`
`In general, switching timing error in a gate sig-
`nal is the primary cause of the nonlinearity. The
`timing error due to dead-time in particular has
`the most significant contribution of nonlinearity
`in a Class D stage. A small amount of dead-
`time in the tens of nano-seconds can easily
`generate more than 1% of THD (Total Harmonic
`Distortion). Accurate switching timing is always
`a primary concern.
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`AN-1071
`
`Let us take a look at how the dead-time affects nonlinearity.
`
`Fig 8: THD and Dead-time
`
`The operation mode in a Class D output stage
`can be categorized into three different regions
`based on how the output waveform follows the
`input timing. In those three different operation
`regions, the output waveform follows different
`edges in high side and low side input signals.
`
`Let’s examine the first operating region where
`the output current flows from the Class D stage
`to the load when the amount of the current is
`larger than the inductor ripple current. At the
`instant of high side turn-off and prior to low side
`turn-on, the output node is driven to the nega-
`
`tive DC bus. This action is automatically caused
`by the commutation current from the demodu-
`lation inductor, regardless of low side turn-on
`timing. Therefore the timing in the output wave-
`form is not influenced by the dead-time inserted
`into the turn-on edge of low side, and always
`follows the high side input timing. Consequently,
`the PWM waveform is shortened only by the
`dead-time inserted into the high side gate sig-
`nal, resulting in slightly lower voltage gain as
`expected from the input duty cycle.
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`AN-1071
`
`A similar situation happens to the negative op-
`eration region where the output current flows
`from the load to the Class D stage. The amount
`of the current is larger than the inductor ripple
`current. In this case, the timing in the output
`waveform is not influenced by the dead-time
`inserted into the turn-on edge of the high side,
`and always follows the low side input timing.
`Consequently, the PWM waveform is shortened
`only by the dead-time inserted into the low side
`gate signal.
`
`There is a region between the two operation
`modes described earlier where the output tim-
`ing is independent of the dead-time. When the
`output current is smaller than the inductor ripple
`current, the output timing follows the turn-off
`edge of each input because, in this region, turn-
`on is made by ZVS (Zero Voltage Switching)
`operation. Hence, there is no distortion in this
`middle region.
`
`As the output current varies according to the
`audio input signal, the Class D stage changes
`its operation regions, which each have a slightly
`
`different gain. The output waveform will be dis-
`torted by these three different gain regions in a
`cycle of the audio signal.
`
`Fig. 8 shows how significantly dead time affects
`THD performance. A 40nS dead time can cre-
`ate 2% THD. This can be improved to 0.2% by
`tightening the dead time down to 15nS. This
`punctuates the significance of seamless high
`side and low side switching for better linearity.
`
`Audio Performance Measurement
`
`Audio measuring equipment with an AES17
`brick wall filter, such as Audio Precision AP2,
`are necessary. However a classic audio ana-
`lyzer like the HP8903B can be used with ap-
`propriate pre-stage low pass filter is applied. The
`important consideration here is that the output
`signal of a Class D amplifier still contains sub-
`stantial amount of switching frequency carrier
`on its waveform, which causes a wrong read-
`ing, and those analyzers might not be immune
`enough to the carrier leak from a Class D am-
`plifier. Fig. 9 shows an example of a filter.
`
`470
`R1
`
`680
`R2
`
`1K
`R3
`
`8
`R4
`
`4.7n
`C1
`
`2.2n
`C2
`
`
`
`1n
`C3
`
`HP8903
`
`Fig 9: Example of an output filter
`
`10
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`

`AN-1071
`
`Fig 10: Shoot-through prevention
`
`for a reliable design of a Class D amplifier to
`ensure that the dead-time is always positive and
`never negative to prevent MOSFETs from en-
`tering the shoot through condition.
`
`However, a narrow dead-time can be very
`risky in mass production. Because once
`both high and low side MOSFETs are turned
`on simultaneously, the DC bus voltage will
`be short circuited by the MOSFETs. A huge
`amount of shoot-through current starts to
`flow, which will result in device destruction.
`It should be noticed that the effective dead-
`time can be vary from unit to unit variation
`of component values and its die tempera-
`ture. Fig. 10 shows the relationship between
`the length of the dead time and the amount of
`shoot-through charge. It is extremely important
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`AN-1071
`
`Fig 11: Power Supply Pumping
`
`Another marked cause of degradation in Class
`D amplifiers is bus pumping, which can be seen
`when the half bridge topology is powering a low
`frequency output to the load. Always keep in
`mind that the gain of a Class D amplifier stage
`is directly proportional to the bus voltage. There-
`fore, bus fluctuation creates distortion. Since the
`energy flowing in the Class D switching stage
`is bi-directional, there is a period where the
`Class D amplifier feeds energy back to the
`power supply. The majority of the energy flow-
`ing back to the supply is from the energy stored
`in the inductor in the output LPF. Usually, the
`
`power supply has no way to absorb the energy
`coming back from the load. Consequently the
`bus voltage is pumped up, creating bus voltage
`fluctuations.
`
`Bus pumping does not occur in full bridge to-
`pologies because the energy kicked back to the
`power supply from one side of the switching leg
`will be consumed in the other side of the
`switching leg.
`
`12
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`AN-1071
`
`Fig 12: EMI Considerations
`
`EMI (Electro-Magnetic Interference) in Class
`D amplifier design is troublesome like in
`other switching applications. One of the
`major sources of EMI comes from the re-
`verse recovery charge of the MOSFET body
`diode flowing from the top rail to the bot-
`tom, similar to the shoot-through current.
`During the dead-time inserted to prevent
`shoot through current, the inductor current
`in the output LPF turns on the body diode.
`In the next phase when the other side of the
`MOSFET starts to turn on at the end of the
`dead-time, the body diode stays in a con-
`
`ducting state unless the stored minority car-
`rier is fully discharged. This reverse recov-
`ery current tends to have a sharp spiky
`shape and leads to unwanted ringing from
`stray inductances in PCB traces and the
`package. Therefore, PCB layout is crucial for
`both ruggedness of the design and reduc-
`tion of EMI.
`
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`
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`

`AN-1071
`
`Conclusion
`
`Highly efficient Class D amplifiers now provide
`similar performances to conventional Class AB
`amplifier if key components are carefully se-
`lected and the layout takes into account the
`subtle, yet significant impact of parasitic com-
`ponents.
`
`Constant innovations in semiconductor tech-
`nologies are increasing the use of Class D am-
`plifiers usage due to improvements in higher
`efficiency, increased power density and better
`audio performance.
`
`14
`
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`http://www.irf.com/ Data and specifications subject to change without notice. 2/8/2005
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`