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`(12)INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT)
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`(19) World Intellectual Property Organization
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`1111111111111111 IIIIII IIIII IIIII IIIII IIII I II Ill lllll 1111111111111111111111111111111 IIII IIII IIII
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`International Bureau
`(10) International Publication Number
`(43) International Publication Date
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`30 September 2010 (30.09.2010)
`PCT
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`WO 2010/111433 A2
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`(81)Designated
`(51)International Patent Classification:States (unless otherwise indicated, for every
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`H02M 7148 (2007.01) H02M 7/12 (2006.01)
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`kind of national protection available): AE, AG, AL, AM,
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`AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ,
`(21)International Application Number:
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`CA,CH,CL,CN,CO,CR,CU,CZ,DE,DK,DM,DO,
`PCT/US20l0/028556
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`DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT,
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`HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP,
`(22)International Filing Date:
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`KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD,
`24 March 2010 (24.03.2010)
`ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI,
`English
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`NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD,
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`SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR,
`English
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`TT, TZ, VA, VG, US, UZ, VC, VN, ZA, ZM, ZW.
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`(25)Filing Language:
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`(26)Publication Language:
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`(30)Priority Data:
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`(84) Designated
`States (unless otherwise indicated, for every
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`61/163,214
`25 March 2009 (25.03.2009) us
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`kind of regional protection available): ARIPO (BW, GH,
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`(71)Applicant (for all designated States except US): POW­
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`GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG,
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`ERGETICS, INC. [US/US]; 3150 18th Street, Suite 414,
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`ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, MD, RU, TJ,
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`San Francisco, CA 941 lO (US).
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`TM), European (AT, BE, BG, CH, CY, CZ, DE, DK, EE,
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`ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV,
`(72)Inventor; and
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`MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM,
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`(75)Inventor/Applicant (for US only): SMITH, Lynn, B.
`TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW,
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`[US/US]; 35 l Megan Blvd., Ozark, AL 36360-6166 (US).
`ML, MR, NE, SN, TD, TG).
`(74)Agents: KIM, Elaine A. et al.; Wilson Sonsini Goodrich
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`Published:
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`& Rosati, 650 Page Mill Road, Palo Alto, CA
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`94304-1050 (US).
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`without international search report and to be republished
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`upon receipt of that report (Rule 48.2(g))
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`BIDIRECTIONAL ENERGY CONVERTER
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`(54)Title:
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`(57)Abstract: The invention provides a bidirectional converter that operates under an AC generation mode or a charge mode. The
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`bidirectional converter may be a single component or circuit, which may include a DC-DC conversion stage using a unique
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`"Smith 2 Stage conversion" technique and a DC-AC conversion stage or AC-DC conversion stage using a switchable filter de­
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`pending on the mode. During the charge mode, the converter may be able to control the voltage and current of the DC output us­
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`ing a software algorithm, to match the battery being charged, or the DC receiver. This may enable the converter to control the na­
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`ture of the DC output so it can be adapted to any energy storage technology. The controllable output voltage and synchronizable
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`frequency may allow the converter to be used in series combinations to achieve a variety of high voltage outputs from simpler
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`building blocks.
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`IPR2022-00716
`Apple EX1004 Page 1
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`WO 2010/111433
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`PCT /0S2010/028556
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`BIDIRECTIONAL ENERGY CONVERTER
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`CROSS-REFERENCE
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`[0001]
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`This application claims the benefit of U.S. Provisional Application No. 61/163,214 filed
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`March 25, 2009, which application is incorporated herein by reference in its entirety.
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`BACKGROUND OF THE INVENTION
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`energy converters to transfer systems have utilized [0002] Traditional energy storage or conversion
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`from DC to AC, or vice versa. For instance, an inverter may be utilized to convert energy from DC to
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`AC, and a rectifier may be used to convert energy from AC to DC. Systems have been developed to both
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`charge and discharge an energy storage system. Traditionally, separate inverter and rectifier circuits are
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`utilized for each type of energy conversion. Various energy conversion configurations have been
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`developed in order to allow such functions. See, e.g., U.S. Patent No. 6,160,722, U.S. Patent Publication
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`No. 2004/0062059, U.S. Patent No. 6,587,362, U.S. Patent Publication No. 2003/0057919, and U.S.
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`Patent No. 6,750,685, which are hereby incorporated by reference in their entirety. Furthermore,
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`traditional energy conversion systems used as battery chargers are unable to adapt to various energy
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`storage technologies, such that single customized designs are required for a given battery technology.
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`between AC converter that enables bidirectional conversion [0003] A need exists for a bidirectional
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`and DC within the same component or circuit. A further need exists for an AC to DC converter, which
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`may be used to charge an energy storage device, capable of controlling the DC output to adapt to an
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`energy storage technology.
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`SUMMARY OF THE INVENTION
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`[0004] The invention provides systems and methods for bidirectional energy conversion. Various
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`aspects of the invention described herein may be applied to any of the particular applications set forth
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`below or for any other types of circuits or devices. The invention may be applied as a standalone system
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`or method, or as part of an integrated package, such as an energy storage charging or discharging system.
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`It shall be understood that different aspects of the invention can be appreciated individually, collectively,
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`or in combination with each other.
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`[0005] In accordance with an aspect of the invention, a bidirectional converter may be provided.
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`The bidirectional converter may be formed such that it may function as a DC to AC energy converter
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`and/or an AC to DC energy converter within the same device or component. For example, a circuit may
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`be provided that may function for bidirectional energy conversion. Within the circuit, current may flow
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`in opposite directions, depending on the mode of operation. Thus, the same bidirectional converter may
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`be able to function as an inverter and as a rectifier.
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`from an AC control, reconfigure itself [0006] A bidirectional converter can, under software
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`generation mode to a charge mode. In an AC generation mode, DC input power from an energy source
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`such as a battery or capacitor may be converted to AC. For instance, the DC input power may be
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`converted to 120 V AC, 50/60 Hz, single phase. In a charge mode, AC may be converted to DC. In one
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`1
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`IPR2022-00716
`Apple EX1004 Page 2
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`

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`WO 2010/111433
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`PCT /0S2010/028556
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`implementation, 120VAC, 50/60 Hz may be converted to DC under a specified algorithm to recharge the
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`DC power source.
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`[0007] The bidirectional converter may operate in series, parallel, or series/parallel combinations
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`with other bidirectional converters as a part of an energy storage unit (ESU). The ESU may supply
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`240V AC, 50/60 Hz, single phase, 208 V AC, 50/60 Hz, 3 phase Wye or 480V AC, 3 phase Wye or Delta
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`connected AC power at various power levels determined by the ESU configuration and number of
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`bidirectional converters. The operation of the converters in series may be advantageous in enabling a unit
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`operating at 120VAC to 138VAC as a building block for another voltage output, such as 240V AC, 208
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`VAC or 277 VAC up to 480 VAC. Traditional inverters operate at either 120 or 240 VAC and can
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`operate in parallel, but not as a building block to higher voltages.
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`[0008] The output voltage and current of the bidirectional converter may be controlled very precisely
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`so as to enable precise delivery of power and energy to the desired load or when interconnected to an
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`electric grid to deliver a precise amount of power and energy to the grid. For example this would allow
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`the bidirectional converter to deliver a precise number of watts of power against a given load or a precise
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`amount of energy on command.
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`[0009] The response time of the bidirectional converter to change from the charge mode to the AC
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`generation mode may be less than one cycle at 60 Hz (16 ms). However, the actual time of mode change
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`may vary, and may depend on the time it takes to detect the circumstances that can trigger the change
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`(loss of AC, etc.). The invention may advantageously provide a design that can convert from being an
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`inverter to being a battery charger. The bidirectional converter may change modes 'on the fly.' The
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`bidirectional converter may also have a programmable battery charger algorithm in charge mode as well
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`as a smooth transition to AC generation mode (including a constant voltage mode). This can be
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`especially useful in energy recapture applications such as automobile regenerative braking, elevator
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`energy recapture, standby power, etc. This may reduce or eliminate duplicative charge vs. power systems
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`and the attendant harmonic and resonance problems that can arise from feedback loops attendant to
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`traditional two part designs.
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`[0010] In the AC generation mode, the bidirectional converter can be programmed to monitor the
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`AC line and provide power under specified overload or 'spike in usage' conditions.
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`[0011] The bidirectional converter design may be efficient and reliable. Fault monitoring and
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`reporting software may be part of the control system. Such monitoring and control may provide a
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`sophisticated design for a single converter module in use with others. The bidirectional converter can
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`also be commanded to tum off or isolate from a group of converters. The converter may perform some
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`form of self-check, which may be adopted in the software and hardware control.
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`[0012] Another feature that can be implemented into the system may be to shift the frequencies ( e.g.,
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`100 KHz and 30 KHz) slightly on a constant basis in co-ordination with the other bidirectional converters
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`in the system to minimize or reduce electromagnetic interference (EMI) emissions. A control system may
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`2
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`IPR2022-00716
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`WO 2010/111433
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`PCT /0S2010/028556
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`be coordinating and communicating with the bidirectional converters to operate at desirable frequencies
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`with respect to one another.
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`[0013] Other goals and advantages of the invention will be further appreciated and understood when
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`considered in conjunction with the following description and accompanying drawings. While the
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`following description may contain specific details describing particular embodiments of the invention,
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`this should not be construed as limitations to the scope of the invention but rather as an exemplification of
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`preferable embodiments. For each aspect of the invention, many variations are possible as suggested
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`herein that are known to those of ordinary skill in the art. A variety of changes and modifications can be
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`made within the scope of the invention without departing from the spirit thereof.
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`mentioned in this specification are herein [0014] All publications, patents, and patent applications
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`INCORPORATION BY REFERENCE
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`incorporated by reference to the same extent as if each individual publication, patent, or patent application
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`was specifically and individually indicated to be incorporated by reference.
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`BRIEF DESCRIPTION OF THE FIGURES
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`in the appended claims. A are set forth with particularity [0015] The novel features of the invention
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`better understanding of the features and advantages of the present invention will be obtained by reference
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`to the following detailed description that sets forth illustrative embodiments, in which the principles of
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`the invention are utilized, and the accompanying drawings of which:
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`mode. for an AC generation block diagram [0016] FIG. 1 shows a functional
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`[0017]
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`FIG. 2 shows a DC-DC converter driver stage.
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`[0018]
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`FIG. 3 shows an example of a drive waveform for Ql -Q4.
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`stage. synchronous rectifier [0019] FIG. 4 shows a DC-DC converter
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`[0020] FIG. 5 shows an example of a timing relationship between drivers Q 1 -Q4 and synchronous
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`rectifiers Q5 -Q8.
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`stage. bridge AC output [0021] FIG. 6 shows an "H"
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`[0022] FIG. 7 shows an example of timing relationships for an "H" Bridge output stage.
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`[0023] FIG. 8 shows a functional block diagram for a charge mode.
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`[0024]
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`FIG. 9 shows an example of where Q9 -Ql 1 may reverse roles and serve as a bridge
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`rectifier.
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`[0025]
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`FIG. 10 shows an example of rectifier timing.
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`[0026]
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`FIG. 11 shows a DC to DC converter driver stage.
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`[0027]
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`FIG. 12 shows an example of a timing relationship for Q5, Q6, Q7, and Q8.
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`[0028]
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`FIG. 13 shows a DC output stage to a battery.
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`[0029]
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`FIG. 14 shows a functional block diagram for an AC generation mode, in accordance with
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`another embodiment of the invention.
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`[0030] FIG. 15 shows a DC-DC converter driver stage.
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`3
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`[0031]
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`FIG. 16 shows an example of a drive waveform for Q7, Q8.
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`[0032]
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`FIG. 17 shows a DC-DC converter synchronous rectifier stage.
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`[0033]
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`FIG. 18 shows an example of a timing relationship between drivers Q7, Q8 and rectifiers Q5
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`and Q6.
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`[0034]
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`FIG. 19 shows an "H" bridge AC output stage.
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`[0035]
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`FIG. 20 shows an example of timing relationships for an "H" Bridge output stage.
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`[0036]
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`[0038]
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`FIG. 21 shows a functional block diagram for a charge mode.
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`FIG. 22 shows an example of where Ql -Q4 may reverse roles and serve as a bridge
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`FIG. 23 shows an example ofrectifier timing.
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`FIG. 24 shows a DC to DC converter driver stage.
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`[0040]
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`FIG. 25 shows an example of a timing relationship for Q5, Q6, Q9, and Q 10.
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`[0041]
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`FIG. 26 shows a DC output stage to a battery.
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`DETAILED DESCRIPTION OF THE INVENTION
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`[0042] While preferred embodiments of the invention have been shown and described herein, it will
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`be obvious to those skilled in the art that such embodiments are provided by way of example only.
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`Numerous variations, changes, and substitutions will now occur to those skilled in the art without
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`departing from the invention. It should be understood that various alternatives to the embodiments of the
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`invention described herein may be employed in practicing the invention.
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`[0043] The invention provides a bidirectional converter, that may operate in an AC generation mode,
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`where the bidirectional converter may function as an inverter to convert DC to AC. The bidirectional
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`converter may also operate in a charge mode, where the bidirectional converter may function as a rectifier
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`to convert AC to DC. The bidirectional converter may be able to operate in both modes within the same
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`device or component, rather than utilizing two separate circuits or components for each mode. A single
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`circuit may be utilized to form the bidirectional converter. For different modes, the same circuit with the
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`same paths may be operating in forward or reverse. In an AC generation mode, a circuit may be provided
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`with a path to convert DC to AC. In a charge mode, the same circuit may be provided with the same path
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`to convert AC to DC. In some instances, current may flow in different (and/or opposing) directions along
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`the same circuit for a DC to AC mode and an AC to DC mode.
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`and at least one AC [0044] A bidirectional converter may comprise at least one DC terminal
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`terminal. A DC terminal may function as a DC input when the converter is in AC generation mode, and
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`may function as a DC output when the converter is in charge mode. An AC terminal may function as an
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`AC output when the converter is in AC generation mode, and may function as an AC input when the
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`converter is in charge mode.
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`[0045] The bidirectional converter may include a DC-DC conversion stage disposed between the DC
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`terminal and the AC terminal. The converter may also include a bridge conversion stage disposed
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`4
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`IPR2022-00716
`Apple EX1004 Page 5
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`WO 2010/111433
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`PCT /0S2010/028556
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`between the DC-DC conversion stage and the AC terminal, wherein the bridge conversion stage is
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`selectively operable to invert a current when the current is flowing from the DC terminal to the AC
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`terminal, and to rectify the current when the current is flowing from the AC terminal to the DC terminal.
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`Thus, a bidirectional converter may include at least two stages in either mode. In an AC generation
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`mode, the bidirectional converter may include a DC-DC conversion stage and a DC-AC conversion stage.
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`In a charge mode, the bidirectional converter may include an AC-DC conversion stage and a DC-DC
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`conversion stage. Optionally, additional stages may be provided in either mode. In some embodiments,
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`one or more transformer may be utilized in the DC-DC conversion stage, and one or more bridge may be
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`used in the bridge conversion stage.
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`I. AC Generation Mode
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`inverter. bidirectional converter may operate as an [0046] In an AC generation mode of operation, a
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`Thus, a bidirectional converter may operate in a forward direction, by receiving DC as input and
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`providing AC as output. In one implementation, the inverter may be taking 48 VDC as input and
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`delivering 120VAC, 50 or 60 Hz, single phase output. Alternatively, the inverter may be configured to
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`take any value DC as input, such as about 6 VDC, 12 VDC, 2 4 VDC, 48 VDC, 72 VDC, 100 VDC, 200
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`VDC, or 500 VDC. The inverter may also be configured to provide any sort of AC output. For example,
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`the output may have any value VAC, such as about 10 V AC, 20 V AC, 50 V AC, 120 VAC, 200 VAC, or
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`500 V AC; or any Hz output, such as 20 Hz, 50 Hz, 60 Hz, 100 Hz, 200 Hz, 400 Hz.
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`[0047] FIG. 1 shows a functional flow of the bidirectional converter in the AC generation mode. A
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`DC input may be provided, as well as an AC output. The bidirectional converter may include a DC-DC
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`converter stage, DC-DC synchronous rectifier stage, and a DC-AC inverter stage.
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`[0048] The bidirectional converter may also include a single or a plurality of digital signal
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`processors (DSP). A single DSP, or alternatively two DSPs, may be used to control the input and output
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`functions on the respective sides of an electrically isolated data path. In some instances, using two or
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`more DSPs may be advantageous over using one DSP, since much logic would have to be electrically
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`isolated for one DSP to do all the work. The use of two or more DSPs may also be advantageous
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`considering the low cost ofDSPs and the high cost of isolation hardware. Furthermore, doing everything
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`in hardware may be unnecessarily complicated, and may take a long time to debug and may be prone to
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`iteration errors that can also consume development time. However, in alternate embodiments, one DSP
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`may be utilized. For example, a single DSP may provide a plurality of pulse width modulated (PWM)
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`outputs. In one example, the plurality of PWM outputs may include an output to Ql-Q4, Q5-Q8, Q9-
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`Ql2, and/or Q13.
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`[0049] In some embodiments, the DSPs may be a microcontroller or microprocessor. An isolated
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`data path may be provided between two or more DSPs. A plurality of DSPs utilized by the same
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`converter may communicate with one another via a data path. One or more of the DSPs may be
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`configured to communicate with one or more other energy converters. For instance, a DSP may include
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`5
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`IPR2022-00716
`Apple EX1004 Page 6
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`

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`WO 2010/111433
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`PCT /0S2010/028556
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`an input/output interface that may be an interprocessor input/output to other converters. Any
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`communication between DSPs or converters may occur through a wire or wirelessly.
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`A. DC-DC Converter Driver
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`[0050] FIG. 2 shows a DC-DC converter driver stage. A DC input may be conveyed to the DC
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`converter stage. In FIG. 2, a 4 8 VDC input voltage is fed into the DC to DC converter stage comprising
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`Ql thru Q4 driving the isolation transformer. Ql thru Q4 are shown as IGBT's, but could be transistors
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`or power MOSFET's. Ql thru Q4 may form a full bridge driver, and may pulse width modulated up to a
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`49% duty cycle for maximum or increased efficiency. The frequency of operation may be 100 KHz.
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`Positive feedback controls the regulation at this stage.
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`[0051] A local power supply may also be provided. The local power may optionally provide isolated
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`outputs to a DSP and/or sign al from the DC input.
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`[0052] In DC to AC (Inverter) mode a filter may be provided. The filter (represented by C l in FIG
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`2)may isolate any noise and electrical transients generated in the DC to DC converter from being
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`reflected back into the battery bus circuit. In AC to DC (Charge) mode the filter may eliminate high
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`frequency noise in the output of the DC to DC converter, preventing this noise from being conducted into
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`the battery bus circuit.
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`[0053] Input voltage and/or current may be monitored and the data may be stored in a DSP (e.g.,
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`DSP 1) to determine power used from the source. The DSP may include an analog-digital (AID)
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`converter, which may receive the data. This data may be required for some battery charging algorithms,
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`while it may be optional in others. Such data may be helpful because the bidirectional converter may also
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`function as a battery charger. In some battery charging algorithms it may be desirable to know how much
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`charge has been removed from the battery.
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`[0054] The DSP may provide a pulse width modulation (PWM) output. The output may be directed
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`thru the PWM logic and isolated drivers to Ql -Q4, providing a drive waveform. The DSP may or may
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`not consider the input voltage and/or current in providing PWM output.
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`[0055] FIG. 3 shows an example of a drive waveform for Ql -Q4 in this configuration. In one
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`implementation, the drive waveform may be 100 KHz with a pulse width modulated up to a 49% duty
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`cycle. However, other drive waveforms may be provided, which may have varying degrees of frequency
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`(e.g., the waveform may have any Hz value, such as 1 KHz, 50 KHz, 200 KHz, 500 KHz, or 1 MHz) or a
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`different duty cycle, ( e.g., the waveform may have any value percent for the duty cycle, such as 10% duty
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`cycle, 20% duty cycle, 30% duty cycle, 45% duty cycle).
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`[0056] Galvanic isolation may be provided. In one embodiment, galvanic isolation may be provided
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`by a transformer.
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`B. DC-DC Converter Synchronous Rectifier Stage:
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`[0057] FIG. 4 shows a DC-DC converter synchronous rectifier stage. The synchronous rectifier
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`stage may include Q5 -Q8, which may receive a PWM output from the DSP or a second DSP. In some
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`6
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`IPR2022-00716
`Apple EX1004 Page 7
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`WO 2010/111433
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`PCT /0S2010/028556
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`embodiments, Q5 -Q8 may be IGBT' s, transistors, or power MOSFET' s. The pulses to Q5 -Q8 may
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`control the voltage on a bus across a capacitor. The voltage from the bus may be inputted to the DSP,
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`through the AID converter of the DSP. Such data may or may not be utilized by the DSP to control the
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`PWM output at this stage or another stage.
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`In at a given frequency. rectifier that operates [0058] In FIG. 4, Q5 - Q8 may form a synchronous
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`some embodiments, the operation frequency for Q5 -Q8 may be synchronized with the frequency for Q 1 -
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`Q4. For example, if Ql - Q4 operate at 100 KHz, Q5 - Q8 may also operate at 100 KHz. Furthermore,
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`Q5 - Q8 may be pulse width modulated to control the DC voltage on a "50-230VDC Bus" across
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`capacitor C2.
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`DC half sine driven to form a pulsating [0059] For instance, the 50-230 VDC bus may be actually
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`wave. In one implementation, the produced wave may be a 120 Hz pulsating DC half sine wave that may
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`be about 50 volts above the 60 Hz sine wave that will be output ( e.g., by the "H" bridge class D amplifier)
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`in a later stage. This may allow a two stage approach to smoothing the AC sine wave. This may also
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`save power in Q5 - Q8 because they don't have to keep a 230 volt charge on C2 and may also save power
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`(e.g., on an "H" bridge) in the later stage because it now can use broader PWM pulses of lower amplitude.
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`This approach may be more efficient, resulting in lower power dissipation with less heat generated. This
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`approach results in the "H" bridge output amplifier switching only at 50 VDC or below, above 50 VDC
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`the sine wave is created by the DC - DC converter output at 1 00KHz. C2 provides an additional stage of
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`low pass filtering when operating in this mode. Q9 -Ql2 ("H" bridge class D amplifier) will not be pulse
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`width modulated when the DC bus is above 50 VDC but will remain in a condition to provide the proper
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`phase for the DC - DC converter output. This technique may be referred to as a "Smith Two Stage
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`Converter".
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`synchronization DSP 2), may maintain [0060] A process within the DSP or on a second DSP, ( e.g.,
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`with the AC line frequency and this may be used to both regulate and synchronize the 120 Hz pulsating
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`DC and to regulate and synchronize the output from the "H" Bridge amplifier. In a preferable
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`embodiment of the invention, both of these functions may be provided in one DSP on the "hot" side or
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`"cold" side. However, in alternate embodiments, separate DSPs may be utilized for each function, or one
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`or more of these functions may be combined with the first DSP.
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`Q5 -between drivers Ql - Q4 and rectifiers relationship [0061] FIG. 5 shows an example of a timing
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`Q8. As discussed previously, the frequency of the pulses for Q5 - Q8 may be synchronized with Q 1 - Q4.
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`If the frequency used for Ql - Q4 is varied, the frequency for Q5 -Q8 may be adjusted accordingly to
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`match the frequency for Ql - Q4. In FIG. 5 the pulse widths of Ql - Q4 may be controlled to produce a
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`desired output. In one example, the desired output may be a 120 Hz output that is 50 VDC above and
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`tracking with the output AC waveform (also see FIG. 7). However, if the desired output is varied, the
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`duty cycles of Q5 and Q6 may be varied accordingly. In some implementations, the duty cycles for Q5
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`and Q6 may be lower than the duty cycles for Q7 and Q8. The pulse widths and frequencies of Q5 and
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`Q6 may be controlled by either the main DSP or DSP 2.
`7
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`IPR2022-00716
`Apple EX1004 Page 8
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`WO 2010/111433
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`PCT /0S2010/028556
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`DC output. In some provide a half wave pulsating [0062] This technique may advantageously
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`embodiments, the output may be a 120 Hz half wave pulsating DC, which may be used to feed an "H"
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`bridge output. A half wave DC output may be advantageous over using a feed line that was at 23 0 VDC
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`(or some other desirable voltage) all of the time. If the feed line were at 230 VDC all the time, large
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`narrow spikes may result in the "H" bridge output, and have to be suppressed by a low pass output filter.
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`By contrast, the synchronous rectifiers Q5 -Q8 may have less load because they can operate at a specified
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`frequency (such as 100 KHz) and may not be required to hold up the 230 VDC bus at the maximum level.
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`The output of Q5 -Q8 may be smoothed by a capacitor C2. This has the benefit of reducing duty cycle
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`and increasing efficiency.
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`C. DC-AC Inverter
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`FIG. 6 shows an "H" bridge AC output stage. The "H" bridge may receive a DC from a prior
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`[0063]
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`stage. Preferably, the DC received may be a half wave pulsating DC. The "H" bridge may also include
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`Q9 -Ql 1 , which may receive PWM outputs from a DSP. The DSP may control the drive signals
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`provided to the "H" bridge. From this, the "H" bridge may provide an AC output. In some embodiments,
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`Q9 -Ql l may be IGBT's, transistors, or power MOSFET's.
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`the In one implementation, class "D" amplifier. stage may operate as a [0064] The "H" bridge output
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`bridge may operate as an amplifier with a PWM frequency of 30 KHz to produce a 50 or 60 Hz sine
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`wave. Depending on the desired output, a bridge may provide a PWM frequency to produce a desired
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`frequency output. The output may be passed through a low pass filter to filter out all the PWM (e.g., 30
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`KHz and 100 KHz) switching noise and pulses leaving only the pure sine wave.
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`by the rectifier. In a preferable may be synchronized bridge [0065] The input voltage to the "H"
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`embodiment of the invention, the input voltage to the "H" bridge may always be around 30 volts higher
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`than the required output. In another embodiment, the input voltage may always be some specified
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`number of volts higher than the required output ( e.g., which may be any value, such as about 1 volt, 5
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`volts, 10 volts, 20 volts, 2 5 volts, 3 5 volts, 40 volts, 50 volts, 100 volts). This margin may provide
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`enough voltage to deliver any surge requirements. Any margin of volts may be used, which may be
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`sufficient to deliver surge requirements, depending on expected surge magnitude, or other characteristics
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`of the system.
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`a to one or more fuse. In one example, may be provided [0066] The AC output from the "H" bridge
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`first fuse may be provided with 120 VAC single phase H, and another may be provided with 120 VAC
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`single phase N. In some embodiments, a current conditioning circuit and/or a voltage conditioning circuit
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`may be provided, which may affect the AC output provided to the fuses.
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`DC, and the output of the drive signals, the pulsating relationships [0067] FIG. 7 shows the timing
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`waveform of the "H" bridge class "D" amplifier.
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`In one as shown in FIG. 7. [0068] The drive sign als, the Q9 -Ql2 may be pulse width modulated
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`implementation, Q9 -Ql2 may be pulse width modulated at a 30 KHz rate. In other implementations, Q9
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`-Ql2 may be modulated at another rate, depending on the desired characteristics of the output voltage.
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`8
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`IPR2022-00716
`Apple EX1004 Page 9
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`WO 2010/111433
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`PCT /0S2010/028556
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`The "H" bridge is PW modulated at 30 KHz only when the DC bus voltage is at 50 VDC or below. When
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`the DC bus is above 50 VDC the "H" bridge operates at 60 Hz to provide the proper phase for the DC -